powerpc/44x: Warp patches for the new NDFC driver

Convert the Warp platform to use the newly merged NDFC driver

- warp.dts changed to work with ndfc
- warp-nand.c no longer needed
- removed obsolete rev A support from cuboot-warp.c

Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

authored by Sean MacLennan and committed by Josh Boyer e275e023 94ce1c58

+41 -180
-43
arch/powerpc/boot/cuboot-warp.c
··· 18 18 19 19 static bd_t bd; 20 20 21 - static void warp_fixup_one_nor(u32 from, u32 to) 22 - { 23 - void *devp; 24 - char name[50]; 25 - u32 v[2]; 26 - 27 - sprintf(name, "/plb/opb/ebc/nor_flash@0,0/partition@%x", from); 28 - 29 - devp = finddevice(name); 30 - if (!devp) 31 - return; 32 - 33 - if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { 34 - v[0] = to; 35 - setprop(devp, "reg", v, sizeof(v)); 36 - 37 - printf("NOR 64M fixup %x -> %x\r\n", from, to); 38 - } 39 - } 40 - 41 - 42 21 static void warp_fixups(void) 43 22 { 44 23 ibm440ep_fixup_clocks(66000000, 11059200, 50000000); 45 24 ibm4xx_sdram_fixup_memsize(); 46 25 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); 47 26 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); 48 - 49 - /* Fixup for 64M flash on Rev A boards. */ 50 - if (bd.bi_flashsize == 0x4000000) { 51 - void *devp; 52 - u32 v[3]; 53 - 54 - devp = finddevice("/plb/opb/ebc/nor_flash@0,0"); 55 - if (!devp) 56 - return; 57 - 58 - /* Fixup the size */ 59 - if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { 60 - v[2] = bd.bi_flashsize; 61 - setprop(devp, "reg", v, sizeof(v)); 62 - } 63 - 64 - /* Fixup parition offsets */ 65 - warp_fixup_one_nor(0x300000, 0x3f00000); 66 - warp_fixup_one_nor(0x340000, 0x3f40000); 67 - warp_fixup_one_nor(0x380000, 0x3f80000); 68 - } 69 27 } 70 - 71 28 72 29 void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, 73 30 unsigned long r6, unsigned long r7)
+41 -1
arch/powerpc/boot/dts/warp.dts
··· 149 149 reg = <0x00000002 0x00004000 0x00000A00>; 150 150 }; 151 151 152 - nor_flash@0,0 { 152 + nor@0,0 { 153 153 compatible = "amd,s29gl032a", "cfi-flash"; 154 154 bank-width = <2>; 155 155 reg = <0x00000000 0x00000000 0x00400000>; 156 156 #address-cells = <1>; 157 157 #size-cells = <1>; 158 + 159 + partition@0 { 160 + label = "splash"; 161 + reg = <0x00000000 0x00020000>; 162 + }; 158 163 partition@300000 { 159 164 label = "fpga"; 160 165 reg = <0x0300000 0x00040000>; ··· 171 166 partition@380000 { 172 167 label = "u-boot"; 173 168 reg = <0x0380000 0x00080000>; 169 + }; 170 + }; 171 + 172 + ndfc@1,0 { 173 + compatible = "ibm,ndfc"; 174 + reg = <0x00000001 0x00000000 0x00002000>; 175 + ccr = <0x00001000>; 176 + bank-settings = <0x80002222>; 177 + #address-cells = <1>; 178 + #size-cells = <1>; 179 + 180 + nand { 181 + #address-cells = <1>; 182 + #size-cells = <1>; 183 + 184 + partition@0 { 185 + label = "kernel"; 186 + reg = <0x00000000 0x00200000>; 187 + }; 188 + partition@200000 { 189 + label = "root"; 190 + reg = <0x00200000 0x03E00000>; 191 + }; 192 + partition@40000000 { 193 + label = "persistent"; 194 + reg = <0x04000000 0x04000000>; 195 + }; 196 + partition@80000000 { 197 + label = "persistent1"; 198 + reg = <0x08000000 0x04000000>; 199 + }; 200 + partition@C0000000 { 201 + label = "persistent2"; 202 + reg = <0x0C000000 0x04000000>; 203 + }; 174 204 }; 175 205 }; 176 206 };
-1
arch/powerpc/platforms/44x/Makefile
··· 3 3 obj-$(CONFIG_EBONY) += ebony.o 4 4 obj-$(CONFIG_SAM440EP) += sam440ep.o 5 5 obj-$(CONFIG_WARP) += warp.o 6 - obj-$(CONFIG_WARP) += warp-nand.o 7 6 obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
-135
arch/powerpc/platforms/44x/warp-nand.c
··· 1 - /* 2 - * PIKA Warp(tm) NAND flash specific routines 3 - * 4 - * Copyright (c) 2008 PIKA Technologies 5 - * Sean MacLennan <smaclennan@pikatech.com> 6 - */ 7 - 8 - #include <linux/platform_device.h> 9 - #include <linux/mtd/mtd.h> 10 - #include <linux/mtd/map.h> 11 - #include <linux/mtd/partitions.h> 12 - #include <linux/mtd/nand.h> 13 - #include <linux/mtd/ndfc.h> 14 - #include <linux/of.h> 15 - #include <asm/machdep.h> 16 - 17 - 18 - #ifdef CONFIG_MTD_NAND_NDFC 19 - 20 - #define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ 21 - 22 - #define WARP_NAND_FLASH_REG_ADDR 0xD0000000UL 23 - #define WARP_NAND_FLASH_REG_SIZE 0x2000 24 - 25 - static struct resource warp_ndfc = { 26 - .start = WARP_NAND_FLASH_REG_ADDR, 27 - .end = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE - 1, 28 - .flags = IORESOURCE_MEM, 29 - }; 30 - 31 - static struct mtd_partition nand_parts[] = { 32 - { 33 - .name = "kernel", 34 - .offset = 0, 35 - .size = 0x0200000 36 - }, 37 - { 38 - .name = "root", 39 - .offset = 0x0200000, 40 - .size = 0x3E00000 41 - }, 42 - { 43 - .name = "persistent", 44 - .offset = 0x4000000, 45 - .size = 0x4000000 46 - }, 47 - { 48 - .name = "persistent1", 49 - .offset = 0x8000000, 50 - .size = 0x4000000 51 - }, 52 - { 53 - .name = "persistent2", 54 - .offset = 0xC000000, 55 - .size = 0x4000000 56 - } 57 - }; 58 - 59 - struct ndfc_controller_settings warp_ndfc_settings = { 60 - .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1), 61 - .ndfc_erpn = 0, 62 - }; 63 - 64 - static struct ndfc_chip_settings warp_chip0_settings = { 65 - .bank_settings = 0x80002222, 66 - }; 67 - 68 - struct platform_nand_ctrl warp_nand_ctrl = { 69 - .priv = &warp_ndfc_settings, 70 - }; 71 - 72 - static struct platform_device warp_ndfc_device = { 73 - .name = "ndfc-nand", 74 - .id = 0, 75 - .dev = { 76 - .platform_data = &warp_nand_ctrl, 77 - }, 78 - .num_resources = 1, 79 - .resource = &warp_ndfc, 80 - }; 81 - 82 - /* Do NOT set the ecclayout: let it default so it is correct for both 83 - * 64M and 256M flash chips. 84 - */ 85 - static struct platform_nand_chip warp_nand_chip0 = { 86 - .nr_chips = 1, 87 - .chip_offset = CS_NAND_0, 88 - .nr_partitions = ARRAY_SIZE(nand_parts), 89 - .partitions = nand_parts, 90 - .chip_delay = 20, 91 - .priv = &warp_chip0_settings, 92 - }; 93 - 94 - static struct platform_device warp_nand_device = { 95 - .name = "ndfc-chip", 96 - .id = 0, 97 - .num_resources = 0, 98 - .dev = { 99 - .platform_data = &warp_nand_chip0, 100 - .parent = &warp_ndfc_device.dev, 101 - } 102 - }; 103 - 104 - static int warp_setup_nand_flash(void) 105 - { 106 - struct device_node *np; 107 - 108 - /* Try to detect a rev A based on NOR size. */ 109 - np = of_find_compatible_node(NULL, NULL, "cfi-flash"); 110 - if (np) { 111 - struct property *pp; 112 - 113 - pp = of_find_property(np, "reg", NULL); 114 - if (pp && (pp->length == 12)) { 115 - u32 *v = pp->value; 116 - if (v[2] == 0x4000000) { 117 - /* Rev A = 64M NAND */ 118 - warp_nand_chip0.nr_partitions = 3; 119 - 120 - nand_parts[1].size = 0x3000000; 121 - nand_parts[2].offset = 0x3200000; 122 - nand_parts[2].size = 0x0e00000; 123 - } 124 - } 125 - of_node_put(np); 126 - } 127 - 128 - platform_device_register(&warp_ndfc_device); 129 - platform_device_register(&warp_nand_device); 130 - 131 - return 0; 132 - } 133 - machine_device_initcall(warp, warp_setup_nand_flash); 134 - 135 - #endif