Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'v4.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

This contains the rk3368-geekbox as new board, mailbox device
nodes for the core rk3368 and some cleanups for gpio-keys,
mmc and tsadc.

* tag 'v4.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
Documentation: devicetree: rockchip: Document rk3368-GeekBox
arm64: dts: rockchip: Add rk3368 GeekBox dts
arm64: dts: rockchip: Clean up gpio-keys nodes
dt-bindings: Add vendor prefix for GeekBuying.com
arm64: dts: rockchip: Add rk3368 mailbox device nodes
arm64: dts: rockchip: remove broken-cd from emmc and sdio
arm64: dts: rockchip: fix the incorrect otp-out pin on rk3368

Signed-off-by: Olof Johansson <olof@lixom.net>

+345 -12
+4
Documentation/devicetree/bindings/arm/rockchip.txt
··· 39 39 Required root node properties: 40 40 - compatible = "netxeon,r89", "rockchip,rk3288"; 41 41 42 + - GeekBuying GeekBox: 43 + Required root node properties: 44 + - compatible = "geekbuying,geekbox", "rockchip,rk3368"; 45 + 42 46 - Google Brain (dev-board): 43 47 Required root node properties: 44 48 - compatible = "google,veyron-brain-rev0", "google,veyron-brain",
+1
Documentation/devicetree/bindings/vendor-prefixes.txt
··· 91 91 focaltech FocalTech Systems Co.,Ltd 92 92 fsl Freescale Semiconductor 93 93 ge General Electric Company 94 + geekbuying GeekBuying 94 95 GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. 95 96 gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. 96 97 geniatech Geniatech, Inc.
+1
arch/arm64/boot/dts/rockchip/Makefile
··· 1 1 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb 2 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb 2 3 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb 3 4 4 5 always := $(dtb-y)
+3 -5
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
··· 40 40 * OTHER DEALINGS IN THE SOFTWARE. 41 41 */ 42 42 43 + #include <dt-bindings/input/input.h> 43 44 #include <dt-bindings/pwm/pwm.h> 44 45 #include "rk3368.dtsi" 45 46 ··· 106 105 107 106 keys: gpio-keys { 108 107 compatible = "gpio-keys"; 109 - #address-cells = <1>; 110 - #size-cells = <0>; 111 108 pinctrl-names = "default"; 112 109 pinctrl-0 = <&pwr_key>; 113 110 114 - button@0 { 111 + power { 115 112 wakeup-source; 116 113 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 117 114 label = "GPIO Power"; 118 - linux,code = <116>; 115 + linux,code = <KEY_POWER>; 119 116 }; 120 117 }; 121 118 ··· 151 152 }; 152 153 153 154 &emmc { 154 - broken-cd; 155 155 bus-width = <8>; 156 156 cap-mmc-highspeed; 157 157 disable-wp;
+319
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
··· 1 + /* 2 + * Copyright (c) 2016 Andreas Färber 3 + * 4 + * This file is dual-licensed: you can use it either under the terms 5 + * of the GPL or the X11 license, at your option. Note that this dual 6 + * licensing only applies to this file, and not this project as a 7 + * whole. 8 + * 9 + * a) This file is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License as 11 + * published by the Free Software Foundation; either version 2 of the 12 + * License, or (at your option) any later version. 13 + * 14 + * This file is distributed in the hope that it will be useful, 15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 + * GNU General Public License for more details. 18 + * 19 + * Or, alternatively, 20 + * 21 + * b) Permission is hereby granted, free of charge, to any person 22 + * obtaining a copy of this software and associated documentation 23 + * files (the "Software"), to deal in the Software without 24 + * restriction, including without limitation the rights to use, 25 + * copy, modify, merge, publish, distribute, sublicense, and/or 26 + * sell copies of the Software, and to permit persons to whom the 27 + * Software is furnished to do so, subject to the following 28 + * conditions: 29 + * 30 + * The above copyright notice and this permission notice shall be 31 + * included in all copies or substantial portions of the Software. 32 + * 33 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 + * OTHER DEALINGS IN THE SOFTWARE. 41 + */ 42 + 43 + /dts-v1/; 44 + #include "rk3368.dtsi" 45 + #include <dt-bindings/input/input.h> 46 + 47 + / { 48 + model = "GeekBox"; 49 + compatible = "geekbuying,geekbox", "rockchip,rk3368"; 50 + 51 + chosen { 52 + stdout-path = "serial2:115200n8"; 53 + }; 54 + 55 + memory@0 { 56 + device_type = "memory"; 57 + reg = <0x0 0x0 0x0 0x80000000>; 58 + }; 59 + 60 + ext_gmac: gmac-clk { 61 + compatible = "fixed-clock"; 62 + clock-frequency = <125000000>; 63 + clock-output-names = "ext_gmac"; 64 + #clock-cells = <0>; 65 + }; 66 + 67 + ir: ir-receiver { 68 + compatible = "gpio-ir-receiver"; 69 + gpios = <&gpio3 30 GPIO_ACTIVE_LOW>; 70 + pinctrl-names = "default"; 71 + pinctrl-0 = <&ir_int>; 72 + }; 73 + 74 + keys: gpio-keys { 75 + compatible = "gpio-keys"; 76 + pinctrl-names = "default"; 77 + pinctrl-0 = <&pwr_key>; 78 + 79 + power { 80 + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 81 + label = "GPIO Power"; 82 + linux,code = <KEY_POWER>; 83 + wakeup-source; 84 + }; 85 + }; 86 + 87 + leds: gpio-leds { 88 + compatible = "gpio-leds"; 89 + 90 + blue { 91 + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 92 + label = "geekbox:blue:led"; 93 + default-state = "on"; 94 + }; 95 + 96 + red { 97 + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; 98 + label = "geekbox:red:led"; 99 + default-state = "off"; 100 + }; 101 + }; 102 + 103 + vcc_sys: vcc-sys-regulator { 104 + compatible = "regulator-fixed"; 105 + regulator-name = "vcc_sys"; 106 + regulator-min-microvolt = <5000000>; 107 + regulator-max-microvolt = <5000000>; 108 + regulator-always-on; 109 + regulator-boot-on; 110 + }; 111 + }; 112 + 113 + &emmc { 114 + status = "okay"; 115 + bus-width = <8>; 116 + cap-mmc-highspeed; 117 + clock-frequency = <150000000>; 118 + disable-wp; 119 + keep-power-in-suspend; 120 + non-removable; 121 + num-slots = <1>; 122 + vmmc-supply = <&vcc_io>; 123 + vqmmc-supply = <&vcc18_flash>; 124 + pinctrl-names = "default"; 125 + pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; 126 + }; 127 + 128 + &gmac { 129 + status = "okay"; 130 + phy-supply = <&vcc_lan>; 131 + phy-mode = "rgmii"; 132 + clock_in_out = "input"; 133 + assigned-clocks = <&cru SCLK_MAC>; 134 + assigned-clock-parents = <&ext_gmac>; 135 + pinctrl-names = "default"; 136 + pinctrl-0 = <&rgmii_pins>; 137 + tx_delay = <0x30>; 138 + rx_delay = <0x10>; 139 + }; 140 + 141 + &i2c0 { 142 + status = "okay"; 143 + 144 + rk808: pmic@1b { 145 + compatible = "rockchip,rk808"; 146 + reg = <0x1b>; 147 + pinctrl-names = "default"; 148 + pinctrl-0 = <&pmic_int>, <&pmic_sleep>; 149 + interrupt-parent = <&gpio0>; 150 + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; 151 + rockchip,system-power-controller; 152 + vcc1-supply = <&vcc_sys>; 153 + vcc2-supply = <&vcc_sys>; 154 + vcc3-supply = <&vcc_sys>; 155 + vcc4-supply = <&vcc_sys>; 156 + vcc6-supply = <&vcc_sys>; 157 + vcc7-supply = <&vcc_sys>; 158 + vcc8-supply = <&vcc_io>; 159 + vcc9-supply = <&vcc_sys>; 160 + vcc10-supply = <&vcc_sys>; 161 + vcc11-supply = <&vcc_sys>; 162 + vcc12-supply = <&vcc_io>; 163 + clock-output-names = "xin32k", "rk808-clkout2"; 164 + #clock-cells = <1>; 165 + 166 + regulators { 167 + vdd_cpu: DCDC_REG1 { 168 + regulator-always-on; 169 + regulator-boot-on; 170 + regulator-min-microvolt = <700000>; 171 + regulator-max-microvolt = <1500000>; 172 + regulator-name = "vdd_cpu"; 173 + }; 174 + 175 + vdd_log: DCDC_REG2 { 176 + regulator-always-on; 177 + regulator-boot-on; 178 + regulator-min-microvolt = <700000>; 179 + regulator-max-microvolt = <1500000>; 180 + regulator-name = "vdd_log"; 181 + }; 182 + 183 + vcc_ddr: DCDC_REG3 { 184 + regulator-always-on; 185 + regulator-boot-on; 186 + regulator-name = "vcc_ddr"; 187 + }; 188 + 189 + vcc_io: DCDC_REG4 { 190 + regulator-always-on; 191 + regulator-boot-on; 192 + regulator-min-microvolt = <3300000>; 193 + regulator-max-microvolt = <3300000>; 194 + regulator-name = "vcc_io"; 195 + }; 196 + 197 + vcc18_flash: LDO_REG1 { 198 + regulator-always-on; 199 + regulator-boot-on; 200 + regulator-min-microvolt = <1800000>; 201 + regulator-max-microvolt = <1800000>; 202 + regulator-name = "vcc18_flash"; 203 + }; 204 + 205 + vcc33_lcd: LDO_REG2 { 206 + regulator-always-on; 207 + regulator-boot-on; 208 + regulator-min-microvolt = <3300000>; 209 + regulator-max-microvolt = <3300000>; 210 + regulator-name = "vcc33_lcd"; 211 + }; 212 + 213 + vdd_10: LDO_REG3 { 214 + regulator-always-on; 215 + regulator-boot-on; 216 + regulator-min-microvolt = <1000000>; 217 + regulator-max-microvolt = <1000000>; 218 + regulator-name = "vdd_10"; 219 + }; 220 + 221 + vcca_18: LDO_REG4 { 222 + regulator-boot-on; 223 + regulator-min-microvolt = <1800000>; 224 + regulator-max-microvolt = <1800000>; 225 + regulator-name = "vcca_18"; 226 + }; 227 + 228 + vccio_sd: LDO_REG5 { 229 + regulator-always-on; 230 + regulator-boot-on; 231 + regulator-min-microvolt = <1800000>; 232 + regulator-max-microvolt = <3300000>; 233 + regulator-name = "vccio_sd"; 234 + }; 235 + 236 + vdd10_lcd: LDO_REG6 { 237 + regulator-always-on; 238 + regulator-boot-on; 239 + regulator-min-microvolt = <1000000>; 240 + regulator-max-microvolt = <1000000>; 241 + regulator-name = "vdd10_lcd"; 242 + }; 243 + 244 + vcc_18: LDO_REG7 { 245 + regulator-always-on; 246 + regulator-boot-on; 247 + regulator-min-microvolt = <1800000>; 248 + regulator-max-microvolt = <1800000>; 249 + regulator-name = "vcc_18"; 250 + }; 251 + 252 + vcc18_lcd: LDO_REG8 { 253 + regulator-always-on; 254 + regulator-boot-on; 255 + regulator-min-microvolt = <1800000>; 256 + regulator-max-microvolt = <1800000>; 257 + regulator-name = "vcc18_lcd"; 258 + }; 259 + 260 + vcc_sd: SWITCH_REG1 { 261 + regulator-always-on; 262 + regulator-boot-on; 263 + regulator-name = "vcc_sd"; 264 + }; 265 + 266 + vcc_lan: SWITCH_REG2 { 267 + regulator-always-on; 268 + regulator-boot-on; 269 + regulator-name = "vcc_lan"; 270 + }; 271 + }; 272 + }; 273 + }; 274 + 275 + &pinctrl { 276 + ir { 277 + ir_int: ir-int { 278 + rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>; 279 + }; 280 + }; 281 + 282 + keys { 283 + pwr_key: pwr-key { 284 + rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>; 285 + }; 286 + }; 287 + 288 + pmic { 289 + pmic_sleep: pmic-sleep { 290 + rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>; 291 + }; 292 + 293 + pmic_int: pmic-int { 294 + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; 295 + }; 296 + }; 297 + }; 298 + 299 + &tsadc { 300 + status = "okay"; 301 + rockchip,hw-tshut-mode = <0>; /* CRU */ 302 + rockchip,hw-tshut-polarity = <1>; /* high */ 303 + }; 304 + 305 + &uart2 { 306 + status = "okay"; 307 + }; 308 + 309 + &usb_host0_ehci { 310 + status = "okay"; 311 + }; 312 + 313 + &usb_otg { 314 + status = "okay"; 315 + }; 316 + 317 + &wdt { 318 + status = "okay"; 319 + };
+3 -5
arch/arm64/boot/dts/rockchip/rk3368-r88.dts
··· 42 42 43 43 /dts-v1/; 44 44 #include "rk3368.dtsi" 45 + #include <dt-bindings/input/input.h> 45 46 46 47 / { 47 48 model = "Rockchip R88"; ··· 66 65 67 66 keys: gpio-keys { 68 67 compatible = "gpio-keys"; 69 - #address-cells = <1>; 70 - #size-cells = <0>; 71 68 pinctrl-names = "default"; 72 69 pinctrl-0 = <&pwr_key>; 73 70 74 - button@0 { 71 + power { 75 72 wakeup-source; 76 73 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 77 74 label = "GPIO Power"; 78 - linux,code = <116>; 75 + linux,code = <KEY_POWER>; 79 76 }; 80 77 }; 81 78 ··· 184 185 }; 185 186 186 187 &emmc { 187 - broken-cd; 188 188 bus-width = <8>; 189 189 cap-mmc-highspeed; 190 190 disable-wp;
+14 -2
arch/arm64/boot/dts/rockchip/rk3368.dtsi
··· 555 555 status = "disabled"; 556 556 }; 557 557 558 + mbox: mbox@ff6b0000 { 559 + compatible = "rockchip,rk3368-mailbox"; 560 + reg = <0x0 0xff6b0000 0x0 0x1000>; 561 + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, 562 + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 563 + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 564 + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 565 + clocks = <&cru PCLK_MAILBOX>; 566 + clock-names = "pclk_mailbox"; 567 + #mbox-cells = <1>; 568 + }; 569 + 558 570 pmugrf: syscon@ff738000 { 559 571 compatible = "rockchip,rk3368-pmugrf", "syscon"; 560 572 reg = <0x0 0xff738000 0x0 0x1000>; ··· 938 926 939 927 tsadc { 940 928 otp_gpio: otp-gpio { 941 - rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>; 929 + rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>; 942 930 }; 943 931 944 932 otp_out: otp-out { 945 - rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; 933 + rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_none>; 946 934 }; 947 935 }; 948 936