Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'reset-for-4.17' of git://git.pengutronix.de/git/pza/linux into next/drivers

Pull "Reset controller changes for v4.17" from Philipp Zabel:

This enables level resets on Meson8b SoCs. Level resets have been
previously implemented for the newer Meson GX SoCs, so this removes
the distinction between the two families in the meson-reset driver.

Also enables the ASPEED LPC reset controller on ASPEED AST2400 and
AST2500 SoCs, by adding compatibles to the simple-reset driver.

* tag 'reset-for-4.17' of git://git.pengutronix.de/git/pza/linux:
reset: simple: Enable for ASPEED systems
dt-bindings: aspeed-lpc: Add reset controller
reset: meson: enable level reset support on Meson8b

+35 -20
+21
Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
··· 135 135 compatible = "aspeed,ast2500-lhc"; 136 136 reg = <0x20 0x24 0x48 0x8>; 137 137 }; 138 + 139 + LPC reset control 140 + ----------------- 141 + 142 + The UARTs present in the ASPEED SoC can have their resets tied to the reset 143 + state of the LPC bus. Some systems may chose to modify this configuration. 144 + 145 + Required properties: 146 + 147 + - compatible: "aspeed,ast2500-lpc-reset" or 148 + "aspeed,ast2400-lpc-reset" 149 + - reg: offset and length of the IP in the LHC memory region 150 + - #reset-controller indicates the number of reset cells expected 151 + 152 + Example: 153 + 154 + lpc_reset: reset-controller@18 { 155 + compatible = "aspeed,ast2500-lpc-reset"; 156 + reg = <0x18 0x4>; 157 + #reset-cells = <1>; 158 + };
+7 -3
drivers/reset/Kconfig
··· 83 83 84 84 config RESET_SIMPLE 85 85 bool "Simple Reset Controller Driver" if COMPILE_TEST 86 - default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX 86 + default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED 87 87 help 88 88 This enables a simple reset controller driver for reset lines that 89 89 that can be asserted and deasserted by toggling bits in a contiguous, 90 90 exclusive register space. 91 91 92 - Currently this driver supports Altera SoCFPGAs, the RCC reset 93 - controller in STM32 MCUs, Allwinner SoCs, and ZTE's zx2967 family. 92 + Currently this driver supports: 93 + - Altera SoCFPGAs 94 + - ASPEED BMC SoCs 95 + - RCC reset controller in STM32 MCUs 96 + - Allwinner SoCs 97 + - ZTE's zx2967 family 94 98 95 99 config RESET_SUNXI 96 100 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
+5 -17
drivers/reset/reset-meson.c
··· 124 124 return meson_reset_level(rcdev, id, false); 125 125 } 126 126 127 - static const struct reset_control_ops meson_reset_meson8_ops = { 128 - .reset = meson_reset_reset, 129 - }; 130 - 131 - static const struct reset_control_ops meson_reset_gx_ops = { 127 + static const struct reset_control_ops meson_reset_ops = { 132 128 .reset = meson_reset_reset, 133 129 .assert = meson_reset_assert, 134 130 .deassert = meson_reset_deassert, 135 131 }; 136 132 137 133 static const struct of_device_id meson_reset_dt_ids[] = { 138 - { .compatible = "amlogic,meson8b-reset", 139 - .data = &meson_reset_meson8_ops, }, 140 - { .compatible = "amlogic,meson-gxbb-reset", 141 - .data = &meson_reset_gx_ops, }, 142 - { .compatible = "amlogic,meson-axg-reset", 143 - .data = &meson_reset_gx_ops, }, 134 + { .compatible = "amlogic,meson8b-reset" }, 135 + { .compatible = "amlogic,meson-gxbb-reset" }, 136 + { .compatible = "amlogic,meson-axg-reset" }, 144 137 { /* sentinel */ }, 145 138 }; 146 139 147 140 static int meson_reset_probe(struct platform_device *pdev) 148 141 { 149 - const struct reset_control_ops *ops; 150 142 struct meson_reset *data; 151 143 struct resource *res; 152 144 153 145 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 154 146 if (!data) 155 147 return -ENOMEM; 156 - 157 - ops = of_device_get_match_data(&pdev->dev); 158 - if (!ops) 159 - return -EINVAL; 160 148 161 149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 162 150 data->reg_base = devm_ioremap_resource(&pdev->dev, res); ··· 157 169 158 170 data->rcdev.owner = THIS_MODULE; 159 171 data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG; 160 - data->rcdev.ops = ops; 172 + data->rcdev.ops = &meson_reset_ops; 161 173 data->rcdev.of_node = pdev->dev.of_node; 162 174 163 175 return devm_reset_controller_register(&pdev->dev, &data->rcdev);
+2
drivers/reset/reset-simple.c
··· 125 125 .data = &reset_simple_active_low }, 126 126 { .compatible = "zte,zx296718-reset", 127 127 .data = &reset_simple_active_low }, 128 + { .compatible = "aspeed,ast2400-lpc-reset" }, 129 + { .compatible = "aspeed,ast2500-lpc-reset" }, 128 130 { /* sentinel */ }, 129 131 }; 130 132