Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[PATCH] drivers/net/sk98lin/: possible cleanups

This patch contains the following possible cleanups:
- make needlessly global functions static
- remove unused code

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Cc: Stephen Hemminger <shemminger@osdl.org>
Cc: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

authored by

Adrian Bunk and committed by
Jeff Garzik
e03d72b9 2664b250

+40 -1108
-48
drivers/net/sk98lin/h/skaddr.h
··· 236 236 SK_U32 PortNumber, 237 237 int Flags); 238 238 239 - extern int SkAddrXmacMcClear( 240 - SK_AC *pAC, 241 - SK_IOC IoC, 242 - SK_U32 PortNumber, 243 - int Flags); 244 - 245 - extern int SkAddrGmacMcClear( 246 - SK_AC *pAC, 247 - SK_IOC IoC, 248 - SK_U32 PortNumber, 249 - int Flags); 250 - 251 239 extern int SkAddrMcAdd( 252 240 SK_AC *pAC, 253 241 SK_IOC IoC, ··· 243 255 SK_MAC_ADDR *pMc, 244 256 int Flags); 245 257 246 - extern int SkAddrXmacMcAdd( 247 - SK_AC *pAC, 248 - SK_IOC IoC, 249 - SK_U32 PortNumber, 250 - SK_MAC_ADDR *pMc, 251 - int Flags); 252 - 253 - extern int SkAddrGmacMcAdd( 254 - SK_AC *pAC, 255 - SK_IOC IoC, 256 - SK_U32 PortNumber, 257 - SK_MAC_ADDR *pMc, 258 - int Flags); 259 - 260 258 extern int SkAddrMcUpdate( 261 - SK_AC *pAC, 262 - SK_IOC IoC, 263 - SK_U32 PortNumber); 264 - 265 - extern int SkAddrXmacMcUpdate( 266 - SK_AC *pAC, 267 - SK_IOC IoC, 268 - SK_U32 PortNumber); 269 - 270 - extern int SkAddrGmacMcUpdate( 271 259 SK_AC *pAC, 272 260 SK_IOC IoC, 273 261 SK_U32 PortNumber); ··· 260 296 SK_IOC IoC, 261 297 SK_U32 PortNumber, 262 298 int NewPromMode); 263 - 264 - extern int SkAddrXmacPromiscuousChange( 265 - SK_AC *pAC, 266 - SK_IOC IoC, 267 - SK_U32 PortNumber, 268 - int NewPromMode); 269 - 270 - extern int SkAddrGmacPromiscuousChange( 271 - SK_AC *pAC, 272 - SK_IOC IoC, 273 - SK_U32 PortNumber, 274 - int NewPromMode); 275 299 276 300 #ifndef SK_SLIM 277 301 extern int SkAddrSwap(
-6
drivers/net/sk98lin/h/skcsum.h
··· 203 203 unsigned Checksum2, 204 204 int NetNumber); 205 205 206 - extern void SkCsGetSendInfo( 207 - SK_AC *pAc, 208 - void *pIpHeader, 209 - SKCS_PACKET_INFO *pPacketInfo, 210 - int NetNumber); 211 - 212 206 extern void SkCsSetReceiveFlags( 213 207 SK_AC *pAc, 214 208 unsigned ReceiveFlags,
-56
drivers/net/sk98lin/h/skgeinit.h
··· 464 464 /* 465 465 * public functions in skgeinit.c 466 466 */ 467 - extern void SkGePollRxD( 468 - SK_AC *pAC, 469 - SK_IOC IoC, 470 - int Port, 471 - SK_BOOL PollRxD); 472 - 473 467 extern void SkGePollTxD( 474 468 SK_AC *pAC, 475 469 SK_IOC IoC, ··· 516 522 int Led, 517 523 int Mode); 518 524 519 - extern void SkGeInitRamIface( 520 - SK_AC *pAC, 521 - SK_IOC IoC); 522 - 523 525 extern int SkGeInitAssignRamToQueues( 524 526 SK_AC *pAC, 525 527 int ActivePort, ··· 535 545 int Port); 536 546 537 547 extern void SkMacHardRst( 538 - SK_AC *pAC, 539 - SK_IOC IoC, 540 - int Port); 541 - 542 - extern void SkMacClearRst( 543 548 SK_AC *pAC, 544 549 SK_IOC IoC, 545 550 int Port); ··· 565 580 SK_IOC IoC, 566 581 int Port); 567 582 568 - extern void SkMacFlushRxFifo( 569 - SK_AC *pAC, 570 - SK_IOC IoC, 571 - int Port); 572 - 573 583 extern void SkMacIrq( 574 584 SK_AC *pAC, 575 585 SK_IOC IoC, ··· 580 600 SK_IOC IoC, 581 601 int Port, 582 602 SK_U16 IStatus); 583 - 584 - extern void SkMacSetRxTxEn( 585 - SK_AC *pAC, 586 - SK_IOC IoC, 587 - int Port, 588 - int Para); 589 603 590 604 extern int SkMacRxTxEnable( 591 605 SK_AC *pAC, ··· 632 658 int Port, 633 659 int StartNum, 634 660 int StopNum); 635 - 636 - extern void SkXmInitDupMd( 637 - SK_AC *pAC, 638 - SK_IOC IoC, 639 - int Port); 640 - 641 - extern void SkXmInitPauseMd( 642 - SK_AC *pAC, 643 - SK_IOC IoC, 644 - int Port); 645 661 646 662 extern void SkXmAutoNegLipaXmac( 647 663 SK_AC *pAC, ··· 693 729 int Port, 694 730 SK_BOOL StartTest); 695 731 696 - extern int SkGmEnterLowPowerMode( 697 - SK_AC *pAC, 698 - SK_IOC IoC, 699 - int Port, 700 - SK_U8 Mode); 701 - 702 - extern int SkGmLeaveLowPowerMode( 703 - SK_AC *pAC, 704 - SK_IOC IoC, 705 - int Port); 706 - 707 732 #ifdef SK_DIAG 708 733 extern void SkGePhyRead( 709 734 SK_AC *pAC, ··· 735 782 /* 736 783 * public functions in skgeinit.c 737 784 */ 738 - extern void SkGePollRxD(); 739 785 extern void SkGePollTxD(); 740 786 extern void SkGeYellowLED(); 741 787 extern int SkGeCfgSync(); ··· 744 792 extern void SkGeDeInit(); 745 793 extern int SkGeInitPort(); 746 794 extern void SkGeXmitLED(); 747 - extern void SkGeInitRamIface(); 748 795 extern int SkGeInitAssignRamToQueues(); 749 796 750 797 /* ··· 752 801 extern void SkMacRxTxDisable(); 753 802 extern void SkMacSoftRst(); 754 803 extern void SkMacHardRst(); 755 - extern void SkMacClearRst(); 756 804 extern void SkMacInitPhy(); 757 805 extern int SkMacRxTxEnable(); 758 806 extern void SkMacPromiscMode(); 759 807 extern void SkMacHashing(); 760 808 extern void SkMacIrqDisable(); 761 809 extern void SkMacFlushTxFifo(); 762 - extern void SkMacFlushRxFifo(); 763 810 extern void SkMacIrq(); 764 811 extern int SkMacAutoNegDone(); 765 812 extern void SkMacAutoNegLipaPhy(); 766 - extern void SkMacSetRxTxEn(); 767 813 extern void SkXmInitMac(); 768 814 extern void SkXmPhyRead(); 769 815 extern void SkXmPhyWrite(); ··· 768 820 extern void SkGmPhyRead(); 769 821 extern void SkGmPhyWrite(); 770 822 extern void SkXmClrExactAddr(); 771 - extern void SkXmInitDupMd(); 772 - extern void SkXmInitPauseMd(); 773 823 extern void SkXmAutoNegLipaXmac(); 774 824 extern int SkXmUpdateStats(); 775 825 extern int SkGmUpdateStats(); ··· 778 832 extern int SkXmOverflowStatus(); 779 833 extern int SkGmOverflowStatus(); 780 834 extern int SkGmCableDiagStatus(); 781 - extern int SkGmEnterLowPowerMode(); 782 - extern int SkGmLeaveLowPowerMode(); 783 835 784 836 #ifdef SK_DIAG 785 837 extern void SkGePhyRead();
-4
drivers/net/sk98lin/h/skgepnmi.h
··· 946 946 * Function prototypes 947 947 */ 948 948 extern int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int Level); 949 - extern int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf, 950 - unsigned int* pLen, SK_U32 Instance, SK_U32 NetIndex); 951 - extern int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, 952 - void* pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex); 953 949 extern int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf, 954 950 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex); 955 951 extern int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
-1
drivers/net/sk98lin/h/skgesirq.h
··· 105 105 106 106 extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus); 107 107 extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para); 108 - extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port); 109 108 extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port); 110 109 111 110 #endif /* _INC_SKGESIRQ_H_ */
-3
drivers/net/sk98lin/h/ski2c.h
··· 162 162 } SK_I2C; 163 163 164 164 extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level); 165 - extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size, 166 - int Reg, int Burst); 167 - extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen); 168 165 #ifdef SK_DIAG 169 166 extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg, 170 167 int Burst);
-15
drivers/net/sk98lin/h/skvpd.h
··· 183 183 int addr); 184 184 #endif /* SKDIAG */ 185 185 186 - extern int VpdSetupPara( 187 - SK_AC *pAC, 188 - const char *key, 189 - const char *buf, 190 - int len, 191 - int type, 192 - int op); 193 - 194 186 extern SK_VPD_STATUS *VpdStat( 195 187 SK_AC *pAC, 196 188 SK_IOC IoC); ··· 219 227 SK_AC *pAC, 220 228 SK_IOC IoC); 221 229 222 - extern void VpdErrLog( 223 - SK_AC *pAC, 224 - SK_IOC IoC, 225 - char *msg); 226 - 227 230 #ifdef SKDIAG 228 231 extern int VpdReadBlock( 229 232 SK_AC *pAC, ··· 236 249 #endif /* SKDIAG */ 237 250 #else /* SK_KR_PROTO */ 238 251 extern SK_U32 VpdReadDWord(); 239 - extern int VpdSetupPara(); 240 252 extern SK_VPD_STATUS *VpdStat(); 241 253 extern int VpdKeys(); 242 254 extern int VpdRead(); ··· 243 257 extern int VpdWrite(); 244 258 extern int VpdDelete(); 245 259 extern int VpdUpdate(); 246 - extern void VpdErrLog(); 247 260 #endif /* SK_KR_PROTO */ 248 261 249 262 #endif /* __INC_SKVPD_H_ */
+25 -10
drivers/net/sk98lin/skaddr.c
··· 87 87 static int Next0[SK_MAX_MACS] = {0}; 88 88 #endif /* DEBUG */ 89 89 90 + static int SkAddrGmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber, 91 + SK_MAC_ADDR *pMc, int Flags); 92 + static int SkAddrGmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber, 93 + int Flags); 94 + static int SkAddrGmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber); 95 + static int SkAddrGmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC, 96 + SK_U32 PortNumber, int NewPromMode); 97 + static int SkAddrXmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber, 98 + SK_MAC_ADDR *pMc, int Flags); 99 + static int SkAddrXmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber, 100 + int Flags); 101 + static int SkAddrXmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber); 102 + static int SkAddrXmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC, 103 + SK_U32 PortNumber, int NewPromMode); 104 + 90 105 /* functions ******************************************************************/ 91 106 92 107 /****************************************************************************** ··· 387 372 * SK_ADDR_SUCCESS 388 373 * SK_ADDR_ILLEGAL_PORT 389 374 */ 390 - int SkAddrXmacMcClear( 375 + static int SkAddrXmacMcClear( 391 376 SK_AC *pAC, /* adapter context */ 392 377 SK_IOC IoC, /* I/O context */ 393 378 SK_U32 PortNumber, /* Index of affected port */ ··· 444 429 * SK_ADDR_SUCCESS 445 430 * SK_ADDR_ILLEGAL_PORT 446 431 */ 447 - int SkAddrGmacMcClear( 432 + static int SkAddrGmacMcClear( 448 433 SK_AC *pAC, /* adapter context */ 449 434 SK_IOC IoC, /* I/O context */ 450 435 SK_U32 PortNumber, /* Index of affected port */ ··· 534 519 * Returns: 535 520 * Hash value of multicast address. 536 521 */ 537 - SK_U32 SkXmacMcHash( 522 + static SK_U32 SkXmacMcHash( 538 523 unsigned char *pMc) /* Multicast address */ 539 524 { 540 525 SK_U32 Idx; ··· 572 557 * Returns: 573 558 * Hash value of multicast address. 574 559 */ 575 - SK_U32 SkGmacMcHash( 560 + static SK_U32 SkGmacMcHash( 576 561 unsigned char *pMc) /* Multicast address */ 577 562 { 578 563 SK_U32 Data; ··· 687 672 * SK_MC_ILLEGAL_ADDRESS 688 673 * SK_MC_RLMT_OVERFLOW 689 674 */ 690 - int SkAddrXmacMcAdd( 675 + static int SkAddrXmacMcAdd( 691 676 SK_AC *pAC, /* adapter context */ 692 677 SK_IOC IoC, /* I/O context */ 693 678 SK_U32 PortNumber, /* Port Number */ ··· 793 778 * SK_MC_FILTERING_INEXACT 794 779 * SK_MC_ILLEGAL_ADDRESS 795 780 */ 796 - int SkAddrGmacMcAdd( 781 + static int SkAddrGmacMcAdd( 797 782 SK_AC *pAC, /* adapter context */ 798 783 SK_IOC IoC, /* I/O context */ 799 784 SK_U32 PortNumber, /* Port Number */ ··· 952 937 * SK_MC_FILTERING_INEXACT 953 938 * SK_ADDR_ILLEGAL_PORT 954 939 */ 955 - int SkAddrXmacMcUpdate( 940 + static int SkAddrXmacMcUpdate( 956 941 SK_AC *pAC, /* adapter context */ 957 942 SK_IOC IoC, /* I/O context */ 958 943 SK_U32 PortNumber) /* Port Number */ ··· 1097 1082 * SK_MC_FILTERING_INEXACT 1098 1083 * SK_ADDR_ILLEGAL_PORT 1099 1084 */ 1100 - int SkAddrGmacMcUpdate( 1085 + static int SkAddrGmacMcUpdate( 1101 1086 SK_AC *pAC, /* adapter context */ 1102 1087 SK_IOC IoC, /* I/O context */ 1103 1088 SK_U32 PortNumber) /* Port Number */ ··· 1483 1468 * SK_ADDR_SUCCESS 1484 1469 * SK_ADDR_ILLEGAL_PORT 1485 1470 */ 1486 - int SkAddrXmacPromiscuousChange( 1471 + static int SkAddrXmacPromiscuousChange( 1487 1472 SK_AC *pAC, /* adapter context */ 1488 1473 SK_IOC IoC, /* I/O context */ 1489 1474 SK_U32 PortNumber, /* port whose promiscuous mode changes */ ··· 1600 1585 * SK_ADDR_SUCCESS 1601 1586 * SK_ADDR_ILLEGAL_PORT 1602 1587 */ 1603 - int SkAddrGmacPromiscuousChange( 1588 + static int SkAddrGmacPromiscuousChange( 1604 1589 SK_AC *pAC, /* adapter context */ 1605 1590 SK_IOC IoC, /* I/O context */ 1606 1591 SK_U32 PortNumber, /* port whose promiscuous mode changes */
+1 -147
drivers/net/sk98lin/skgeinit.c
··· 59 59 60 60 /****************************************************************************** 61 61 * 62 - * SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring 63 - * 64 - * Description: 65 - * Enable or disable the descriptor polling of the receive descriptor 66 - * ring (RxD) for port 'Port'. 67 - * The new configuration is *not* saved over any SkGeStopPort() and 68 - * SkGeInitPort() calls. 69 - * 70 - * Returns: 71 - * nothing 72 - */ 73 - void SkGePollRxD( 74 - SK_AC *pAC, /* adapter context */ 75 - SK_IOC IoC, /* IO context */ 76 - int Port, /* Port Index (MAC_1 + n) */ 77 - SK_BOOL PollRxD) /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */ 78 - { 79 - SK_GEPORT *pPrt; 80 - 81 - pPrt = &pAC->GIni.GP[Port]; 82 - 83 - SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ? 84 - CSR_ENA_POL : CSR_DIS_POL); 85 - } /* SkGePollRxD */ 86 - 87 - 88 - /****************************************************************************** 89 - * 90 62 * SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings 91 63 * 92 64 * Description: ··· 924 952 * Returns: 925 953 * nothing 926 954 */ 927 - void SkGeInitRamIface( 955 + static void SkGeInitRamIface( 928 956 SK_AC *pAC, /* adapter context */ 929 957 SK_IOC IoC) /* IO context */ 930 958 { ··· 1381 1409 1382 1410 } /* SkGeInit0*/ 1383 1411 1384 - #ifdef SK_PCI_RESET 1385 - 1386 - /****************************************************************************** 1387 - * 1388 - * SkGePciReset() - Reset PCI interface 1389 - * 1390 - * Description: 1391 - * o Read PCI configuration. 1392 - * o Change power state to 3. 1393 - * o Change power state to 0. 1394 - * o Restore PCI configuration. 1395 - * 1396 - * Returns: 1397 - * 0: Success. 1398 - * 1: Power state could not be changed to 3. 1399 - */ 1400 - static int SkGePciReset( 1401 - SK_AC *pAC, /* adapter context */ 1402 - SK_IOC IoC) /* IO context */ 1403 - { 1404 - int i; 1405 - SK_U16 PmCtlSts; 1406 - SK_U32 Bp1; 1407 - SK_U32 Bp2; 1408 - SK_U16 PciCmd; 1409 - SK_U8 Cls; 1410 - SK_U8 Lat; 1411 - SK_U8 ConfigSpace[PCI_CFG_SIZE]; 1412 - 1413 - /* 1414 - * Note: Switching to D3 state is like a software reset. 1415 - * Switching from D3 to D0 is a hardware reset. 1416 - * We have to save and restore the configuration space. 1417 - */ 1418 - for (i = 0; i < PCI_CFG_SIZE; i++) { 1419 - SkPciReadCfgDWord(pAC, i*4, &ConfigSpace[i]); 1420 - } 1421 - 1422 - /* We know the RAM Interface Arbiter is enabled. */ 1423 - SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3); 1424 - SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts); 1425 - 1426 - if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) { 1427 - return(1); 1428 - } 1429 - 1430 - /* Return to D0 state. */ 1431 - SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D0); 1432 - 1433 - /* Check for D0 state. */ 1434 - SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts); 1435 - 1436 - if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) { 1437 - return(1); 1438 - } 1439 - 1440 - /* Check PCI Config Registers. */ 1441 - SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd); 1442 - SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls); 1443 - SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1); 1444 - SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2); 1445 - SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat); 1446 - 1447 - if (PciCmd != 0 || Cls != (SK_U8)0 || Lat != (SK_U8)0 || 1448 - (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1) { 1449 - return(1); 1450 - } 1451 - 1452 - /* Restore PCI Config Space. */ 1453 - for (i = 0; i < PCI_CFG_SIZE; i++) { 1454 - SkPciWriteCfgDWord(pAC, i*4, ConfigSpace[i]); 1455 - } 1456 - 1457 - return(0); 1458 - } /* SkGePciReset */ 1459 - 1460 - #endif /* SK_PCI_RESET */ 1461 1412 1462 1413 /****************************************************************************** 1463 1414 * ··· 1418 1523 1419 1524 /* save CLK_RUN bits (YUKON-Lite) */ 1420 1525 SK_IN16(IoC, B0_CTST, &CtrlStat); 1421 - 1422 - #ifdef SK_PCI_RESET 1423 - (void)SkGePciReset(pAC, IoC); 1424 - #endif /* SK_PCI_RESET */ 1425 1526 1426 1527 /* do the SW-reset */ 1427 1528 SK_OUT8(IoC, B0_CTST, CS_RST_SET); ··· 1882 1991 int i; 1883 1992 SK_U16 Word; 1884 1993 1885 - #ifdef SK_PHY_LP_MODE 1886 - SK_U8 Byte; 1887 - SK_U16 PmCtlSts; 1888 - #endif /* SK_PHY_LP_MODE */ 1889 - 1890 1994 #if (!defined(SK_SLIM) && !defined(VCPU)) 1891 1995 /* ensure I2C is ready */ 1892 1996 SkI2cWaitIrq(pAC, IoC); ··· 1895 2009 SkGeStopPort(pAC, IoC, i, SK_STOP_ALL, SK_HARD_RST); 1896 2010 } 1897 2011 } 1898 - 1899 - #ifdef SK_PHY_LP_MODE 1900 - /* 1901 - * for power saving purposes within mobile environments 1902 - * we set the PHY to coma mode and switch to D3 power state. 1903 - */ 1904 - if (pAC->GIni.GIYukonLite && 1905 - pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { 1906 - 1907 - /* for all ports switch PHY to coma mode */ 1908 - for (i = 0; i < pAC->GIni.GIMacsFound; i++) { 1909 - 1910 - SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP); 1911 - } 1912 - 1913 - if (pAC->GIni.GIVauxAvail) { 1914 - /* switch power to VAUX */ 1915 - Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF; 1916 - 1917 - SK_OUT8(IoC, B0_POWER_CTRL, Byte); 1918 - } 1919 - 1920 - /* switch to D3 state */ 1921 - SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts); 1922 - 1923 - PmCtlSts |= PCI_PM_STATE_D3; 1924 - 1925 - SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON); 1926 - 1927 - SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts); 1928 - } 1929 - #endif /* SK_PHY_LP_MODE */ 1930 2012 1931 2013 /* Reset all bits in the PCI STATUS register */ 1932 2014 /*
-7
drivers/net/sk98lin/skgemib.c
··· 871 871 sizeof(SK_PNMI_CONF), 872 872 SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyType), 873 873 SK_PNMI_RO, MacPrivateConf, 0}, 874 - #ifdef SK_PHY_LP_MODE 875 - {OID_SKGE_PHY_LP_MODE, 876 - SK_PNMI_MAC_ENTRIES, 877 - sizeof(SK_PNMI_CONF), 878 - SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyMode), 879 - SK_PNMI_RW, MacPrivateConf, 0}, 880 - #endif 881 874 {OID_SKGE_LINK_CAP, 882 875 SK_PNMI_MAC_ENTRIES, 883 876 sizeof(SK_PNMI_CONF),
+2 -151
drivers/net/sk98lin/skgepnmi.c
··· 56 56 * Public Function prototypes 57 57 */ 58 58 int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int level); 59 - int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf, 60 - unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex); 61 - int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf, 62 - unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex); 63 59 int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf, 64 60 unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex); 65 61 int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf, ··· 583 587 * exist (e.g. port instance 3 on a two port 584 588 * adapter. 585 589 */ 586 - int SkPnmiGetVar( 590 + static int SkPnmiGetVar( 587 591 SK_AC *pAC, /* Pointer to adapter context */ 588 592 SK_IOC IoC, /* IO context handle */ 589 593 SK_U32 Id, /* Object ID that is to be processed */ ··· 625 629 * exist (e.g. port instance 3 on a two port 626 630 * adapter. 627 631 */ 628 - int SkPnmiPreSetVar( 632 + static int SkPnmiPreSetVar( 629 633 SK_AC *pAC, /* Pointer to adapter context */ 630 634 SK_IOC IoC, /* IO context handle */ 631 635 SK_U32 Id, /* Object ID that is to be processed */ ··· 5058 5062 case OID_SKGE_SPEED_CAP: 5059 5063 case OID_SKGE_SPEED_MODE: 5060 5064 case OID_SKGE_SPEED_STATUS: 5061 - #ifdef SK_PHY_LP_MODE 5062 - case OID_SKGE_PHY_LP_MODE: 5063 - #endif 5064 5065 if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) { 5065 5066 5066 5067 *pLen = (Limit - LogPortIndex) * sizeof(SK_U8); ··· 5132 5139 } 5133 5140 Offset += sizeof(SK_U32); 5134 5141 break; 5135 - 5136 - #ifdef SK_PHY_LP_MODE 5137 - case OID_SKGE_PHY_LP_MODE: 5138 - if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */ 5139 - if (LogPortIndex == 0) { 5140 - continue; 5141 - } 5142 - else { 5143 - /* Get value for physical ports */ 5144 - PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex); 5145 - Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState; 5146 - *pBufPtr = Val8; 5147 - } 5148 - } 5149 - else { /* DualNetMode */ 5150 - 5151 - Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState; 5152 - *pBufPtr = Val8; 5153 - } 5154 - Offset += sizeof(SK_U8); 5155 - break; 5156 - #endif 5157 5142 5158 5143 case OID_SKGE_LINK_CAP: 5159 5144 if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */ ··· 5448 5477 return (SK_PNMI_ERR_BAD_VALUE); 5449 5478 } 5450 5479 break; 5451 - 5452 - #ifdef SK_PHY_LP_MODE 5453 - case OID_SKGE_PHY_LP_MODE: 5454 - if (*pLen < Limit - LogPortIndex) { 5455 - 5456 - *pLen = Limit - LogPortIndex; 5457 - return (SK_PNMI_ERR_TOO_SHORT); 5458 - } 5459 - break; 5460 - #endif 5461 5480 5462 5481 case OID_SKGE_MTU: 5463 5482 if (*pLen < sizeof(SK_U32)) { ··· 5806 5845 Offset += sizeof(SK_U32); 5807 5846 break; 5808 5847 5809 - #ifdef SK_PHY_LP_MODE 5810 - case OID_SKGE_PHY_LP_MODE: 5811 - /* The preset ends here */ 5812 - if (Action == SK_PNMI_PRESET) { 5813 - 5814 - return (SK_PNMI_ERR_OK); 5815 - } 5816 - 5817 - if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */ 5818 - if (LogPortIndex == 0) { 5819 - Offset = 0; 5820 - continue; 5821 - } 5822 - else { 5823 - /* Set value for physical ports */ 5824 - PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex); 5825 - 5826 - switch (*(pBuf + Offset)) { 5827 - case 0: 5828 - /* If LowPowerMode is active, we can leave it. */ 5829 - if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) { 5830 - 5831 - Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex); 5832 - 5833 - if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) { 5834 - 5835 - SkDrvInitAdapter(pAC); 5836 - } 5837 - break; 5838 - } 5839 - else { 5840 - *pLen = 0; 5841 - return (SK_PNMI_ERR_GENERAL); 5842 - } 5843 - case 1: 5844 - case 2: 5845 - case 3: 5846 - case 4: 5847 - /* If no LowPowerMode is active, we can enter it. */ 5848 - if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) { 5849 - 5850 - if ((*(pBuf + Offset)) < 3) { 5851 - 5852 - SkDrvDeInitAdapter(pAC); 5853 - } 5854 - 5855 - Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf); 5856 - break; 5857 - } 5858 - else { 5859 - *pLen = 0; 5860 - return (SK_PNMI_ERR_GENERAL); 5861 - } 5862 - default: 5863 - *pLen = 0; 5864 - return (SK_PNMI_ERR_BAD_VALUE); 5865 - } 5866 - } 5867 - } 5868 - else { /* DualNetMode */ 5869 - 5870 - switch (*(pBuf + Offset)) { 5871 - case 0: 5872 - /* If we are in a LowPowerMode, we can leave it. */ 5873 - if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) { 5874 - 5875 - Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex); 5876 - 5877 - if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) { 5878 - 5879 - SkDrvInitAdapter(pAC); 5880 - } 5881 - break; 5882 - } 5883 - else { 5884 - *pLen = 0; 5885 - return (SK_PNMI_ERR_GENERAL); 5886 - } 5887 - 5888 - case 1: 5889 - case 2: 5890 - case 3: 5891 - case 4: 5892 - /* If we are not already in LowPowerMode, we can enter it. */ 5893 - if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) { 5894 - 5895 - if ((*(pBuf + Offset)) < 3) { 5896 - 5897 - SkDrvDeInitAdapter(pAC); 5898 - } 5899 - else { 5900 - 5901 - Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf); 5902 - } 5903 - break; 5904 - } 5905 - else { 5906 - *pLen = 0; 5907 - return (SK_PNMI_ERR_GENERAL); 5908 - } 5909 - 5910 - default: 5911 - *pLen = 0; 5912 - return (SK_PNMI_ERR_BAD_VALUE); 5913 - } 5914 - } 5915 - Offset += sizeof(SK_U8); 5916 - break; 5917 - #endif 5918 - 5919 5848 default: 5920 5849 SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR, 5921 5850 ("MacPrivateConf: Unknown OID should be handled before set"));
+1 -23
drivers/net/sk98lin/skgesirq.c
··· 265 265 * 266 266 * Returns: N/A 267 267 */ 268 - void SkHWLinkUp( 268 + static void SkHWLinkUp( 269 269 SK_AC *pAC, /* adapter context */ 270 270 SK_IOC IoC, /* IO context */ 271 271 int Port) /* Port Index (MAC_1 + n) */ ··· 612 612 * we ignore those 613 613 */ 614 614 pPrt->HalfDupTimerActive = SK_TRUE; 615 - #ifdef XXX 616 - Len = sizeof(SK_U64); 617 - SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets, 618 - &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 0), 619 - pAC->Rlmt.Port[0].Net->NetNumber); 620 - 621 - pPrt->LastOctets = Octets; 622 - #endif /* XXX */ 623 615 /* Snap statistic counters */ 624 616 (void)SkXmUpdateStats(pAC, IoC, 0); 625 617 ··· 645 653 pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) && 646 654 !pPrt->HalfDupTimerActive) { 647 655 pPrt->HalfDupTimerActive = SK_TRUE; 648 - #ifdef XXX 649 - Len = sizeof(SK_U64); 650 - SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets, 651 - &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 1), 652 - pAC->Rlmt.Port[1].Net->NetNumber); 653 - 654 - pPrt->LastOctets = Octets; 655 - #endif /* XXX */ 656 656 /* Snap statistic counters */ 657 657 (void)SkXmUpdateStats(pAC, IoC, 1); 658 658 ··· 2069 2085 pPrt->HalfDupTimerActive = SK_FALSE; 2070 2086 if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF || 2071 2087 pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) { 2072 - #ifdef XXX 2073 - Len = sizeof(SK_U64); 2074 - SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets, 2075 - &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port), 2076 - pAC->Rlmt.Port[Port].Net->NetNumber); 2077 - #endif /* XXX */ 2078 2088 /* Snap statistic counters */ 2079 2089 (void)SkXmUpdateStats(pAC, IoC, Port); 2080 2090
+3 -3
drivers/net/sk98lin/ski2c.c
··· 396 396 * 1: error, transfer does not complete, I2C transfer 397 397 * killed, wait loop terminated. 398 398 */ 399 - int SkI2cWait( 399 + static int SkI2cWait( 400 400 SK_AC *pAC, /* Adapter Context */ 401 401 SK_IOC IoC, /* I/O Context */ 402 402 int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */ ··· 481 481 * returns 0: success 482 482 * 1: error 483 483 */ 484 - int SkI2cWrite( 484 + static int SkI2cWrite( 485 485 SK_AC *pAC, /* Adapter Context */ 486 486 SK_IOC IoC, /* I/O Context */ 487 487 SK_U32 I2cData, /* I2C Data to write */ ··· 538 538 * 1 if the read is completed 539 539 * 0 if the read must be continued (I2C Bus still allocated) 540 540 */ 541 - int SkI2cReadSensor( 541 + static int SkI2cReadSensor( 542 542 SK_AC *pAC, /* Adapter Context */ 543 543 SK_IOC IoC, /* I/O Context */ 544 544 SK_SENSOR *pSen) /* Sensor to be read */
-72
drivers/net/sk98lin/sklm80.c
··· 34 34 #include "h/lm80.h" 35 35 #include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */ 36 36 37 - #ifdef SK_DIAG 38 - #define BREAK_OR_WAIT(pAC,IoC,Event) SkI2cWait(pAC,IoC,Event) 39 - #else /* nSK_DIAG */ 40 37 #define BREAK_OR_WAIT(pAC,IoC,Event) break 41 - #endif /* nSK_DIAG */ 42 - 43 - #ifdef SK_DIAG 44 - /* 45 - * read the register 'Reg' from the device 'Dev' 46 - * 47 - * return read error -1 48 - * success the read value 49 - */ 50 - int SkLm80RcvReg( 51 - SK_IOC IoC, /* Adapter Context */ 52 - int Dev, /* I2C device address */ 53 - int Reg) /* register to read */ 54 - { 55 - int Val = 0; 56 - int TempExt; 57 - 58 - /* Signal device number */ 59 - if (SkI2cSndDev(IoC, Dev, I2C_WRITE)) { 60 - return(-1); 61 - } 62 - 63 - if (SkI2cSndByte(IoC, Reg)) { 64 - return(-1); 65 - } 66 - 67 - /* repeat start */ 68 - if (SkI2cSndDev(IoC, Dev, I2C_READ)) { 69 - return(-1); 70 - } 71 - 72 - switch (Reg) { 73 - case LM80_TEMP_IN: 74 - Val = (int)SkI2cRcvByte(IoC, 1); 75 - 76 - /* First: correct the value: it might be negative */ 77 - if ((Val & 0x80) != 0) { 78 - /* Value is negative */ 79 - Val = Val - 256; 80 - } 81 - Val = Val * SK_LM80_TEMP_LSB; 82 - SkI2cStop(IoC); 83 - 84 - TempExt = (int)SkLm80RcvReg(IoC, LM80_ADDR, LM80_TEMP_CTRL); 85 - 86 - if (Val > 0) { 87 - Val += ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB); 88 - } 89 - else { 90 - Val -= ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB); 91 - } 92 - return(Val); 93 - break; 94 - case LM80_VT0_IN: 95 - case LM80_VT1_IN: 96 - case LM80_VT2_IN: 97 - case LM80_VT3_IN: 98 - Val = (int)SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB; 99 - break; 100 - 101 - default: 102 - Val = (int)SkI2cRcvByte(IoC, 1); 103 - break; 104 - } 105 - 106 - SkI2cStop(IoC); 107 - return(Val); 108 - } 109 - #endif /* SK_DIAG */ 110 38 111 39 /* 112 40 * read a sensors value (LM80 specific)
-1
drivers/net/sk98lin/skrlmt.c
··· 282 282 283 283 SK_MAC_ADDR SkRlmtMcAddr = {{0x01, 0x00, 0x5A, 0x52, 0x4C, 0x4D}}; 284 284 SK_MAC_ADDR BridgeMcAddr = {{0x01, 0x80, 0xC2, 0x00, 0x00, 0x00}}; 285 - SK_MAC_ADDR BcAddr = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}}; 286 285 287 286 /* local variables ************************************************************/ 288 287
+1 -107
drivers/net/sk98lin/skvpd.c
··· 132 132 133 133 #endif /* SKDIAG */ 134 134 135 - #if 0 136 - 137 - /* 138 - Write the dword 'data' at address 'addr' into the VPD EEPROM, and 139 - verify that the data is written. 140 - 141 - Needed Time: 142 - 143 - . MIN MAX 144 - . ------------------------------------------------------------------- 145 - . write 1.8 ms 3.6 ms 146 - . internal write cyles 0.7 ms 7.0 ms 147 - . ------------------------------------------------------------------- 148 - . over all program time 2.5 ms 10.6 ms 149 - . read 1.3 ms 2.6 ms 150 - . ------------------------------------------------------------------- 151 - . over all 3.8 ms 13.2 ms 152 - . 153 - 154 - 155 - Returns 0: success 156 - 1: error, I2C transfer does not terminate 157 - 2: error, data verify error 158 - 159 - */ 160 - static int VpdWriteDWord( 161 - SK_AC *pAC, /* pAC pointer */ 162 - SK_IOC IoC, /* IO Context */ 163 - int addr, /* VPD address */ 164 - SK_U32 data) /* VPD data to write */ 165 - { 166 - /* start VPD write */ 167 - /* Don't swap here, it's a data stream of bytes */ 168 - SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL, 169 - ("VPD write dword at addr 0x%x, data = 0x%x\n",addr,data)); 170 - VPD_OUT32(pAC, IoC, PCI_VPD_DAT_REG, (SK_U32)data); 171 - /* But do it here */ 172 - addr |= VPD_WRITE; 173 - 174 - VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE)); 175 - 176 - /* this may take up to 10,6 ms */ 177 - if (VpdWait(pAC, IoC, VPD_WRITE)) { 178 - SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR, 179 - ("Write Timed Out\n")); 180 - return(1); 181 - }; 182 - 183 - /* verify data */ 184 - if (VpdReadDWord(pAC, IoC, addr) != data) { 185 - SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL, 186 - ("Data Verify Error\n")); 187 - return(2); 188 - } 189 - return(0); 190 - } /* VpdWriteDWord */ 191 - 192 - #endif /* 0 */ 193 - 194 135 /* 195 136 * Read one Stream of 'len' bytes of VPD data, starting at 'addr' from 196 137 * or to the I2C EEPROM. ··· 669 728 * 6: fatal VPD error 670 729 * 671 730 */ 672 - int VpdSetupPara( 731 + static int VpdSetupPara( 673 732 SK_AC *pAC, /* common data base */ 674 733 const char *key, /* keyword to insert */ 675 734 const char *buf, /* buffer with the keyword value */ ··· 1087 1146 } 1088 1147 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("done\n")); 1089 1148 return(0); 1090 - } 1091 - 1092 - 1093 - 1094 - /* 1095 - * Read the contents of the VPD EEPROM and copy it to the VPD buffer 1096 - * if not already done. If the keyword "VF" is not present it will be 1097 - * created and the error log message will be stored to this keyword. 1098 - * If "VF" is not present the error log message will be stored to the 1099 - * keyword "VL". "VL" will created or overwritten if "VF" is present. 1100 - * The VPD read/write area is saved to the VPD EEPROM. 1101 - * 1102 - * returns nothing, errors will be ignored. 1103 - */ 1104 - void VpdErrLog( 1105 - SK_AC *pAC, /* common data base */ 1106 - SK_IOC IoC, /* IO Context */ 1107 - char *msg) /* error log message */ 1108 - { 1109 - SK_VPD_PARA *v, vf; /* VF */ 1110 - int len; 1111 - 1112 - SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, 1113 - ("VPD error log msg %s\n", msg)); 1114 - if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) { 1115 - if (VpdInit(pAC, IoC) != 0) { 1116 - SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR, 1117 - ("VPD init error\n")); 1118 - return; 1119 - } 1120 - } 1121 - 1122 - len = strlen(msg); 1123 - if (len > VPD_MAX_LEN) { 1124 - /* cut it */ 1125 - len = VPD_MAX_LEN; 1126 - } 1127 - if ((v = vpd_find_para(pAC, VPD_VF, &vf)) != NULL) { 1128 - SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("overwrite VL\n")); 1129 - (void)VpdSetupPara(pAC, VPD_VL, msg, len, VPD_RW_KEY, OWR_KEY); 1130 - } 1131 - else { 1132 - SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("write VF\n")); 1133 - (void)VpdSetupPara(pAC, VPD_VF, msg, len, VPD_RW_KEY, ADD_KEY); 1134 - } 1135 - 1136 - (void)VpdUpdate(pAC, IoC); 1137 1149 } 1138 1150
+7 -454
drivers/net/sk98lin/skxmac2.c
··· 41 41 #endif 42 42 43 43 #ifdef GENESIS 44 - BCOM_HACK BcomRegA1Hack[] = { 44 + static BCOM_HACK BcomRegA1Hack[] = { 45 45 { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 }, 46 46 { 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 }, 47 47 { 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 }, 48 48 { 0, 0 } 49 49 }; 50 - BCOM_HACK BcomRegC0Hack[] = { 50 + static BCOM_HACK BcomRegC0Hack[] = { 51 51 { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 }, 52 52 { 0x15, 0x0A04 }, { 0x18, 0x0420 }, 53 53 { 0, 0 } ··· 790 790 * Returns: 791 791 * nothing 792 792 */ 793 - void SkMacFlushRxFifo( 793 + static void SkMacFlushRxFifo( 794 794 SK_AC *pAC, /* adapter context */ 795 795 SK_IOC IoC, /* IO context */ 796 796 int Port) /* Port Index (MAC_1 + n) */ ··· 1229 1229 pAC->GIni.GP[Port].PState = SK_PRT_RESET; 1230 1230 1231 1231 } /* SkMacHardRst */ 1232 - 1233 - 1234 - /****************************************************************************** 1235 - * 1236 - * SkMacClearRst() - Clear the MAC reset 1237 - * 1238 - * Description: calls a clear MAC reset routine dep. on board type 1239 - * 1240 - * Returns: 1241 - * nothing 1242 - */ 1243 - void SkMacClearRst( 1244 - SK_AC *pAC, /* adapter context */ 1245 - SK_IOC IoC, /* IO context */ 1246 - int Port) /* Port Index (MAC_1 + n) */ 1247 - { 1248 - 1249 - #ifdef GENESIS 1250 - if (pAC->GIni.GIGenesis) { 1251 - 1252 - SkXmClearRst(pAC, IoC, Port); 1253 - } 1254 - #endif /* GENESIS */ 1255 - 1256 - #ifdef YUKON 1257 - if (pAC->GIni.GIYukon) { 1258 - 1259 - SkGmClearRst(pAC, IoC, Port); 1260 - } 1261 - #endif /* YUKON */ 1262 - 1263 - } /* SkMacClearRst */ 1264 1232 1265 1233 1266 1234 #ifdef GENESIS ··· 1681 1713 * Returns: 1682 1714 * nothing 1683 1715 */ 1684 - void SkXmInitDupMd( 1716 + static void SkXmInitDupMd( 1685 1717 SK_AC *pAC, /* adapter context */ 1686 1718 SK_IOC IoC, /* IO context */ 1687 1719 int Port) /* Port Index (MAC_1 + n) */ ··· 1729 1761 * Returns: 1730 1762 * nothing 1731 1763 */ 1732 - void SkXmInitPauseMd( 1764 + static void SkXmInitPauseMd( 1733 1765 SK_AC *pAC, /* adapter context */ 1734 1766 SK_IOC IoC, /* IO context */ 1735 1767 int Port) /* Port Index (MAC_1 + n) */ ··· 2044 2076 } /* SkXmInitPhyBcom */ 2045 2077 #endif /* GENESIS */ 2046 2078 2047 - 2048 2079 #ifdef YUKON 2049 - #ifndef SK_SLIM 2050 - /****************************************************************************** 2051 - * 2052 - * SkGmEnterLowPowerMode() 2053 - * 2054 - * Description: 2055 - * This function sets the Marvell Alaska PHY to the low power mode 2056 - * given by parameter mode. 2057 - * The following low power modes are available: 2058 - * 2059 - * - Coma Mode (Deep Sleep): 2060 - * Power consumption: ~15 - 30 mW 2061 - * The PHY cannot wake up on its own. 2062 - * 2063 - * - IEEE 22.2.4.1.5 compatible power down mode 2064 - * Power consumption: ~240 mW 2065 - * The PHY cannot wake up on its own. 2066 - * 2067 - * - energy detect mode 2068 - * Power consumption: ~160 mW 2069 - * The PHY can wake up on its own by detecting activity 2070 - * on the CAT 5 cable. 2071 - * 2072 - * - energy detect plus mode 2073 - * Power consumption: ~150 mW 2074 - * The PHY can wake up on its own by detecting activity 2075 - * on the CAT 5 cable. 2076 - * Connected devices can be woken up by sending normal link 2077 - * pulses every one second. 2078 - * 2079 - * Note: 2080 - * 2081 - * Returns: 2082 - * 0: ok 2083 - * 1: error 2084 - */ 2085 - int SkGmEnterLowPowerMode( 2086 - SK_AC *pAC, /* adapter context */ 2087 - SK_IOC IoC, /* IO context */ 2088 - int Port, /* Port Index (e.g. MAC_1) */ 2089 - SK_U8 Mode) /* low power mode */ 2090 - { 2091 - SK_U16 Word; 2092 - SK_U32 DWord; 2093 - SK_U8 LastMode; 2094 - int Ret = 0; 2095 - 2096 - if (pAC->GIni.GIYukonLite && 2097 - pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { 2098 - 2099 - /* save current power mode */ 2100 - LastMode = pAC->GIni.GP[Port].PPhyPowerState; 2101 - pAC->GIni.GP[Port].PPhyPowerState = Mode; 2102 - 2103 - switch (Mode) { 2104 - /* coma mode (deep sleep) */ 2105 - case PHY_PM_DEEP_SLEEP: 2106 - /* setup General Purpose Control Register */ 2107 - GM_OUT16(IoC, 0, GM_GP_CTRL, GM_GPCR_FL_PASS | 2108 - GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS); 2109 - 2110 - /* apply COMA mode workaround */ 2111 - SkGmPhyWrite(pAC, IoC, Port, 29, 0x001f); 2112 - SkGmPhyWrite(pAC, IoC, Port, 30, 0xfff3); 2113 - 2114 - SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord); 2115 - 2116 - SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2117 - 2118 - /* Set PHY to Coma Mode */ 2119 - SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord | PCI_PHY_COMA); 2120 - 2121 - SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2122 - 2123 - break; 2124 - 2125 - /* IEEE 22.2.4.1.5 compatible power down mode */ 2126 - case PHY_PM_IEEE_POWER_DOWN: 2127 - /* 2128 - * - disable MAC 125 MHz clock 2129 - * - allow MAC power down 2130 - */ 2131 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word); 2132 - Word |= PHY_M_PC_DIS_125CLK; 2133 - Word &= ~PHY_M_PC_MAC_POW_UP; 2134 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word); 2135 - 2136 - /* 2137 - * register changes must be followed by a software 2138 - * reset to take effect 2139 - */ 2140 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word); 2141 - Word |= PHY_CT_RESET; 2142 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word); 2143 - 2144 - /* switch IEEE compatible power down mode on */ 2145 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word); 2146 - Word |= PHY_CT_PDOWN; 2147 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word); 2148 - break; 2149 - 2150 - /* energy detect and energy detect plus mode */ 2151 - case PHY_PM_ENERGY_DETECT: 2152 - case PHY_PM_ENERGY_DETECT_PLUS: 2153 - /* 2154 - * - disable MAC 125 MHz clock 2155 - */ 2156 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word); 2157 - Word |= PHY_M_PC_DIS_125CLK; 2158 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word); 2159 - 2160 - /* activate energy detect mode 1 */ 2161 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word); 2162 - 2163 - /* energy detect mode */ 2164 - if (Mode == PHY_PM_ENERGY_DETECT) { 2165 - Word |= PHY_M_PC_EN_DET; 2166 - } 2167 - /* energy detect plus mode */ 2168 - else { 2169 - Word |= PHY_M_PC_EN_DET_PLUS; 2170 - } 2171 - 2172 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word); 2173 - 2174 - /* 2175 - * reinitialize the PHY to force a software reset 2176 - * which is necessary after the register settings 2177 - * for the energy detect modes. 2178 - * Furthermore reinitialisation prevents that the 2179 - * PHY is running out of a stable state. 2180 - */ 2181 - SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE); 2182 - break; 2183 - 2184 - /* don't change current power mode */ 2185 - default: 2186 - pAC->GIni.GP[Port].PPhyPowerState = LastMode; 2187 - Ret = 1; 2188 - break; 2189 - } 2190 - } 2191 - /* low power modes are not supported by this chip */ 2192 - else { 2193 - Ret = 1; 2194 - } 2195 - 2196 - return(Ret); 2197 - 2198 - } /* SkGmEnterLowPowerMode */ 2199 - 2200 - /****************************************************************************** 2201 - * 2202 - * SkGmLeaveLowPowerMode() 2203 - * 2204 - * Description: 2205 - * Leave the current low power mode and switch to normal mode 2206 - * 2207 - * Note: 2208 - * 2209 - * Returns: 2210 - * 0: ok 2211 - * 1: error 2212 - */ 2213 - int SkGmLeaveLowPowerMode( 2214 - SK_AC *pAC, /* adapter context */ 2215 - SK_IOC IoC, /* IO context */ 2216 - int Port) /* Port Index (e.g. MAC_1) */ 2217 - { 2218 - SK_U32 DWord; 2219 - SK_U16 Word; 2220 - SK_U8 LastMode; 2221 - int Ret = 0; 2222 - 2223 - if (pAC->GIni.GIYukonLite && 2224 - pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { 2225 - 2226 - /* save current power mode */ 2227 - LastMode = pAC->GIni.GP[Port].PPhyPowerState; 2228 - pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE; 2229 - 2230 - switch (LastMode) { 2231 - /* coma mode (deep sleep) */ 2232 - case PHY_PM_DEEP_SLEEP: 2233 - SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord); 2234 - 2235 - SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2236 - 2237 - /* Release PHY from Coma Mode */ 2238 - SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord & ~PCI_PHY_COMA); 2239 - 2240 - SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2241 - 2242 - SK_IN32(IoC, B2_GP_IO, &DWord); 2243 - 2244 - /* set to output */ 2245 - DWord |= (GP_DIR_9 | GP_IO_9); 2246 - 2247 - /* set PHY reset */ 2248 - SK_OUT32(IoC, B2_GP_IO, DWord); 2249 - 2250 - DWord &= ~GP_IO_9; /* clear PHY reset (active high) */ 2251 - 2252 - /* clear PHY reset */ 2253 - SK_OUT32(IoC, B2_GP_IO, DWord); 2254 - break; 2255 - 2256 - /* IEEE 22.2.4.1.5 compatible power down mode */ 2257 - case PHY_PM_IEEE_POWER_DOWN: 2258 - /* 2259 - * - enable MAC 125 MHz clock 2260 - * - set MAC power up 2261 - */ 2262 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word); 2263 - Word &= ~PHY_M_PC_DIS_125CLK; 2264 - Word |= PHY_M_PC_MAC_POW_UP; 2265 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word); 2266 - 2267 - /* 2268 - * register changes must be followed by a software 2269 - * reset to take effect 2270 - */ 2271 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word); 2272 - Word |= PHY_CT_RESET; 2273 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word); 2274 - 2275 - /* switch IEEE compatible power down mode off */ 2276 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word); 2277 - Word &= ~PHY_CT_PDOWN; 2278 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word); 2279 - break; 2280 - 2281 - /* energy detect and energy detect plus mode */ 2282 - case PHY_PM_ENERGY_DETECT: 2283 - case PHY_PM_ENERGY_DETECT_PLUS: 2284 - /* 2285 - * - enable MAC 125 MHz clock 2286 - */ 2287 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word); 2288 - Word &= ~PHY_M_PC_DIS_125CLK; 2289 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word); 2290 - 2291 - /* disable energy detect mode */ 2292 - SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word); 2293 - Word &= ~PHY_M_PC_EN_DET_MSK; 2294 - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word); 2295 - 2296 - /* 2297 - * reinitialize the PHY to force a software reset 2298 - * which is necessary after the register settings 2299 - * for the energy detect modes. 2300 - * Furthermore reinitialisation prevents that the 2301 - * PHY is running out of a stable state. 2302 - */ 2303 - SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE); 2304 - break; 2305 - 2306 - /* don't change current power mode */ 2307 - default: 2308 - pAC->GIni.GP[Port].PPhyPowerState = LastMode; 2309 - Ret = 1; 2310 - break; 2311 - } 2312 - } 2313 - /* low power modes are not supported by this chip */ 2314 - else { 2315 - Ret = 1; 2316 - } 2317 - 2318 - return(Ret); 2319 - 2320 - } /* SkGmLeaveLowPowerMode */ 2321 - #endif /* !SK_SLIM */ 2322 - 2323 - 2324 2080 /****************************************************************************** 2325 2081 * 2326 2082 * SkGmInitPhyMarv() - Initialize the Marvell Phy registers ··· 3112 3420 } /* SkMacAutoNegDone */ 3113 3421 3114 3422 3115 - #ifdef GENESIS 3116 - /****************************************************************************** 3117 - * 3118 - * SkXmSetRxTxEn() - Special Set Rx/Tx Enable and some features in XMAC 3119 - * 3120 - * Description: 3121 - * sets MAC or PHY LoopBack and Duplex Mode in the MMU Command Reg. 3122 - * enables Rx/Tx 3123 - * 3124 - * Returns: N/A 3125 - */ 3126 - static void SkXmSetRxTxEn( 3127 - SK_AC *pAC, /* Adapter Context */ 3128 - SK_IOC IoC, /* IO context */ 3129 - int Port, /* Port Index (MAC_1 + n) */ 3130 - int Para) /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */ 3131 - { 3132 - SK_U16 Word; 3133 - 3134 - XM_IN16(IoC, Port, XM_MMU_CMD, &Word); 3135 - 3136 - switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) { 3137 - case SK_MAC_LOOPB_ON: 3138 - Word |= XM_MMU_MAC_LB; 3139 - break; 3140 - case SK_MAC_LOOPB_OFF: 3141 - Word &= ~XM_MMU_MAC_LB; 3142 - break; 3143 - } 3144 - 3145 - switch (Para & (SK_PHY_LOOPB_ON | SK_PHY_LOOPB_OFF)) { 3146 - case SK_PHY_LOOPB_ON: 3147 - Word |= XM_MMU_GMII_LOOP; 3148 - break; 3149 - case SK_PHY_LOOPB_OFF: 3150 - Word &= ~XM_MMU_GMII_LOOP; 3151 - break; 3152 - } 3153 - 3154 - switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) { 3155 - case SK_PHY_FULLD_ON: 3156 - Word |= XM_MMU_GMII_FD; 3157 - break; 3158 - case SK_PHY_FULLD_OFF: 3159 - Word &= ~XM_MMU_GMII_FD; 3160 - break; 3161 - } 3162 - 3163 - XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX); 3164 - 3165 - /* dummy read to ensure writing */ 3166 - XM_IN16(IoC, Port, XM_MMU_CMD, &Word); 3167 - 3168 - } /* SkXmSetRxTxEn */ 3169 - #endif /* GENESIS */ 3170 - 3171 - 3172 - #ifdef YUKON 3173 - /****************************************************************************** 3174 - * 3175 - * SkGmSetRxTxEn() - Special Set Rx/Tx Enable and some features in GMAC 3176 - * 3177 - * Description: 3178 - * sets MAC LoopBack and Duplex Mode in the General Purpose Control Reg. 3179 - * enables Rx/Tx 3180 - * 3181 - * Returns: N/A 3182 - */ 3183 - static void SkGmSetRxTxEn( 3184 - SK_AC *pAC, /* Adapter Context */ 3185 - SK_IOC IoC, /* IO context */ 3186 - int Port, /* Port Index (MAC_1 + n) */ 3187 - int Para) /* Parameter to set: MAC LoopBack, Duplex Mode */ 3188 - { 3189 - SK_U16 Ctrl; 3190 - 3191 - GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl); 3192 - 3193 - switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) { 3194 - case SK_MAC_LOOPB_ON: 3195 - Ctrl |= GM_GPCR_LOOP_ENA; 3196 - break; 3197 - case SK_MAC_LOOPB_OFF: 3198 - Ctrl &= ~GM_GPCR_LOOP_ENA; 3199 - break; 3200 - } 3201 - 3202 - switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) { 3203 - case SK_PHY_FULLD_ON: 3204 - Ctrl |= GM_GPCR_DUP_FULL; 3205 - break; 3206 - case SK_PHY_FULLD_OFF: 3207 - Ctrl &= ~GM_GPCR_DUP_FULL; 3208 - break; 3209 - } 3210 - 3211 - GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Ctrl | GM_GPCR_RX_ENA | 3212 - GM_GPCR_TX_ENA)); 3213 - 3214 - /* dummy read to ensure writing */ 3215 - GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl); 3216 - 3217 - } /* SkGmSetRxTxEn */ 3218 - #endif /* YUKON */ 3219 - 3220 - 3221 - #ifndef SK_SLIM 3222 - /****************************************************************************** 3223 - * 3224 - * SkMacSetRxTxEn() - Special Set Rx/Tx Enable and parameters 3225 - * 3226 - * Description: calls the Special Set Rx/Tx Enable routines dep. on board type 3227 - * 3228 - * Returns: N/A 3229 - */ 3230 - void SkMacSetRxTxEn( 3231 - SK_AC *pAC, /* Adapter Context */ 3232 - SK_IOC IoC, /* IO context */ 3233 - int Port, /* Port Index (MAC_1 + n) */ 3234 - int Para) 3235 - { 3236 - #ifdef GENESIS 3237 - if (pAC->GIni.GIGenesis) { 3238 - 3239 - SkXmSetRxTxEn(pAC, IoC, Port, Para); 3240 - } 3241 - #endif /* GENESIS */ 3242 - 3243 - #ifdef YUKON 3244 - if (pAC->GIni.GIYukon) { 3245 - 3246 - SkGmSetRxTxEn(pAC, IoC, Port, Para); 3247 - } 3248 - #endif /* YUKON */ 3249 - 3250 - } /* SkMacSetRxTxEn */ 3251 - #endif /* !SK_SLIM */ 3252 - 3253 - 3254 3423 /****************************************************************************** 3255 3424 * 3256 3425 * SkMacRxTxEnable() - Enable Rx/Tx activity if port is up ··· 3529 3976 * Returns: 3530 3977 * nothing 3531 3978 */ 3532 - void SkXmIrq( 3979 + static void SkXmIrq( 3533 3980 SK_AC *pAC, /* adapter context */ 3534 3981 SK_IOC IoC, /* IO context */ 3535 3982 int Port) /* Port Index (MAC_1 + n) */ ··· 3665 4112 * Returns: 3666 4113 * nothing 3667 4114 */ 3668 - void SkGmIrq( 4115 + static void SkGmIrq( 3669 4116 SK_AC *pAC, /* adapter context */ 3670 4117 SK_IOC IoC, /* IO context */ 3671 4118 int Port) /* Port Index (MAC_1 + n) */