Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drivers/rtc/rtc-ds1302.c: handle write protection

This chip has a control register and can prevent altering saved clock.
Without this patch we could have:

(arm)root@pac14:~# date
Tue May 21 03:08:27 MSK 2013
(arm)root@pac14:~# /etc/init.d/hwclock.sh show
Tue May 21 11:13:58 2013 -0.067322 seconds
(arm)root@pac14:~# /etc/init.d/hwclock.sh stop
[info] Saving the system clock.
[info] Hardware Clock updated to Tue May 21 03:09:01 MSK 2013.
(arm)root@pac14:~# /etc/init.d/hwclock.sh show
Tue May 21 11:14:15 2013 -0.624272 seconds

The patch enables write access to rtc before the driver tries to write
time and re-disables when time data is written.

Signed-off-by: Sergey Yanovich <ynvich@gmail.com>
Acked-by: Marc Zyngier <maz@misterjones.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Sergey Yanovich and committed by
Linus Torvalds
dfc657b1 25d053cf

+7
+7
drivers/rtc/rtc-ds1302.c
··· 23 23 #define RTC_CMD_READ 0x81 /* Read command */ 24 24 #define RTC_CMD_WRITE 0x80 /* Write command */ 25 25 26 + #define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */ 27 + #define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */ 28 + 26 29 #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */ 27 30 #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */ 31 + #define RTC_ADDR_CTRL 0x07 /* Address of control register */ 28 32 #define RTC_ADDR_YEAR 0x06 /* Address of year register */ 29 33 #define RTC_ADDR_DAY 0x05 /* Address of day of week register */ 30 34 #define RTC_ADDR_MON 0x04 /* Address of month register */ ··· 165 161 166 162 static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) 167 163 { 164 + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE); 168 165 /* Stop RTC */ 169 166 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); 170 167 ··· 179 174 180 175 /* Start RTC */ 181 176 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); 177 + 178 + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE); 182 179 183 180 return 0; 184 181 }