tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6:
cs5536: define dma_sff_read_status() method
ide: fix barriers support
ide: Remove void casts
hpt366: use ATA_DMA_* constants
hpt366: fix HPT370 DMA timeouts

Linus Torvalds df89f1ba 62f2730a

+17 -11
unified split
+1
drivers/ide/cs5536.c
··· 236 .dma_test_irq = ide_dma_test_irq, 237 .dma_lost_irq = ide_dma_lost_irq, 238 .dma_timer_expiry = ide_dma_sff_timer_expiry, 239 }; 240 241 static const struct ide_port_info cs5536_info = {
··· 236 .dma_test_irq = ide_dma_test_irq, 237 .dma_lost_irq = ide_dma_lost_irq, 238 .dma_timer_expiry = ide_dma_sff_timer_expiry, 239 + .dma_sff_read_status = ide_dma_sff_read_status, 240 }; 241 242 static const struct ide_port_info cs5536_info = {
+8 -6
drivers/ide/hpt366.c
··· 3 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 4 * Portions Copyright (C) 2003 Red Hat Inc 5 * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz 6 - * Portions Copyright (C) 2005-2008 MontaVista Software, Inc. 7 * 8 * Thanks to HighPoint Technologies for their assistance, and hardware. 9 * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his ··· 114 * the register setting lists into the table indexed by the clock selected 115 * - set the correct hwif->ultra_mask for each individual chip 116 * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards 117 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> 118 */ 119 ··· 135 #define DRV_NAME "hpt366" 136 137 /* various tuning parameters */ 138 - #define HPT_RESET_STATE_ENGINE 139 #undef HPT_DELAY_INTERRUPT 140 141 static const char *quirk_drives[] = { ··· 810 /* get DMA command mode */ 811 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); 812 /* stop DMA */ 813 - outb(dma_cmd & ~0x1, hwif->dma_base + ATA_DMA_CMD); 814 hpt370_clear_engine(drive); 815 } 816 ··· 827 ide_hwif_t *hwif = drive->hwif; 828 u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 829 830 - if (dma_stat & 0x01) { 831 /* wait a little */ 832 udelay(20); 833 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 834 - if (dma_stat & 0x01) 835 hpt370_irq_timeout(drive); 836 } 837 return ide_dma_end(drive); ··· 853 854 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 855 /* return 1 if INTR asserted */ 856 - if (dma_stat & 4) 857 return 1; 858 859 return 0;
··· 3 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 4 * Portions Copyright (C) 2003 Red Hat Inc 5 * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz 6 + * Portions Copyright (C) 2005-2009 MontaVista Software, Inc. 7 * 8 * Thanks to HighPoint Technologies for their assistance, and hardware. 9 * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his ··· 114 * the register setting lists into the table indexed by the clock selected 115 * - set the correct hwif->ultra_mask for each individual chip 116 * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards 117 + * - stop resetting HPT370's state machine before each DMA transfer as that has 118 + * caused more harm than good 119 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> 120 */ 121 ··· 133 #define DRV_NAME "hpt366" 134 135 /* various tuning parameters */ 136 + #undef HPT_RESET_STATE_ENGINE 137 #undef HPT_DELAY_INTERRUPT 138 139 static const char *quirk_drives[] = { ··· 808 /* get DMA command mode */ 809 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); 810 /* stop DMA */ 811 + outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD); 812 hpt370_clear_engine(drive); 813 } 814 ··· 825 ide_hwif_t *hwif = drive->hwif; 826 u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 827 828 + if (dma_stat & ATA_DMA_ACTIVE) { 829 /* wait a little */ 830 udelay(20); 831 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 832 + if (dma_stat & ATA_DMA_ACTIVE) 833 hpt370_irq_timeout(drive); 834 } 835 return ide_dma_end(drive); ··· 851 852 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 853 /* return 1 if INTR asserted */ 854 + if (dma_stat & ATA_DMA_INTR) 855 return 1; 856 857 return 0;
+7 -4
drivers/ide/ide-io.c
··· 102 drive->dev_flags |= IDE_DFLAG_PARKED; 103 } 104 105 - if (rq && rq->cmd_type == REQ_TYPE_ATA_TASKFILE) 106 - memcpy(rq->special, cmd, sizeof(*cmd)); 107 108 - if (cmd->tf_flags & IDE_TFLAG_DYN) 109 - kfree(cmd); 110 } 111 112 /* obsolete, blk_rq_bytes() should be used instead */
··· 102 drive->dev_flags |= IDE_DFLAG_PARKED; 103 } 104 105 + if (rq && rq->cmd_type == REQ_TYPE_ATA_TASKFILE) { 106 + struct ide_cmd *orig_cmd = rq->special; 107 108 + if (cmd->tf_flags & IDE_TFLAG_DYN) 109 + kfree(orig_cmd); 110 + else 111 + memcpy(orig_cmd, cmd, sizeof(*cmd)); 112 + } 113 } 114 115 /* obsolete, blk_rq_bytes() should be used instead */
+1 -1
drivers/ide/pmac.c
··· 1682 * The +2 is +1 for the stop command and +1 to allow for 1683 * aligning the start address to a multiple of 16 bytes. 1684 */ 1685 - pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent( 1686 dev, 1687 (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd), 1688 &hwif->dmatable_dma);
··· 1682 * The +2 is +1 for the stop command and +1 to allow for 1683 * aligning the start address to a multiple of 16 bytes. 1684 */ 1685 + pmif->dma_table_cpu = pci_alloc_consistent( 1686 dev, 1687 (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd), 1688 &hwif->dmatable_dma);