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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS fix from Thomas Bogendoerfer:
"Revert workaround for buggy cpu detection because regressions"
* tag 'mips-fixes_5.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Revert "add support for buggy MT7621S core detection"
+1
-22
+1
-22
arch/mips/include/asm/mips-cps.h
+1
-22
arch/mips/include/asm/mips-cps.h
···
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#include <linux/io.h>
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#include <linux/types.h>
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#include <asm/mips-boards/launch.h>
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-
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extern unsigned long __cps_access_bad_size(void)
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__compiletime_error("Bad size for CPS accessor");
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···
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*/
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static inline unsigned int mips_cps_numcores(unsigned int cluster)
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{
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unsigned int ncores;
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if (!mips_cm_present())
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return 0;
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/* Add one before masking to handle 0xff indicating no cores */
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ncores = (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
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if (IS_ENABLED(CONFIG_SOC_MT7621)) {
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struct cpulaunch *launch;
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/*
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* Ralink MT7621S SoC is single core, but the GCR_CONFIG method
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* always reports 2 cores. Check the second core's LAUNCH_FREADY
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* flag to detect if the second core is missing. This method
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* only works before the core has been started.
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*/
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launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);
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launch += 2; /* MT7621 has 2 VPEs per core */
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if (!(launch->flags & LAUNCH_FREADY))
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ncores = 1;
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}
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return ncores;
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+
return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
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}
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/**