Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
ARM: S5PV310: Cleanup map.h file
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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arch/arm/mach-s5pv310/include/mach/map.h
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arch/arm/mach-s5pv310/include/mach/map.h
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/* linux/arch/arm/mach-s5pv310/include/mach/map.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5PV310 - Memory map definitions
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#include <plat/map-s5p.h>
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#define S5PV310_PA_SYSRAM (0x02025000)
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#define S5PV310_PA_SYSRAM 0x02025000
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#define S5PV310_PA_I2S0 0x03830000
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#define S5PV310_PA_I2S1 0xE3100000
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#define S5PV310_PA_I2S2 0xE2A00000
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#define S5PV310_PA_PCM0 0x03840000
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#define S5PV310_PA_PCM1 0x13980000
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#define S5PV310_PA_PCM2 0x13990000
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#define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000))
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#define S5PC210_PA_ONENAND (0x0C000000)
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#define S5P_PA_ONENAND S5PC210_PA_ONENAND
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#define S5PC210_PA_ONENAND 0x0C000000
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#define S5PC210_PA_ONENAND_DMA 0x0C600000
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#define S5PC210_PA_ONENAND_DMA (0x0C600000)
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#define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA
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#define S5PV310_PA_CHIPID 0x10000000
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#define S5PV310_PA_CHIPID (0x10000000)
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#define S5P_PA_CHIPID S5PV310_PA_CHIPID
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#define S5PV310_PA_SYSCON 0x10010000
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#define S5PV310_PA_PMU 0x10020000
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#define S5PV310_PA_CMU 0x10030000
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#define S5PV310_PA_SYSCON (0x10010000)
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#define S5P_PA_SYSCON S5PV310_PA_SYSCON
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#define S5PV310_PA_WATCHDOG 0x10060000
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#define S5PV310_PA_RTC 0x10070000
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#define S5PV310_PA_PMU (0x10020000)
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#define S5PV310_PA_DMC0 0x10400000
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#define S5PV310_PA_CMU (0x10030000)
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#define S5PV310_PA_COMBINER 0x10448000
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#define S5PV310_PA_WATCHDOG (0x10060000)
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#define S5PV310_PA_RTC (0x10070000)
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#define S5PV310_PA_COREPERI 0x10500000
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#define S5PV310_PA_GIC_CPU 0x10500100
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#define S5PV310_PA_TWD 0x10500600
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#define S5PV310_PA_GIC_DIST 0x10501000
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#define S5PV310_PA_L2CC 0x10502000
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#define S5PV310_PA_DMC0 (0x10400000)
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#define S5PV310_PA_COMBINER (0x10448000)
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#define S5PV310_PA_COREPERI (0x10500000)
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#define S5PV310_PA_GIC_CPU (0x10500100)
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#define S5PV310_PA_TWD (0x10500600)
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#define S5PV310_PA_GIC_DIST (0x10501000)
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#define S5PV310_PA_L2CC (0x10502000)
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/* DMA */
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#define S5PV310_PA_MDMA 0x10810000
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#define S5PV310_PA_PDMA0 0x12680000
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#define S5PV310_PA_PDMA1 0x12690000
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#define S5PV310_PA_GPIO1 (0x11400000)
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#define S5PV310_PA_GPIO2 (0x11000000)
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#define S5PV310_PA_GPIO3 (0x03860000)
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#define S5PV310_PA_MIPI_CSIS0 0x11880000
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#define S5PV310_PA_MIPI_CSIS1 0x11890000
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#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
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#define S5PV310_PA_SROMC (0x12570000)
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#define S5P_PA_SROMC S5PV310_PA_SROMC
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/* S/PDIF */
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#define S5PV310_PA_SPDIF 0xE1100000
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/* I2S */
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#define S5PV310_PA_I2S0 0x03830000
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#define S5PV310_PA_I2S1 0xE3100000
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#define S5PV310_PA_I2S2 0xE2A00000
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/* PCM */
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#define S5PV310_PA_PCM0 0x03840000
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#define S5PV310_PA_PCM1 0x13980000
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#define S5PV310_PA_PCM2 0x13990000
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/* AC97 */
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#define S5PV310_PA_AC97 0x139A0000
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#define S5PV310_PA_UART (0x13800000)
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#define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET))
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#define S5P_PA_UART0 S5P_PA_UART(0)
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#define S5P_PA_UART1 S5P_PA_UART(1)
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#define S5P_PA_UART2 S5P_PA_UART(2)
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#define S5P_PA_UART3 S5P_PA_UART(3)
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#define S5P_PA_UART4 S5P_PA_UART(4)
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#define S5P_SZ_UART SZ_256
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#define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
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#define S5PV310_PA_TIMER (0x139D0000)
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#define S5P_PA_TIMER S5PV310_PA_TIMER
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#define S5PV310_PA_SDRAM (0x40000000)
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#define S5P_PA_SDRAM S5PV310_PA_SDRAM
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#define S5PV310_PA_MDMA 0x10810000
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#define S5PV310_PA_PDMA0 0x12680000
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#define S5PV310_PA_PDMA1 0x12690000
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#define S5PV310_PA_SYSMMU_MDMA 0x10A40000
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#define S5PV310_PA_SYSMMU_SSS 0x10A50000
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#define S5PV310_PA_SYSMMU_MFC_L 0x13620000
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#define S5PV310_PA_SYSMMU_MFC_R 0x13630000
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/* compatibiltiy defines. */
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#define S3C_PA_UART S5PV310_PA_UART
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#define S5PV310_PA_GPIO1 0x11400000
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#define S5PV310_PA_GPIO2 0x11000000
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#define S5PV310_PA_GPIO3 0x03860000
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#define S5PV310_PA_MIPI_CSIS0 0x11880000
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#define S5PV310_PA_MIPI_CSIS1 0x11890000
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#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
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#define S5PV310_PA_SROMC 0x12570000
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#define S5PV310_PA_UART 0x13800000
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#define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000))
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#define S5PV310_PA_AC97 0x139A0000
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#define S5PV310_PA_TIMER 0x139D0000
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#define S5PV310_PA_SDRAM 0x40000000
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#define S5PV310_PA_SPDIF 0xE1100000
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/* Compatibiltiy Defines */
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#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0)
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#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1)
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#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2)
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#define S3C_PA_IIC7 S5PV310_PA_IIC(7)
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#define S3C_PA_RTC S5PV310_PA_RTC
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#define S3C_PA_WDT S5PV310_PA_WATCHDOG
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#define S5P_PA_CHIPID S5PV310_PA_CHIPID
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#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0
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#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1
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#define S5P_PA_ONENAND S5PC210_PA_ONENAND
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#define S5P_PA_ONENAND_DMA S5PC210_PA_ONENAND_DMA
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#define S5P_PA_SDRAM S5PV310_PA_SDRAM
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#define S5P_PA_SROMC S5PV310_PA_SROMC
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#define S5P_PA_SYSCON S5PV310_PA_SYSCON
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#define S5P_PA_TIMER S5PV310_PA_TIMER
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/* UART */
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#define S3C_PA_UART S5PV310_PA_UART
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#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
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#define S5P_PA_UART0 S5P_PA_UART(0)
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#define S5P_PA_UART1 S5P_PA_UART(1)
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#define S5P_PA_UART2 S5P_PA_UART(2)
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#define S5P_PA_UART3 S5P_PA_UART(3)
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#define S5P_PA_UART4 S5P_PA_UART(4)
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#define S5P_SZ_UART SZ_256
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#endif /* __ASM_ARCH_MAP_H */