···833833 Say Y here to use the Feroceon L2 cache in writethrough mode.834834 Unless you specifically require this, say N for writeback mode.835835836836+config MIGHT_HAVE_CACHE_L2X0837837+ bool838838+ help839839+ This option should be selected by machines which have a L2x0840840+ or PL310 cache controller, but where its use is optional.841841+842842+ The only effect of this option is to make CACHE_L2X0 and843843+ related options available to the user for configuration.844844+845845+ Boards or SoCs which always require the cache controller846846+ support to be present should select CACHE_L2X0 directly847847+ instead of this option, thus preventing the user from848848+ inadvertently configuring a broken kernel.849849+836850config CACHE_L2X0837837- bool "Enable the L2x0 outer cache controller"838838- depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \839839- REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \840840- ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \841841- ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \842842- ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK843843- default y851851+ bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0852852+ default MIGHT_HAVE_CACHE_L2X0844853 select OUTER_CACHE845854 select OUTER_CACHE_SYNC846855 help
+1
arch/arm/plat-mxc/Kconfig
···2020 bool "i.MX3, i.MX6"2121 select AUTO_ZRELADDR if !ZBOOT_ROM2222 select ARM_PATCH_PHYS_VIRT2323+ select MIGHT_HAVE_CACHE_L2X02324 help2425 This enables support for systems based on the Freescale i.MX3 and i.MX62526 family.