···210210 firmware assigned instance number of the PCI211211 device that can help in understanding the firmware212212 intended order of the PCI device.213213+214214+What: /sys/bus/pci/devices/.../d3cold_allowed215215+Date: July 2012216216+Contact: Huang Ying <ying.huang@intel.com>217217+Description:218218+ d3cold_allowed is bit to control whether the corresponding PCI219219+ device can be put into D3Cold state. If it is cleared, the220220+ device will never be put into D3Cold state. If it is set, the221221+ device may be put into D3Cold state if other requirements are222222+ satisfied too. Reading this attribute will show the current223223+ value of d3cold_allowed bit. Writing this attribute will set224224+ the value of d3cold_allowed bit.
+1-1
Documentation/feature-removal-schedule.txt
···579579----------------------------580580581581What: at91-mci driver ("CONFIG_MMC_AT91")582582-When: 3.7582582+When: 3.8583583Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support584584 was added to atmel-mci as a first step to support more chips.585585 Then at91-mci was kept only for old IP versions (on at91rm9200 and
+1
Documentation/i2c/busses/i2c-i801
···2121 * Intel DH89xxCC (PCH)2222 * Intel Panther Point (PCH)2323 * Intel Lynx Point (PCH)2424+ * Intel Lynx Point-LP (PCH)2425 Datasheets: Publicly available at the Intel website25262627On Intel Patsburg and later chipsets, both the normal host SMBus controller
···66 select HAVE_DMA_API_DEBUG77 select HAVE_IDE if PCI || ISA || PCMCIA88 select HAVE_DMA_ATTRS99- select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)99+ select HAVE_DMA_CONTIGUOUS if MMU1010 select HAVE_MEMBLOCK1111 select RTC_LIB1212 select SYS_SUPPORTS_APM_EMULATION
+3-3
arch/arm/Kconfig.debug
···356356 is nothing connected to read from the DCC.357357358358 config DEBUG_SEMIHOSTING359359- bool "Kernel low-level debug output via semihosting I"359359+ bool "Kernel low-level debug output via semihosting I/O"360360 help361361 Semihosting enables code running on an ARM target to use362362 the I/O facilities on a host debugger/emulator through a363363- simple SVC calls. The host debugger or emulator must have363363+ simple SVC call. The host debugger or emulator must have364364 semihosting enabled for the special svc call to be trapped365365 otherwise the kernel will crash.366366367367- This is known to work with OpenOCD, as wellas367367+ This is known to work with OpenOCD, as well as368368 ARM's Fast Models, or any other controlling environment369369 that implements semihosting.370370
+2-2
arch/arm/Makefile
···284284zinstall uinstall install: vmlinux285285 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@286286287287-%.dtb:287287+%.dtb: scripts288288 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@289289290290-dtbs:290290+dtbs: scripts291291 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@292292293293# We use MRPROPER_FILES and CLEAN_FILES now
···203203}204204205205/*206206+ * This can be called during early boot to increase the size of the atomic207207+ * coherent DMA pool above the default value of 256KiB. It must be called208208+ * before postcore_initcall.209209+ */210210+extern void __init init_dma_coherent_pool_size(unsigned long size);211211+212212+/*206213 * This can be called during boot to increase the size of the consistent207214 * DMA region above it's default value of 2MB. It must be called before the208215 * memory allocator is initialised, i.e. before any core_initcall.
+3
arch/arm/include/asm/memory.h
···187187#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)188188#endif189189#endif190190+#endif /* __ASSEMBLY__ */190191191192#ifndef PHYS_OFFSET192193#ifdef PLAT_PHYS_OFFSET···196195#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)197196#endif198197#endif198198+199199+#ifndef __ASSEMBLY__199200200201/*201202 * PFNs are used to describe any physical page; this means
+4
arch/arm/include/asm/tlb.h
···199199{200200 pgtable_page_dtor(pte);201201202202+#ifdef CONFIG_ARM_LPAE203203+ tlb_add_flush(tlb, addr);204204+#else202205 /*203206 * With the classic ARM MMU, a pte page has two corresponding pmd204207 * entries, each covering 1MB.···209206 addr &= PMD_MASK;210207 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);211208 tlb_add_flush(tlb, addr + SZ_1M);209209+#endif212210213211 tlb_remove_page(tlb, pte);214212}
···159159 arch >= ARM_DEBUG_ARCH_V7_1;160160}161161162162+/* Can we determine the watchpoint access type from the fsr? */163163+static int debug_exception_updates_fsr(void)164164+{165165+ return 0;166166+}167167+162168/* Determine number of WRP registers available. */163169static int get_num_wrp_resources(void)164170{···610604 /* Aligned */611605 break;612606 case 1:613613- /* Allow single byte watchpoint. */614614- if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)615615- break;616607 case 2:617608 /* Allow halfword watchpoints and breakpoints. */618609 if (info->ctrl.len == ARM_BREAKPOINT_LEN_2)610610+ break;611611+ case 3:612612+ /* Allow single byte watchpoint. */613613+ if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)619614 break;620615 default:621616 ret = -EINVAL;···626619 info->address &= ~alignment_mask;627620 info->ctrl.len <<= offset;628621629629- /*630630- * Currently we rely on an overflow handler to take631631- * care of single-stepping the breakpoint when it fires.632632- * In the case of userspace breakpoints on a core with V7 debug,633633- * we can use the mismatch feature as a poor-man's hardware634634- * single-step, but this only works for per-task breakpoints.635635- */636636- if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) ||637637- !core_has_mismatch_brps() || !bp->hw.bp_target)) {638638- pr_warning("overflow handler required but none found\n");639639- ret = -EINVAL;622622+ if (!bp->overflow_handler) {623623+ /*624624+ * Mismatch breakpoints are required for single-stepping625625+ * breakpoints.626626+ */627627+ if (!core_has_mismatch_brps())628628+ return -EINVAL;629629+630630+ /* We don't allow mismatch breakpoints in kernel space. */631631+ if (arch_check_bp_in_kernelspace(bp))632632+ return -EPERM;633633+634634+ /*635635+ * Per-cpu breakpoints are not supported by our stepping636636+ * mechanism.637637+ */638638+ if (!bp->hw.bp_target)639639+ return -EINVAL;640640+641641+ /*642642+ * We only support specific access types if the fsr643643+ * reports them.644644+ */645645+ if (!debug_exception_updates_fsr() &&646646+ (info->ctrl.type == ARM_BREAKPOINT_LOAD ||647647+ info->ctrl.type == ARM_BREAKPOINT_STORE))648648+ return -EINVAL;640649 }650650+641651out:642652 return ret;643653}···730706 goto unlock;731707732708 /* Check that the access type matches. */733733- access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W :734734- HW_BREAKPOINT_R;735735- if (!(access & hw_breakpoint_type(wp)))736736- goto unlock;709709+ if (debug_exception_updates_fsr()) {710710+ access = (fsr & ARM_FSR_ACCESS_MASK) ?711711+ HW_BREAKPOINT_W : HW_BREAKPOINT_R;712712+ if (!(access & hw_breakpoint_type(wp)))713713+ goto unlock;714714+ }737715738716 /* We have a winner. */739717 info->trigger = addr;
···1616 * __get_user_X1717 *1818 * Inputs: r0 contains the address1919+ * r1 contains the address limit, which must be preserved1920 * Outputs: r0 is the error code2020- * r2, r3 contains the zero-extended value2121+ * r2 contains the zero-extended value2122 * lr corrupted2223 *2324 * No other registers must be altered. (see <asm/uaccess.h>···2827 * Note also that it is intended that __get_user_bad is not global.2928 */3029#include <linux/linkage.h>3030+#include <asm/assembler.h>3131#include <asm/errno.h>3232#include <asm/domain.h>33333434ENTRY(__get_user_1)3535+ check_uaccess r0, 1, r1, r2, __get_user_bad35361: TUSER(ldrb) r2, [r0]3637 mov r0, #03738 mov pc, lr3839ENDPROC(__get_user_1)39404041ENTRY(__get_user_2)4141-#ifdef CONFIG_THUMB2_KERNEL4242-2: TUSER(ldrb) r2, [r0]4343-3: TUSER(ldrb) r3, [r0, #1]4242+ check_uaccess r0, 2, r1, r2, __get_user_bad4343+#ifdef CONFIG_CPU_USE_DOMAINS4444+rb .req ip4545+2: ldrbt r2, [r0], #14646+3: ldrbt rb, [r0], #04447#else4545-2: TUSER(ldrb) r2, [r0], #14646-3: TUSER(ldrb) r3, [r0]4848+rb .req r04949+2: ldrb r2, [r0]5050+3: ldrb rb, [r0, #1]4751#endif4852#ifndef __ARMEB__4949- orr r2, r2, r3, lsl #85353+ orr r2, r2, rb, lsl #85054#else5151- orr r2, r3, r2, lsl #85555+ orr r2, rb, r2, lsl #85256#endif5357 mov r0, #05458 mov pc, lr5559ENDPROC(__get_user_2)56605761ENTRY(__get_user_4)6262+ check_uaccess r0, 4, r1, r2, __get_user_bad58634: TUSER(ldr) r2, [r0]5964 mov r0, #06065 mov pc, lr
+6
arch/arm/lib/putuser.S
···1616 * __put_user_X1717 *1818 * Inputs: r0 contains the address1919+ * r1 contains the address limit, which must be preserved1920 * r2, r3 contains the value2021 * Outputs: r0 is the error code2122 * lr corrupted···2827 * Note also that it is intended that __put_user_bad is not global.2928 */3029#include <linux/linkage.h>3030+#include <asm/assembler.h>3131#include <asm/errno.h>3232#include <asm/domain.h>33333434ENTRY(__put_user_1)3535+ check_uaccess r0, 1, r1, ip, __put_user_bad35361: TUSER(strb) r2, [r0]3637 mov r0, #03738 mov pc, lr3839ENDPROC(__put_user_1)39404041ENTRY(__put_user_2)4242+ check_uaccess r0, 2, r1, ip, __put_user_bad4143 mov ip, r2, lsr #84244#ifdef CONFIG_THUMB2_KERNEL4345#ifndef __ARMEB__···6460ENDPROC(__put_user_2)65616662ENTRY(__put_user_4)6363+ check_uaccess r0, 4, r1, ip, __put_user_bad67644: TUSER(str) r2, [r0]6865 mov r0, #06966 mov pc, lr7067ENDPROC(__put_user_4)71687269ENTRY(__put_user_8)7070+ check_uaccess r0, 8, r1, ip, __put_user_bad7371#ifdef CONFIG_THUMB2_KERNEL74725: TUSER(str) r2, [r0]75736: TUSER(str) r3, [r0, #4]
+1-1
arch/arm/mach-at91/at91rm9200_time.c
···197197 at91_st_read(AT91_ST_SR);198198199199 /* Make IRQs happen for the system timer */200200- setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);200200+ setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);201201202202 /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used203203 * directly for the clocksource and all clockevents, after adjusting
+5-1
arch/arm/mach-at91/at91sam9260_devices.c
···726726 .flags = IORESOURCE_MEM,727727 }, {728728 .flags = IORESOURCE_MEM,729729+ }, {730730+ .flags = IORESOURCE_IRQ,729731 },730732};731733···746744 * The second resource is needed:747745 * GPBR will serve as the storage for RTC time offset748746 */749749- at91sam9260_rtt_device.num_resources = 2;747747+ at91sam9260_rtt_device.num_resources = 3;750748 rtt_resources[1].start = AT91SAM9260_BASE_GPBR +751749 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;752750 rtt_resources[1].end = rtt_resources[1].start + 3;751751+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;752752+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;753753}754754#else755755static void __init at91_add_device_rtt_rtc(void)
+5-1
arch/arm/mach-at91/at91sam9261_devices.c
···609609 .flags = IORESOURCE_MEM,610610 }, {611611 .flags = IORESOURCE_MEM,612612+ }, {613613+ .flags = IORESOURCE_IRQ,612614 }613615};614616···628626 * The second resource is needed:629627 * GPBR will serve as the storage for RTC time offset630628 */631631- at91sam9261_rtt_device.num_resources = 2;629629+ at91sam9261_rtt_device.num_resources = 3;632630 rtt_resources[1].start = AT91SAM9261_BASE_GPBR +633631 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;634632 rtt_resources[1].end = rtt_resources[1].start + 3;633633+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;634634+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;635635}636636#else637637static void __init at91_add_device_rtt_rtc(void)
+8-2
arch/arm/mach-at91/at91sam9263_devices.c
···990990 .flags = IORESOURCE_MEM,991991 }, {992992 .flags = IORESOURCE_MEM,993993+ }, {994994+ .flags = IORESOURCE_IRQ,993995 }994996};995997···10081006 .flags = IORESOURCE_MEM,10091007 }, {10101008 .flags = IORESOURCE_MEM,10091009+ }, {10101010+ .flags = IORESOURCE_IRQ,10111011 }10121012};10131013···10311027 * The second resource is needed only for the chosen RTT:10321028 * GPBR will serve as the storage for RTC time offset10331029 */10341034- at91sam9263_rtt0_device.num_resources = 2;10301030+ at91sam9263_rtt0_device.num_resources = 3;10351031 at91sam9263_rtt1_device.num_resources = 1;10361032 pdev = &at91sam9263_rtt0_device;10371033 r = rtt0_resources;10381034 break;10391035 case 1:10401036 at91sam9263_rtt0_device.num_resources = 1;10411041- at91sam9263_rtt1_device.num_resources = 2;10371037+ at91sam9263_rtt1_device.num_resources = 3;10421038 pdev = &at91sam9263_rtt1_device;10431039 r = rtt1_resources;10441040 break;···10511047 pdev->name = "rtc-at91sam9";10521048 r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;10531049 r[1].end = r[1].start + 3;10501050+ r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;10511051+ r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;10541052}10551053#else10561054static void __init at91_add_device_rtt_rtc(void)
+5-1
arch/arm/mach-at91/at91sam9g45_devices.c
···12931293 .flags = IORESOURCE_MEM,12941294 }, {12951295 .flags = IORESOURCE_MEM,12961296+ }, {12971297+ .flags = IORESOURCE_IRQ,12961298 }12971299};12981300···13121310 * The second resource is needed:13131311 * GPBR will serve as the storage for RTC time offset13141312 */13151315- at91sam9g45_rtt_device.num_resources = 2;13131313+ at91sam9g45_rtt_device.num_resources = 3;13161314 rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +13171315 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;13181316 rtt_resources[1].end = rtt_resources[1].start + 3;13171317+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;13181318+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;13191319}13201320#else13211321static void __init at91_add_device_rtt_rtc(void)
+5-1
arch/arm/mach-at91/at91sam9rl_devices.c
···688688 .flags = IORESOURCE_MEM,689689 }, {690690 .flags = IORESOURCE_MEM,691691+ }, {692692+ .flags = IORESOURCE_IRQ,691693 }692694};693695···707705 * The second resource is needed:708706 * GPBR will serve as the storage for RTC time offset709707 */710710- at91sam9rl_rtt_device.num_resources = 2;708708+ at91sam9rl_rtt_device.num_resources = 3;711709 rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +712710 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;713711 rtt_resources[1].end = rtt_resources[1].start + 3;712712+ rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;713713+ rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;714714}715715#else716716static void __init at91_add_device_rtt_rtc(void)
+12
arch/arm/mach-at91/clock.c
···63636464#define cpu_has_300M_plla() (cpu_is_at91sam9g10())65656666+#define cpu_has_240M_plla() (cpu_is_at91sam9261() \6767+ || cpu_is_at91sam9263() \6868+ || cpu_is_at91sam9rl())6969+7070+#define cpu_has_210M_plla() (cpu_is_at91sam9260())7171+6672#define cpu_has_pllb() (!(cpu_is_at91sam9rl() \6773 || cpu_is_at91sam9g45() \6874 || cpu_is_at91sam9x5() \···711705 pll_overclock = true;712706 } else if (cpu_has_800M_plla()) {713707 if (plla.rate_hz > 800000000)708708+ pll_overclock = true;709709+ } else if (cpu_has_240M_plla()) {710710+ if (plla.rate_hz > 240000000)711711+ pll_overclock = true;712712+ } else if (cpu_has_210M_plla()) {713713+ if (plla.rate_hz > 210000000)714714 pll_overclock = true;715715 } else {716716 if (plla.rate_hz > 209000000)
···517517void __init kirkwood_init_early(void)518518{519519 orion_time_set_base(TIMER_VIRT_BASE);520520+521521+ /*522522+ * Some Kirkwood devices allocate their coherent buffers from atomic523523+ * context. Increase size of atomic coherent pool to make sure such524524+ * the allocations won't fail.525525+ */526526+ init_dma_coherent_pool_size(SZ_1M);520527}521528522529int kirkwood_tclk;
···259259 return 0; /* always allow wakeup */260260}261261262262-#define RELOC_BASE 0x1000262262+#define RELOC_BASE 0x1200263263264264-/* INTCA IRQ pins at INTCS + 0x1000 to make space for GIC+INTC handling */264264+/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */265265#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)266266267267INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
···48484949struct blackfin_initial_pda __cpuinitdata initial_pda_coreb;50505151-#define BFIN_IPI_TIMER 05252-#define BFIN_IPI_RESCHEDULE 15353-#define BFIN_IPI_CALL_FUNC 25454-#define BFIN_IPI_CPU_STOP 35151+enum ipi_message_type {5252+ BFIN_IPI_TIMER,5353+ BFIN_IPI_RESCHEDULE,5454+ BFIN_IPI_CALL_FUNC,5555+ BFIN_IPI_CALL_FUNC_SINGLE,5656+ BFIN_IPI_CPU_STOP,5757+};55585659struct blackfin_flush_data {5760 unsigned long start;···63606461void *secondary_stack;65626666-6767-struct smp_call_struct {6868- void (*func)(void *info);6969- void *info;7070- int wait;7171- cpumask_t *waitmask;7272-};7373-7463static struct blackfin_flush_data smp_flush_data;75647665static DEFINE_SPINLOCK(stop_lock);7777-7878-struct ipi_message {7979- unsigned long type;8080- struct smp_call_struct call_struct;8181-};82668367/* A magic number - stress test shows this is safe for common cases */8468#define BFIN_IPI_MSGQ_LEN 585698670/* Simple FIFO buffer, overflow leads to panic */8787-struct ipi_message_queue {8888- spinlock_t lock;7171+struct ipi_data {8972 unsigned long count;9090- unsigned long head; /* head of the queue */9191- struct ipi_message ipi_message[BFIN_IPI_MSGQ_LEN];7373+ unsigned long bits;9274};93759494-static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue);7676+static DEFINE_PER_CPU(struct ipi_data, bfin_ipi);95779678static void ipi_cpu_stop(unsigned int cpu)9779{···117129 blackfin_icache_flush_range(fdata->start, fdata->end);118130}119131120120-static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)121121-{122122- int wait;123123- void (*func)(void *info);124124- void *info;125125- func = msg->call_struct.func;126126- info = msg->call_struct.info;127127- wait = msg->call_struct.wait;128128- func(info);129129- if (wait) {130130-#ifdef __ARCH_SYNC_CORE_DCACHE131131- /*132132- * 'wait' usually means synchronization between CPUs.133133- * Invalidate D cache in case shared data was changed134134- * by func() to ensure cache coherence.135135- */136136- resync_core_dcache();137137-#endif138138- cpumask_clear_cpu(cpu, msg->call_struct.waitmask);139139- }140140-}141141-142132/* Use IRQ_SUPPLE_0 to request reschedule.143133 * When returning from interrupt to user space,144134 * there is chance to reschedule */···138172139173static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)140174{141141- struct ipi_message *msg;142142- struct ipi_message_queue *msg_queue;175175+ struct ipi_data *bfin_ipi_data;143176 unsigned int cpu = smp_processor_id();144144- unsigned long flags;177177+ unsigned long pending;178178+ unsigned long msg;145179146180 platform_clear_ipi(cpu, IRQ_SUPPLE_1);147181148148- msg_queue = &__get_cpu_var(ipi_msg_queue);182182+ bfin_ipi_data = &__get_cpu_var(bfin_ipi);149183150150- spin_lock_irqsave(&msg_queue->lock, flags);184184+ while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {185185+ msg = 0;186186+ do {187187+ msg = find_next_bit(&pending, BITS_PER_LONG, msg + 1);188188+ switch (msg) {189189+ case BFIN_IPI_TIMER:190190+ ipi_timer();191191+ break;192192+ case BFIN_IPI_RESCHEDULE:193193+ scheduler_ipi();194194+ break;195195+ case BFIN_IPI_CALL_FUNC:196196+ generic_smp_call_function_interrupt();197197+ break;151198152152- while (msg_queue->count) {153153- msg = &msg_queue->ipi_message[msg_queue->head];154154- switch (msg->type) {155155- case BFIN_IPI_TIMER:156156- ipi_timer();157157- break;158158- case BFIN_IPI_RESCHEDULE:159159- scheduler_ipi();160160- break;161161- case BFIN_IPI_CALL_FUNC:162162- ipi_call_function(cpu, msg);163163- break;164164- case BFIN_IPI_CPU_STOP:165165- ipi_cpu_stop(cpu);166166- break;167167- default:168168- printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%lx\n",169169- cpu, msg->type);170170- break;171171- }172172- msg_queue->head++;173173- msg_queue->head %= BFIN_IPI_MSGQ_LEN;174174- msg_queue->count--;199199+ case BFIN_IPI_CALL_FUNC_SINGLE:200200+ generic_smp_call_function_single_interrupt();201201+ break;202202+203203+ case BFIN_IPI_CPU_STOP:204204+ ipi_cpu_stop(cpu);205205+ break;206206+ }207207+ } while (msg < BITS_PER_LONG);208208+209209+ smp_mb();175210 }176176- spin_unlock_irqrestore(&msg_queue->lock, flags);177211 return IRQ_HANDLED;178212}179213180180-static void ipi_queue_init(void)214214+static void bfin_ipi_init(void)181215{182216 unsigned int cpu;183183- struct ipi_message_queue *msg_queue;217217+ struct ipi_data *bfin_ipi_data;184218 for_each_possible_cpu(cpu) {185185- msg_queue = &per_cpu(ipi_msg_queue, cpu);186186- spin_lock_init(&msg_queue->lock);187187- msg_queue->count = 0;188188- msg_queue->head = 0;219219+ bfin_ipi_data = &per_cpu(bfin_ipi, cpu);220220+ bfin_ipi_data->bits = 0;221221+ bfin_ipi_data->count = 0;189222 }190223}191224192192-static inline void smp_send_message(cpumask_t callmap, unsigned long type,193193- void (*func) (void *info), void *info, int wait)225225+void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)194226{195227 unsigned int cpu;196196- struct ipi_message_queue *msg_queue;197197- struct ipi_message *msg;198198- unsigned long flags, next_msg;199199- cpumask_t waitmask; /* waitmask is shared by all cpus */228228+ struct ipi_data *bfin_ipi_data;229229+ unsigned long flags;200230201201- cpumask_copy(&waitmask, &callmap);202202- for_each_cpu(cpu, &callmap) {203203- msg_queue = &per_cpu(ipi_msg_queue, cpu);204204- spin_lock_irqsave(&msg_queue->lock, flags);205205- if (msg_queue->count < BFIN_IPI_MSGQ_LEN) {206206- next_msg = (msg_queue->head + msg_queue->count)207207- % BFIN_IPI_MSGQ_LEN;208208- msg = &msg_queue->ipi_message[next_msg];209209- msg->type = type;210210- if (type == BFIN_IPI_CALL_FUNC) {211211- msg->call_struct.func = func;212212- msg->call_struct.info = info;213213- msg->call_struct.wait = wait;214214- msg->call_struct.waitmask = &waitmask;215215- }216216- msg_queue->count++;217217- } else218218- panic("IPI message queue overflow\n");219219- spin_unlock_irqrestore(&msg_queue->lock, flags);231231+ local_irq_save(flags);232232+233233+ for_each_cpu(cpu, cpumask) {234234+ bfin_ipi_data = &per_cpu(bfin_ipi, cpu);235235+ smp_mb();236236+ set_bit(msg, &bfin_ipi_data->bits);237237+ bfin_ipi_data->count++;220238 platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1);221239 }222240223223- if (wait) {224224- while (!cpumask_empty(&waitmask))225225- blackfin_dcache_invalidate_range(226226- (unsigned long)(&waitmask),227227- (unsigned long)(&waitmask));228228-#ifdef __ARCH_SYNC_CORE_DCACHE229229- /*230230- * Invalidate D cache in case shared data was changed by231231- * other processors to ensure cache coherence.232232- */233233- resync_core_dcache();234234-#endif235235- }241241+ local_irq_restore(flags);236242}237243238238-int smp_call_function(void (*func)(void *info), void *info, int wait)244244+void arch_send_call_function_single_ipi(int cpu)239245{240240- cpumask_t callmap;241241-242242- preempt_disable();243243- cpumask_copy(&callmap, cpu_online_mask);244244- cpumask_clear_cpu(smp_processor_id(), &callmap);245245- if (!cpumask_empty(&callmap))246246- smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait);247247-248248- preempt_enable();249249-250250- return 0;246246+ send_ipi(cpumask_of(cpu), BFIN_IPI_CALL_FUNC_SINGLE);251247}252252-EXPORT_SYMBOL_GPL(smp_call_function);253248254254-int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,255255- int wait)249249+void arch_send_call_function_ipi_mask(const struct cpumask *mask)256250{257257- unsigned int cpu = cpuid;258258- cpumask_t callmap;259259-260260- if (cpu_is_offline(cpu))261261- return 0;262262- cpumask_clear(&callmap);263263- cpumask_set_cpu(cpu, &callmap);264264-265265- smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait);266266-267267- return 0;251251+ send_ipi(mask, BFIN_IPI_CALL_FUNC);268252}269269-EXPORT_SYMBOL_GPL(smp_call_function_single);270253271254void smp_send_reschedule(int cpu)272255{273273- cpumask_t callmap;274274- /* simply trigger an ipi */275275-276276- cpumask_clear(&callmap);277277- cpumask_set_cpu(cpu, &callmap);278278-279279- smp_send_message(callmap, BFIN_IPI_RESCHEDULE, NULL, NULL, 0);256256+ send_ipi(cpumask_of(cpu), BFIN_IPI_RESCHEDULE);280257281258 return;282259}283260284261void smp_send_msg(const struct cpumask *mask, unsigned long type)285262{286286- smp_send_message(*mask, type, NULL, NULL, 0);263263+ send_ipi(mask, type);287264}288265289266void smp_timer_broadcast(const struct cpumask *mask)···242333 cpumask_copy(&callmap, cpu_online_mask);243334 cpumask_clear_cpu(smp_processor_id(), &callmap);244335 if (!cpumask_empty(&callmap))245245- smp_send_message(callmap, BFIN_IPI_CPU_STOP, NULL, NULL, 0);336336+ send_ipi(&callmap, BFIN_IPI_CPU_STOP);246337247338 preempt_enable();248339···345436void __init smp_prepare_cpus(unsigned int max_cpus)346437{347438 platform_prepare_cpus(max_cpus);348348- ipi_queue_init();439439+ bfin_ipi_init();349440 platform_request_ipi(IRQ_SUPPLE_0, ipi_handler_int0);350441 platform_request_ipi(IRQ_SUPPLE_1, ipi_handler_int1);351442}
+1
arch/powerpc/include/asm/processor.h
···386386enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};387387388388extern int powersave_nap; /* set if nap mode can be used in idle loop */389389+extern void power7_nap(void);389390390391#ifdef CONFIG_PSERIES_IDLE391392extern void update_smt_snooze_delay(int snooze);
···28282929void doorbell_cause_ipi(int cpu, unsigned long data)3030{3131+ /* Order previous accesses vs. msgsnd, which is treated as a store */3232+ mb();3133 ppc_msgsnd(PPC_DBELL, 0, data);3234}3335
+17-6
arch/powerpc/kernel/entry_64.S
···370370 li r3,0371371 b syscall_exit372372373373+ .section ".toc","aw"374374+DSCR_DEFAULT:375375+ .tc dscr_default[TC],dscr_default376376+377377+ .section ".text"378378+373379/*374380 * This routine switches between two different tasks. The process375381 * state of one is saved on its kernel stack. Then the state···515509 mr r1,r8 /* start using new stack pointer */516510 std r7,PACAKSAVE(r13)517511518518- ld r6,_CCR(r1)519519- mtcrf 0xFF,r6520520-521512#ifdef CONFIG_ALTIVEC522513BEGIN_FTR_SECTION523514 ld r0,THREAD_VRSAVE(r4)···523520#endif /* CONFIG_ALTIVEC */524521#ifdef CONFIG_PPC64525522BEGIN_FTR_SECTION523523+ lwz r6,THREAD_DSCR_INHERIT(r4)524524+ ld r7,DSCR_DEFAULT@toc(2)526525 ld r0,THREAD_DSCR(r4)527527- cmpd r0,r25528528- beq 1f526526+ cmpwi r6,0527527+ bne 1f528528+ ld r0,0(r7)529529+1: cmpd r0,r25530530+ beq 2f529531 mtspr SPRN_DSCR,r0530530-1: 532532+2:531533END_FTR_SECTION_IFSET(CPU_FTR_DSCR)532534#endif535535+536536+ ld r6,_CCR(r1)537537+ mtcrf 0xFF,r6533538534539 /* r3-r13 are destroyed -- Cort */535540 REST_8GPRS(14, r1)
···2828 lwz r4,ADDROFF(powersave_nap)(r3)2929 cmpwi 0,r4,03030 beqlr3131+ /* fall through */31323333+_GLOBAL(power7_nap)3234 /* NAP is a state loss, we create a regs frame on the3335 * stack, fill it up with the state we care about and3436 * stick a pointer to it in PACAR1. We really only
···198198 struct cpu_messages *info = &per_cpu(ipi_message, cpu);199199 char *message = (char *)&info->messages;200200201201+ /*202202+ * Order previous accesses before accesses in the IPI handler.203203+ */204204+ smp_mb();201205 message[msg] = 1;202202- mb();206206+ /*207207+ * cause_ipi functions are required to include a full barrier208208+ * before doing whatever causes the IPI.209209+ */203210 smp_ops->cause_ipi(cpu, info->data);204211}205212···218211 mb(); /* order any irq clear */219212220213 do {221221- all = xchg_local(&info->messages, 0);214214+ all = xchg(&info->messages, 0);222215223216#ifdef __BIG_ENDIAN224217 if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION)))
···535535 trace_timer_interrupt_exit(regs);536536}537537538538+/*539539+ * Hypervisor decrementer interrupts shouldn't occur but are sometimes540540+ * left pending on exit from a KVM guest. We don't need to do anything541541+ * to clear them, as they are edge-triggered.542542+ */543543+void hdec_interrupt(struct pt_regs *regs)544544+{545545+}546546+538547#ifdef CONFIG_SUSPEND539548static void generic_suspend_disable_irqs(void)540549{
···1436143614371437/*14381438 * Update the node maps and sysfs entries for each cpu whose home node14391439- * has changed.14391439+ * has changed. Returns 1 when the topology has changed, and 0 otherwise.14401440 */14411441int arch_update_cpu_topology(void)14421442{14431443- int cpu, nid, old_nid;14431443+ int cpu, nid, old_nid, changed = 0;14441444 unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};14451445 struct device *dev;14461446···14661466 dev = get_cpu_device(cpu);14671467 if (dev)14681468 kobject_uevent(&dev->kobj, KOBJ_CHANGE);14691469+ changed = 1;14691470 }1470147114711471- return 1;14721472+ return changed;14721473}1473147414741475static void topology_work_fn(struct work_struct *work)
+1-9
arch/powerpc/platforms/powernv/smp.c
···106106{107107 unsigned int cpu;108108109109- /* If powersave_nap is enabled, use NAP mode, else just110110- * spin aimlessly111111- */112112- if (!powersave_nap) {113113- generic_mach_cpu_die();114114- return;115115- }116116-117109 /* Standard hot unplug procedure */118110 local_irq_disable();119111 idle_task_exit();···120128 */121129 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);122130 while (!generic_check_cpu_restart(cpu)) {123123- power7_idle();131131+ power7_nap();124132 if (!generic_check_cpu_restart(cpu)) {125133 DBG("CPU%d Unexpected exit while offline !\n", cpu);126134 /* We may be getting an IPI, so we re-enable
+5-1
arch/powerpc/sysdev/xics/icp-hv.c
···6565static inline void icp_hv_set_qirr(int n_cpu , u8 value)6666{6767 int hw_cpu = get_hard_smp_processor_id(n_cpu);6868- long rc = plpar_hcall_norets(H_IPI, hw_cpu, value);6868+ long rc;6969+7070+ /* Make sure all previous accesses are ordered before IPI sending */7171+ mb();7272+ rc = plpar_hcall_norets(H_IPI, hw_cpu, value);6973 if (rc != H_SUCCESS) {7074 pr_err("%s: bad return code qirr cpu=%d hw_cpu=%d mfrr=0x%x "7175 "returned %ld\n", __func__, n_cpu, hw_cpu, value, rc);
+5-5
arch/s390/oprofile/init.c
···169169 if (*offset)170170 return -EINVAL;171171 retval = oprofilefs_ulong_from_user(&val, buf, count);172172- if (retval)172172+ if (retval <= 0)173173 return retval;174174 if (val < oprofile_min_interval)175175 oprofile_hw_interval = oprofile_min_interval;···212212 return -EINVAL;213213214214 retval = oprofilefs_ulong_from_user(&val, buf, count);215215- if (retval)215215+ if (retval <= 0)216216 return retval;217217 if (val != 0)218218 return -EINVAL;···243243 return -EINVAL;244244245245 retval = oprofilefs_ulong_from_user(&val, buf, count);246246- if (retval)246246+ if (retval <= 0)247247 return retval;248248249249 if (val != 0 && val != 1)···278278 return -EINVAL;279279280280 retval = oprofilefs_ulong_from_user(&val, buf, count);281281- if (retval)281281+ if (retval <= 0)282282 return retval;283283284284 if (val != 0 && val != 1)···317317 return -EINVAL;318318319319 retval = oprofilefs_ulong_from_user(&val, buf, count);320320- if (retval)320320+ if (retval <= 0)321321 return retval;322322323323 if (val != 0 && val != 1)
···686686 * to have an operational LBR which can freeze687687 * on PMU interrupt688688 */689689- if (boot_cpu_data.x86_mask < 10) {689689+ if (boot_cpu_data.x86_model == 28690690+ && boot_cpu_data.x86_mask < 10) {690691 pr_cont("LBR disabled due to erratum");691692 return;692693 }
+3
arch/x86/kernel/microcode_core.c
···225225 if (do_microcode_update(buf, len) == 0)226226 ret = (ssize_t)len;227227228228+ if (ret > 0)229229+ perf_check_microcode();230230+228231 mutex_unlock(µcode_mutex);229232 put_online_cpus();230233
+1-1
arch/x86/kvm/i8259.c
···318318 if (val & 0x10) {319319 u8 edge_irr = s->irr & ~s->elcr;320320 int i;321321- bool found;321321+ bool found = false;322322 struct kvm_vcpu *vcpu;323323324324 s->init4 = val & 1;
+18-5
arch/x86/kvm/vmx.c
···3619361936203620static int alloc_apic_access_page(struct kvm *kvm)36213621{36223622+ struct page *page;36223623 struct kvm_userspace_memory_region kvm_userspace_mem;36233624 int r = 0;36243625···36343633 if (r)36353634 goto out;3636363536373637- kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);36363636+ page = gfn_to_page(kvm, 0xfee00);36373637+ if (is_error_page(page)) {36383638+ r = -EFAULT;36393639+ goto out;36403640+ }36413641+36423642+ kvm->arch.apic_access_page = page;36383643out:36393644 mutex_unlock(&kvm->slots_lock);36403645 return r;···3648364136493642static int alloc_identity_pagetable(struct kvm *kvm)36503643{36443644+ struct page *page;36513645 struct kvm_userspace_memory_region kvm_userspace_mem;36523646 int r = 0;36533647···36643656 if (r)36653657 goto out;3666365836673667- kvm->arch.ept_identity_pagetable = gfn_to_page(kvm,36683668- kvm->arch.ept_identity_map_addr >> PAGE_SHIFT);36593659+ page = gfn_to_page(kvm, kvm->arch.ept_identity_map_addr >> PAGE_SHIFT);36603660+ if (is_error_page(page)) {36613661+ r = -EFAULT;36623662+ goto out;36633663+ }36643664+36653665+ kvm->arch.ept_identity_pagetable = page;36693666out:36703667 mutex_unlock(&kvm->slots_lock);36713668 return r;···65886575 /* Exposing INVPCID only when PCID is exposed */65896576 best = kvm_find_cpuid_entry(vcpu, 0x7, 0);65906577 if (vmx_invpcid_supported() &&65916591- best && (best->ecx & bit(X86_FEATURE_INVPCID)) &&65786578+ best && (best->ebx & bit(X86_FEATURE_INVPCID)) &&65926579 guest_cpuid_has_pcid(vcpu)) {65936580 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;65946581 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,···65986585 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,65996586 exec_control);66006587 if (best)66016601- best->ecx &= ~bit(X86_FEATURE_INVPCID);65886588+ best->ebx &= ~bit(X86_FEATURE_INVPCID);66026589 }66036590}66046591
+10-3
arch/x86/kvm/x86.c
···51135113 !kvm_event_needs_reinjection(vcpu);51145114}5115511551165116-static void vapic_enter(struct kvm_vcpu *vcpu)51165116+static int vapic_enter(struct kvm_vcpu *vcpu)51175117{51185118 struct kvm_lapic *apic = vcpu->arch.apic;51195119 struct page *page;5120512051215121 if (!apic || !apic->vapic_addr)51225122- return;51225122+ return 0;5123512351245124 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);51255125+ if (is_error_page(page))51265126+ return -EFAULT;5125512751265128 vcpu->arch.apic->vapic_page = page;51295129+ return 0;51275130}5128513151295132static void vapic_exit(struct kvm_vcpu *vcpu)···54335430 }5434543154355432 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);54365436- vapic_enter(vcpu);54335433+ r = vapic_enter(vcpu);54345434+ if (r) {54355435+ srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);54365436+ return r;54375437+ }5437543854385439 r = 1;54395440 while (r > 0) {
···237237 } else if (result == ACPI_STATE_D3_HOT) {238238 result = ACPI_STATE_D3;239239 }240240+241241+ /*242242+ * If we were unsure about the device parent's power state up to this243243+ * point, the fact that the device is in D0 implies that the parent has244244+ * to be in D0 too.245245+ */246246+ if (device->parent && device->parent->power.state == ACPI_STATE_UNKNOWN247247+ && result == ACPI_STATE_D0)248248+ device->parent->power.state = ACPI_STATE_D0;249249+240250 *state = result;241251242252 out:
+24-12
drivers/acpi/power.c
···107107108108 /* List of devices relying on this power resource */109109 struct acpi_power_resource_device *devices;110110+ struct mutex devices_lock;110111};111112112113static struct list_head acpi_power_resource_list;···226225227226static int __acpi_power_on(struct acpi_power_resource *resource)228227{229229- struct acpi_power_resource_device *device_list = resource->devices;230228 acpi_status status = AE_OK;231229232230 status = acpi_evaluate_object(resource->device->handle, "_ON", NULL, NULL);···238238 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Power resource [%s] turned on\n",239239 resource->name));240240241241- while (device_list) {242242- acpi_power_on_device(device_list->device);243243-244244- device_list = device_list->next;245245- }246246-247241 return 0;248242}249243250244static int acpi_power_on(acpi_handle handle)251245{252246 int result = 0;247247+ bool resume_device = false;253248 struct acpi_power_resource *resource = NULL;249249+ struct acpi_power_resource_device *device_list;254250255251 result = acpi_power_get_context(handle, &resource);256252 if (result)···262266 result = __acpi_power_on(resource);263267 if (result)264268 resource->ref_count--;269269+ else270270+ resume_device = true;265271 }266272267273 mutex_unlock(&resource->resource_lock);274274+275275+ if (!resume_device)276276+ return result;277277+278278+ mutex_lock(&resource->devices_lock);279279+280280+ device_list = resource->devices;281281+ while (device_list) {282282+ acpi_power_on_device(device_list->device);283283+ device_list = device_list->next;284284+ }285285+286286+ mutex_unlock(&resource->devices_lock);268287269288 return result;270289}···366355 if (acpi_power_get_context(res_handle, &resource))367356 return;368357369369- mutex_lock(&resource->resource_lock);358358+ mutex_lock(&resource->devices_lock);370359 prev = NULL;371360 curr = resource->devices;372361 while (curr) {···383372 prev = curr;384373 curr = curr->next;385374 }386386- mutex_unlock(&resource->resource_lock);375375+ mutex_unlock(&resource->devices_lock);387376}388377389378/* Unlink dev from all power resources in _PR0 */···425414426415 power_resource_device->device = powered_device;427416428428- mutex_lock(&resource->resource_lock);417417+ mutex_lock(&resource->devices_lock);429418 power_resource_device->next = resource->devices;430419 resource->devices = power_resource_device;431431- mutex_unlock(&resource->resource_lock);420420+ mutex_unlock(&resource->devices_lock);432421433422 return 0;434423}···473462 return ret;474463475464no_power_resource:476476- printk(KERN_WARNING PREFIX "Invalid Power Resource to register!");465465+ printk(KERN_DEBUG PREFIX "Invalid Power Resource to register!");477466 return -ENODEV;478467}479468EXPORT_SYMBOL_GPL(acpi_power_resource_register_device);···732721733722 resource->device = device;734723 mutex_init(&resource->resource_lock);724724+ mutex_init(&resource->devices_lock);735725 strcpy(resource->name, device->pnp.bus_id);736726 strcpy(acpi_device_name(device), ACPI_POWER_DEVICE_NAME);737727 strcpy(acpi_device_class(device), ACPI_POWER_CLASS);
+9-1
drivers/ata/ahci.c
···268268 /* JMicron 360/1/3/5/6, match class to avoid IDE function */269269 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,270270 PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr },271271+ /* JMicron 362B and 362C have an AHCI function with IDE class code */272272+ { PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr },273273+ { PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr },271274272275 /* ATI */273276 { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */···396393 .driver_data = board_ahci_yes_fbs }, /* 88se9125 */397394 { PCI_DEVICE(0x1b4b, 0x917a),398395 .driver_data = board_ahci_yes_fbs }, /* 88se9172 */396396+ { PCI_DEVICE(0x1b4b, 0x9192),397397+ .driver_data = board_ahci_yes_fbs }, /* 88se9172 on some Gigabyte */399398 { PCI_DEVICE(0x1b4b, 0x91a3),400399 .driver_data = board_ahci_yes_fbs },401400···405400 { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */406401407402 /* Asmedia */408408- { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci }, /* ASM1061 */403403+ { PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci }, /* ASM1060 */404404+ { PCI_VDEVICE(ASMEDIA, 0x0602), board_ahci }, /* ASM1060 */405405+ { PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci }, /* ASM1061 */406406+ { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci }, /* ASM1062 */409407410408 /* Generic, PCI class code for AHCI */411409 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
···8282 gpiochip_find(&gg_data, of_gpiochip_find_and_xlate);83838484 of_node_put(gg_data.gpiospec.np);8585- pr_debug("%s exited with status %d\n", __func__, ret);8585+ pr_debug("%s exited with status %d\n", __func__, gg_data.out_gpio);8686 return gg_data.out_gpio;8787}8888EXPORT_SYMBOL(of_get_named_gpio_flags);
···36363737config DRM_EXYNOS_G2D3838 bool "Exynos DRM G2D"3939- depends on DRM_EXYNOS3939+ depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_G2D4040 help4141 Choose this option if you want to use Exynos G2D for DRM.
···27002700 dev->driver->irq_handler = i8xx_irq_handler;27012701 dev->driver->irq_uninstall = i8xx_irq_uninstall;27022702 } else if (INTEL_INFO(dev)->gen == 3) {27032703- /* IIR "flip pending" means done if this bit is set */27042704- I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE));27052705-27062703 dev->driver->irq_preinstall = i915_irq_preinstall;27072704 dev->driver->irq_postinstall = i915_irq_postinstall;27082705 dev->driver->irq_uninstall = i915_irq_uninstall;
+4-2
drivers/gpu/drm/i915/intel_display.c
···13761376 "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n",13771377 reg, pipe_name(pipe));1378137813791379- WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_PIPE_B_SELECT),13791379+ WARN(HAS_PCH_IBX(dev_priv->dev) && (val & DP_PORT_EN) == 013801380+ && (val & DP_PIPEB_SELECT),13801381 "IBX PCH dp port still using transcoder B\n");13811382}13821383···13891388 "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n",13901389 reg, pipe_name(pipe));1391139013921392- WARN(HAS_PCH_IBX(dev_priv->dev) && (val & SDVO_PIPE_B_SELECT),13911391+ WARN(HAS_PCH_IBX(dev_priv->dev) && (val & PORT_ENABLE) == 013921392+ && (val & SDVO_PIPE_B_SELECT),13931393 "IBX PCH hdmi port still using transcoder B\n");13941394}13951395
+7-4
drivers/gpu/drm/i915/intel_dp.c
···25332533 break;25342534 }2535253525362536- intel_dp_i2c_init(intel_dp, intel_connector, name);25372537-25382536 /* Cache some DPCD data in the eDP case */25392537 if (is_edp(intel_dp)) {25402540- bool ret;25412538 struct edp_power_seq cur, vbt;25422539 u32 pp_on, pp_off, pp_div;25432543- struct edid *edid;2544254025452541 pp_on = I915_READ(PCH_PP_ON_DELAYS);25462542 pp_off = I915_READ(PCH_PP_OFF_DELAYS);···2587259125882592 DRM_DEBUG_KMS("backlight on delay %d, off delay %d\n",25892593 intel_dp->backlight_on_delay, intel_dp->backlight_off_delay);25942594+ }25952595+25962596+ intel_dp_i2c_init(intel_dp, intel_connector, name);25972597+25982598+ if (is_edp(intel_dp)) {25992599+ bool ret;26002600+ struct edid *edid;2590260125912602 ironlake_edp_panel_vdd_on(intel_dp);25922603 ret = intel_dp_get_dpcd(intel_dp);
+22-9
drivers/gpu/drm/i915/intel_panel.c
···162162 return val;163163}164164165165-u32 intel_panel_get_max_backlight(struct drm_device *dev)165165+static u32 _intel_panel_get_max_backlight(struct drm_device *dev)166166{167167 struct drm_i915_private *dev_priv = dev->dev_private;168168 u32 max;169169170170 max = i915_read_blc_pwm_ctl(dev_priv);171171- if (max == 0) {172172- /* XXX add code here to query mode clock or hardware clock173173- * and program max PWM appropriately.174174- */175175- pr_warn_once("fixme: max PWM is zero\n");176176- return 1;177177- }178171179172 if (HAS_PCH_SPLIT(dev)) {180173 max >>= 16;···179186180187 if (is_backlight_combination_mode(dev))181188 max *= 0xff;189189+ }190190+191191+ return max;192192+}193193+194194+u32 intel_panel_get_max_backlight(struct drm_device *dev)195195+{196196+ u32 max;197197+198198+ max = _intel_panel_get_max_backlight(dev);199199+ if (max == 0) {200200+ /* XXX add code here to query mode clock or hardware clock201201+ * and program max PWM appropriately.202202+ */203203+ pr_warn_once("fixme: max PWM is zero\n");204204+ return 1;182205 }183206184207 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);···433424434425 memset(&props, 0, sizeof(props));435426 props.type = BACKLIGHT_RAW;436436- props.max_brightness = intel_panel_get_max_backlight(dev);427427+ props.max_brightness = _intel_panel_get_max_backlight(dev);428428+ if (props.max_brightness == 0) {429429+ DRM_ERROR("Failed to get maximum backlight value\n");430430+ return -ENODEV;431431+ }437432 dev_priv->backlight =438433 backlight_device_register("intel_backlight",439434 &connector->kdev, dev,
+3
drivers/gpu/drm/i915/intel_pm.c
···3672367236733673 if (IS_PINEVIEW(dev))36743674 I915_WRITE(ECOSKPD, _MASKED_BIT_ENABLE(ECO_GATING_CX_ONLY));36753675+36763676+ /* IIR "flip pending" means done if this bit is set */36773677+ I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE));36753678}3676367936773680static void i85x_init_clock_gating(struct drm_device *dev)
+6-9
drivers/gpu/drm/i915/intel_sdvo.c
···25732573 hotplug_mask = intel_sdvo->is_sdvob ?25742574 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;25752575 }25762576- dev_priv->hotplug_supported_mask |= hotplug_mask;2577257625782577 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);25792578···25802581 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))25812582 goto err;2582258325832583- /* Set up hotplug command - note paranoia about contents of reply.25842584- * We assume that the hardware is in a sane state, and only touch25852585- * the bits we think we understand.25862586- */25872587- intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,25882588- &intel_sdvo->hotplug_active, 2);25892589- intel_sdvo->hotplug_active[0] &= ~0x3;25902590-25912584 if (intel_sdvo_output_setup(intel_sdvo,25922585 intel_sdvo->caps.output_flags) != true) {25932586 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",25942587 SDVO_NAME(intel_sdvo));25952588 goto err;25962589 }25902590+25912591+ /* Only enable the hotplug irq if we need it, to work around noisy25922592+ * hotplug lines.25932593+ */25942594+ if (intel_sdvo->hotplug_active[0])25952595+ dev_priv->hotplug_supported_mask |= hotplug_mask;2597259625982597 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);25992598
···14791479 }14801480}1481148114821482+/**14831483+ * radeon_get_pll_use_mask - look up a mask of which pplls are in use14841484+ *14851485+ * @crtc: drm crtc14861486+ *14871487+ * Returns the mask of which PPLLs (Pixel PLLs) are in use.14881488+ */14891489+static u32 radeon_get_pll_use_mask(struct drm_crtc *crtc)14901490+{14911491+ struct drm_device *dev = crtc->dev;14921492+ struct drm_crtc *test_crtc;14931493+ struct radeon_crtc *radeon_test_crtc;14941494+ u32 pll_in_use = 0;14951495+14961496+ list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {14971497+ if (crtc == test_crtc)14981498+ continue;14991499+15001500+ radeon_test_crtc = to_radeon_crtc(test_crtc);15011501+ if (radeon_test_crtc->pll_id != ATOM_PPLL_INVALID)15021502+ pll_in_use |= (1 << radeon_test_crtc->pll_id);15031503+ }15041504+ return pll_in_use;15051505+}15061506+15071507+/**15081508+ * radeon_get_shared_dp_ppll - return the PPLL used by another crtc for DP15091509+ *15101510+ * @crtc: drm crtc15111511+ *15121512+ * Returns the PPLL (Pixel PLL) used by another crtc/encoder which is15131513+ * also in DP mode. For DP, a single PPLL can be used for all DP15141514+ * crtcs/encoders.15151515+ */15161516+static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc)15171517+{15181518+ struct drm_device *dev = crtc->dev;15191519+ struct drm_encoder *test_encoder;15201520+ struct radeon_crtc *radeon_test_crtc;15211521+15221522+ list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) {15231523+ if (test_encoder->crtc && (test_encoder->crtc != crtc)) {15241524+ if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_encoder))) {15251525+ /* for DP use the same PLL for all */15261526+ radeon_test_crtc = to_radeon_crtc(test_encoder->crtc);15271527+ if (radeon_test_crtc->pll_id != ATOM_PPLL_INVALID)15281528+ return radeon_test_crtc->pll_id;15291529+ }15301530+ }15311531+ }15321532+ return ATOM_PPLL_INVALID;15331533+}15341534+15351535+/**15361536+ * radeon_atom_pick_pll - Allocate a PPLL for use by the crtc.15371537+ *15381538+ * @crtc: drm crtc15391539+ *15401540+ * Returns the PPLL (Pixel PLL) to be used by the crtc. For DP monitors15411541+ * a single PPLL can be used for all DP crtcs/encoders. For non-DP15421542+ * monitors a dedicated PPLL must be used. If a particular board has15431543+ * an external DP PLL, return ATOM_PPLL_INVALID to skip PLL programming15441544+ * as there is no need to program the PLL itself. If we are not able to15451545+ * allocate a PLL, return ATOM_PPLL_INVALID to skip PLL programming to15461546+ * avoid messing up an existing monitor.15471547+ *15481548+ * Asic specific PLL information15491549+ *15501550+ * DCE 6.115511551+ * - PPLL2 is only available to UNIPHYA (both DP and non-DP)15521552+ * - PPLL0, PPLL1 are available for UNIPHYB/C/D/E/F (both DP and non-DP)15531553+ *15541554+ * DCE 6.015551555+ * - PPLL0 is available to all UNIPHY (DP only)15561556+ * - PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) and DAC15571557+ *15581558+ * DCE 5.015591559+ * - DCPLL is available to all UNIPHY (DP only)15601560+ * - PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) and DAC15611561+ *15621562+ * DCE 3.0/4.0/4.115631563+ * - PPLL1, PPLL2 are available for all UNIPHY (both DP and non-DP) and DAC15641564+ *15651565+ */14821566static int radeon_atom_pick_pll(struct drm_crtc *crtc)14831567{14841568 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);14851569 struct drm_device *dev = crtc->dev;14861570 struct radeon_device *rdev = dev->dev_private;14871571 struct drm_encoder *test_encoder;14881488- struct drm_crtc *test_crtc;14891489- uint32_t pll_in_use = 0;15721572+ u32 pll_in_use;15731573+ int pll;1490157414911575 if (ASIC_IS_DCE61(rdev)) {14921576 list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) {···1582149815831499 if ((test_radeon_encoder->encoder_id ==15841500 ENCODER_OBJECT_ID_INTERNAL_UNIPHY) &&15851585- (dig->linkb == false)) /* UNIPHY A uses PPLL2 */15011501+ (dig->linkb == false))15021502+ /* UNIPHY A uses PPLL2 */15861503 return ATOM_PPLL2;15041504+ else if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_encoder))) {15051505+ /* UNIPHY B/C/D/E/F */15061506+ if (rdev->clock.dp_extclk)15071507+ /* skip PPLL programming if using ext clock */15081508+ return ATOM_PPLL_INVALID;15091509+ else {15101510+ /* use the same PPLL for all DP monitors */15111511+ pll = radeon_get_shared_dp_ppll(crtc);15121512+ if (pll != ATOM_PPLL_INVALID)15131513+ return pll;15141514+ }15151515+ }15161516+ break;15871517 }15881518 }15891519 /* UNIPHY B/C/D/E/F */15901590- list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {15911591- struct radeon_crtc *radeon_test_crtc;15921592-15931593- if (crtc == test_crtc)15941594- continue;15951595-15961596- radeon_test_crtc = to_radeon_crtc(test_crtc);15971597- if ((radeon_test_crtc->pll_id == ATOM_PPLL0) ||15981598- (radeon_test_crtc->pll_id == ATOM_PPLL1))15991599- pll_in_use |= (1 << radeon_test_crtc->pll_id);16001600- }16011601- if (!(pll_in_use & 4))15201520+ pll_in_use = radeon_get_pll_use_mask(crtc);15211521+ if (!(pll_in_use & (1 << ATOM_PPLL0)))16021522 return ATOM_PPLL0;16031603- return ATOM_PPLL1;15231523+ if (!(pll_in_use & (1 << ATOM_PPLL1)))15241524+ return ATOM_PPLL1;15251525+ DRM_ERROR("unable to allocate a PPLL\n");15261526+ return ATOM_PPLL_INVALID;16041527 } else if (ASIC_IS_DCE4(rdev)) {16051528 list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) {16061529 if (test_encoder->crtc && (test_encoder->crtc == crtc)) {16071530 /* in DP mode, the DP ref clock can come from PPLL, DCPLL, or ext clock,16081531 * depending on the asic:16091532 * DCE4: PPLL or ext clock16101610- * DCE5: DCPLL or ext clock15331533+ * DCE5: PPLL, DCPLL, or ext clock15341534+ * DCE6: PPLL, PPLL0, or ext clock16111535 *16121536 * Setting ATOM_PPLL_INVALID will cause SetPixelClock to skip16131537 * PPLL/DCPLL programming and only program the DP DTO for the···16231531 */16241532 if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_encoder))) {16251533 if (rdev->clock.dp_extclk)15341534+ /* skip PPLL programming if using ext clock */16261535 return ATOM_PPLL_INVALID;16271536 else if (ASIC_IS_DCE6(rdev))15371537+ /* use PPLL0 for all DP */16281538 return ATOM_PPLL0;16291539 else if (ASIC_IS_DCE5(rdev))15401540+ /* use DCPLL for all DP */16301541 return ATOM_DCPLL;15421542+ else {15431543+ /* use the same PPLL for all DP monitors */15441544+ pll = radeon_get_shared_dp_ppll(crtc);15451545+ if (pll != ATOM_PPLL_INVALID)15461546+ return pll;15471547+ }16311548 }15491549+ break;16321550 }16331551 }16341634-16351635- /* otherwise, pick one of the plls */16361636- list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {16371637- struct radeon_crtc *radeon_test_crtc;16381638-16391639- if (crtc == test_crtc)16401640- continue;16411641-16421642- radeon_test_crtc = to_radeon_crtc(test_crtc);16431643- if ((radeon_test_crtc->pll_id >= ATOM_PPLL1) &&16441644- (radeon_test_crtc->pll_id <= ATOM_PPLL2))16451645- pll_in_use |= (1 << radeon_test_crtc->pll_id);16461646- }16471647- if (!(pll_in_use & 1))15521552+ /* all other cases */15531553+ pll_in_use = radeon_get_pll_use_mask(crtc);15541554+ if (!(pll_in_use & (1 << ATOM_PPLL2)))15551555+ return ATOM_PPLL2;15561556+ if (!(pll_in_use & (1 << ATOM_PPLL1)))16481557 return ATOM_PPLL1;16491649- return ATOM_PPLL2;15581558+ DRM_ERROR("unable to allocate a PPLL\n");15591559+ return ATOM_PPLL_INVALID;16501560 } else15611561+ /* use PPLL1 or PPLL2 */16511562 return radeon_crtc->crtc_id;1652156316531564}···17921697 break;17931698 }17941699done:17951795- radeon_crtc->pll_id = -1;17001700+ radeon_crtc->pll_id = ATOM_PPLL_INVALID;17961701}1797170217981703static const struct drm_crtc_helper_funcs atombios_helper_funcs = {···18411746 else18421747 radeon_crtc->crtc_offset = 0;18431748 }18441844- radeon_crtc->pll_id = -1;17491749+ radeon_crtc->pll_id = ATOM_PPLL_INVALID;18451750 drm_crtc_helper_add(&radeon_crtc->base, &atombios_helper_funcs);18461751}
+5-3
drivers/gpu/drm/radeon/radeon_fence.c
···131131 */132132void radeon_fence_process(struct radeon_device *rdev, int ring)133133{134134- uint64_t seq, last_seq;134134+ uint64_t seq, last_seq, last_emitted;135135 unsigned count_loop = 0;136136 bool wake = false;137137···158158 */159159 last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);160160 do {161161+ last_emitted = rdev->fence_drv[ring].sync_seq[ring];161162 seq = radeon_fence_read(rdev, ring);162163 seq |= last_seq & 0xffffffff00000000LL;163164 if (seq < last_seq) {164164- seq += 0x100000000LL;165165+ seq &= 0xffffffff;166166+ seq |= last_emitted & 0xffffffff00000000LL;165167 }166168167167- if (seq == last_seq) {169169+ if (seq <= last_seq || seq > last_emitted) {168170 break;169171 }170172 /* If we loop over we don't want to return without
···1212 This is a KMS enabled DRM driver for the VMware SVGA21313 virtual hardware.1414 The compiled module will be called "vmwgfx.ko".1515+1616+config DRM_VMWGFX_FBCON1717+ depends on DRM_VMWGFX1818+ bool "Enable framebuffer console under vmwgfx by default"1919+ help2020+ Choose this option if you are shipping a new vmwgfx2121+ userspace driver that supports using the kernel driver.2222+
···476476 /* To avoid integer overflow, use clock/100 for calculations */477477 clock = pca_clock(pca_data) / 100;478478479479- if (pca_data->i2c_clock > 10000) {479479+ if (pca_data->i2c_clock > 1000000) {480480 mode = I2C_PCA_MODE_TURBO;481481 min_tlow = 14;482482 min_thi = 5;483483 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */484484- } else if (pca_data->i2c_clock > 4000) {484484+ } else if (pca_data->i2c_clock > 400000) {485485 mode = I2C_PCA_MODE_FASTP;486486 min_tlow = 17;487487 min_thi = 9;488488 raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */489489- } else if (pca_data->i2c_clock > 1000) {489489+ } else if (pca_data->i2c_clock > 100000) {490490 mode = I2C_PCA_MODE_FAST;491491 min_tlow = 44;492492 min_thi = 20;
+6
drivers/i2c/busses/Kconfig
···104104 DH89xxCC (PCH)105105 Panther Point (PCH)106106 Lynx Point (PCH)107107+ Lynx Point-LP (PCH)107108108109 This driver can also be built as a module. If so, the module109110 will be called i2c-i801.···355354 devices such as DaVinci NIC.356355 For details please see http://www.ti.com/davinci357356357357+config I2C_DESIGNWARE_CORE358358+ tristate359359+358360config I2C_DESIGNWARE_PLATFORM359361 tristate "Synopsys DesignWare Platform"360362 depends on HAVE_CLK363363+ select I2C_DESIGNWARE_CORE361364 help362365 If you say yes to this option, support will be included for the363366 Synopsys DesignWare I2C adapter. Only master mode is supported.···372367config I2C_DESIGNWARE_PCI373368 tristate "Synopsys DesignWare PCI"374369 depends on PCI370370+ select I2C_DESIGNWARE_CORE375371 help376372 If you say yes to this option, support will be included for the377373 Synopsys DesignWare I2C adapter. Only master mode is supported.
···5252 DH89xxCC (PCH) 0x2330 32 hard yes yes yes5353 Panther Point (PCH) 0x1e22 32 hard yes yes yes5454 Lynx Point (PCH) 0x8c22 32 hard yes yes yes5555+ Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes55565657 Features supported by this driver:5758 Software PEC no···156155#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330157156#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30158157#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22158158+#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22159159160160struct i801_priv {161161 struct i2c_adapter adapter;···773771 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },774772 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },775773 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },774774+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },776775 { 0, }777776};778777
+6-7
drivers/i2c/busses/i2c-mxs.c
···365365 struct device_node *node = dev->of_node;366366 int ret;367367368368- if (!node)369369- return -EINVAL;370370-371371- i2c->speed = &mxs_i2c_95kHz_config;372368 ret = of_property_read_u32(node, "clock-frequency", &speed);373369 if (ret)374370 dev_warn(dev, "No I2C speed selected, using 100kHz\n");···415419 return err;416420417421 i2c->dev = dev;422422+ i2c->speed = &mxs_i2c_95kHz_config;418423419419- err = mxs_i2c_get_ofdata(i2c);420420- if (err)421421- return err;424424+ if (dev->of_node) {425425+ err = mxs_i2c_get_ofdata(i2c);426426+ if (err)427427+ return err;428428+ }422429423430 platform_set_drvdata(pdev, i2c);424431
+31-22
drivers/i2c/busses/i2c-pnx.c
···4848 mcntrl_afie = 0x00000002,4949 mcntrl_naie = 0x00000004,5050 mcntrl_drmie = 0x00000008,5151- mcntrl_daie = 0x00000020,5252- mcntrl_rffie = 0x00000040,5151+ mcntrl_drsie = 0x00000010,5252+ mcntrl_rffie = 0x00000020,5353+ mcntrl_daie = 0x00000040,5354 mcntrl_tffie = 0x00000080,5455 mcntrl_reset = 0x00000100,5556 mcntrl_cdbmode = 0x00000400,···291290 * or we didn't 'ask' for it yet.292291 */293292 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {294294- dev_dbg(&alg_data->adapter.dev,295295- "%s(): Write dummy data to fill Rx-fifo...\n",296296- __func__);293293+ /* 'Asking' is done asynchronously, e.g. dummy TX of several294294+ * bytes is done before the first actual RX arrives in FIFO.295295+ * Therefore, ordered bytes (via TX) are counted separately.296296+ */297297+ if (alg_data->mif.order) {298298+ dev_dbg(&alg_data->adapter.dev,299299+ "%s(): Write dummy data to fill Rx-fifo...\n",300300+ __func__);297301298298- if (alg_data->mif.len == 1) {299299- /* Last byte, do not acknowledge next rcv. */300300- val |= stop_bit;302302+ if (alg_data->mif.order == 1) {303303+ /* Last byte, do not acknowledge next rcv. */304304+ val |= stop_bit;305305+306306+ /*307307+ * Enable interrupt RFDAIE (data in Rx fifo),308308+ * and disable DRMIE (need data for Tx)309309+ */310310+ ctl = ioread32(I2C_REG_CTL(alg_data));311311+ ctl |= mcntrl_rffie | mcntrl_daie;312312+ ctl &= ~mcntrl_drmie;313313+ iowrite32(ctl, I2C_REG_CTL(alg_data));314314+ }301315302316 /*303303- * Enable interrupt RFDAIE (data in Rx fifo),304304- * and disable DRMIE (need data for Tx)317317+ * Now we'll 'ask' for data:318318+ * For each byte we want to receive, we must319319+ * write a (dummy) byte to the Tx-FIFO.305320 */306306- ctl = ioread32(I2C_REG_CTL(alg_data));307307- ctl |= mcntrl_rffie | mcntrl_daie;308308- ctl &= ~mcntrl_drmie;309309- iowrite32(ctl, I2C_REG_CTL(alg_data));321321+ iowrite32(val, I2C_REG_TX(alg_data));322322+ alg_data->mif.order--;310323 }311311-312312- /*313313- * Now we'll 'ask' for data:314314- * For each byte we want to receive, we must315315- * write a (dummy) byte to the Tx-FIFO.316316- */317317- iowrite32(val, I2C_REG_TX(alg_data));318318-319324 return 0;320325 }321326···521514522515 alg_data->mif.buf = pmsg->buf;523516 alg_data->mif.len = pmsg->len;517517+ alg_data->mif.order = pmsg->len;524518 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?525519 I2C_SMBUS_READ : I2C_SMBUS_WRITE;526520 alg_data->mif.ret = 0;···574566 /* Cleanup to be sure... */575567 alg_data->mif.buf = NULL;576568 alg_data->mif.len = 0;569569+ alg_data->mif.order = 0;577570578571 dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",579572 __func__, ioread32(I2C_REG_STS(alg_data)));
+20-2
drivers/i2c/i2c-core.c
···637637}638638639639/*640640+ * This function is only needed for mutex_lock_nested, so it is never641641+ * called unless locking correctness checking is enabled. Thus we642642+ * make it inline to avoid a compiler warning. That's what gcc ends up643643+ * doing anyway.644644+ */645645+static inline unsigned int i2c_adapter_depth(struct i2c_adapter *adapter)646646+{647647+ unsigned int depth = 0;648648+649649+ while ((adapter = i2c_parent_is_i2c_adapter(adapter)))650650+ depth++;651651+652652+ return depth;653653+}654654+655655+/*640656 * Let users instantiate I2C devices through sysfs. This can be used when641657 * platform initialization code doesn't contain the proper data for642658 * whatever reason. Also useful for drivers that do device detection and···742726743727 /* Make sure the device was added through sysfs */744728 res = -ENOENT;745745- mutex_lock(&adap->userspace_clients_lock);729729+ mutex_lock_nested(&adap->userspace_clients_lock,730730+ i2c_adapter_depth(adap));746731 list_for_each_entry_safe(client, next, &adap->userspace_clients,747732 detected) {748733 if (client->addr == addr) {···10901073 return res;1091107410921075 /* Remove devices instantiated from sysfs */10931093- mutex_lock(&adap->userspace_clients_lock);10761076+ mutex_lock_nested(&adap->userspace_clients_lock,10771077+ i2c_adapter_depth(adap));10941078 list_for_each_entry_safe(client, next, &adap->userspace_clients,10951079 detected) {10961080 dev_dbg(&adap->dev, "Removing %s at 0x%x\n", client->name,
+1-1
drivers/iio/adc/at91_adc.c
···617617 st->adc_clk = clk_get(&pdev->dev, "adc_op_clk");618618 if (IS_ERR(st->adc_clk)) {619619 dev_err(&pdev->dev, "Failed to get the ADC clock.\n");620620- ret = PTR_ERR(st->clk);620620+ ret = PTR_ERR(st->adc_clk);621621 goto error_disable_clk;622622 }623623
+3
drivers/input/keyboard/imx_keypad.c
···358358 /* Inhibit KDI and KRI interrupts. */359359 reg_val = readw(keypad->mmio_base + KPSR);360360 reg_val &= ~(KBD_STAT_KRIE | KBD_STAT_KDIE);361361+ reg_val |= KBD_STAT_KPKR | KBD_STAT_KPKD;361362 writew(reg_val, keypad->mmio_base + KPSR);362363363364 /* Colums as open drain and disable all rows */···516515 input_set_drvdata(input_dev, keypad);517516518517 /* Ensure that the keypad will stay dormant until opened */518518+ clk_enable(keypad->clk);519519 imx_keypad_inhibit(keypad);520520+ clk_disable(keypad->clk);520521521522 error = request_irq(irq, imx_keypad_irq_handler, 0,522523 pdev->name, keypad);
···7474static int mfd_add_device(struct device *parent, int id,7575 const struct mfd_cell *cell,7676 struct resource *mem_base,7777- int irq_base)7777+ int irq_base, struct irq_domain *domain)7878{7979 struct resource *res;8080 struct platform_device *pdev;8181 struct device_node *np = NULL;8282- struct irq_domain *domain = NULL;8382 int ret = -ENOMEM;8483 int r;8584···9697 for_each_child_of_node(parent->of_node, np) {9798 if (of_device_is_compatible(np, cell->of_compatible)) {9899 pdev->dev.of_node = np;9999- domain = irq_find_host(parent->of_node);100100 break;101101 }102102 }···175177int mfd_add_devices(struct device *parent, int id,176178 struct mfd_cell *cells, int n_devs,177179 struct resource *mem_base,178178- int irq_base)180180+ int irq_base, struct irq_domain *domain)179181{180182 int i;181183 int ret = 0;···189191 for (i = 0; i < n_devs; i++) {190192 atomic_set(&cnts[i], 0);191193 cells[i].usage_count = &cnts[i];192192- ret = mfd_add_device(parent, id, cells + i, mem_base, irq_base);194194+ ret = mfd_add_device(parent, id, cells + i, mem_base,195195+ irq_base, domain);193196 if (ret)194197 break;195198 }···246247 for (i = 0; i < n_clones; i++) {247248 cell_entry.name = clones[i];248249 /* don't give up if a single call fails; just report error */249249- if (mfd_add_device(pdev->dev.parent, -1, &cell_entry, NULL, 0))250250+ if (mfd_add_device(pdev->dev.parent, -1, &cell_entry, NULL, 0,251251+ NULL))250252 dev_err(dev, "failed to create platform device '%s'\n",251253 clones[i]);252254 }
+2-1
drivers/mfd/palmas.c
···453453454454 ret = mfd_add_devices(palmas->dev, -1,455455 children, ARRAY_SIZE(palmas_children),456456- NULL, regmap_irq_chip_get_base(palmas->irq_data));456456+ NULL, regmap_irq_chip_get_base(palmas->irq_data),457457+ NULL);457458 kfree(children);458459459460 if (ret < 0)
···146146147147 ret = mfd_add_devices(tps65912->dev, -1,148148 tps65912s, ARRAY_SIZE(tps65912s),149149- NULL, 0);149149+ NULL, 0, NULL);150150 if (ret < 0)151151 goto err;152152
+1-1
drivers/mfd/twl4030-audio.c
···255255256256 if (childs)257257 ret = mfd_add_devices(&pdev->dev, pdev->id, audio->cells,258258- childs, NULL, 0);258258+ childs, NULL, 0, NULL);259259 else {260260 dev_err(&pdev->dev, "No platform data found for childs\n");261261 ret = -ENODEV;
+1-1
drivers/mfd/twl6040-core.c
···632632 }633633634634 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,635635- NULL, 0);635635+ NULL, 0, NULL);636636 if (ret)637637 goto mfd_err;638638
+1-1
drivers/mfd/vx855.c
···102102 vx855_gpio_resources[1].end = vx855_gpio_resources[1].start + 3;103103104104 ret = mfd_add_devices(&pdev->dev, -1, vx855_cells, ARRAY_SIZE(vx855_cells),105105- NULL, 0);105105+ NULL, 0, NULL);106106107107 /* we always return -ENODEV here in order to enable other108108 * drivers like old, not-yet-platform_device ported i2c-viapro */
+1-1
drivers/mfd/wl1273-core.c
···241241 __func__, children);242242243243 r = mfd_add_devices(&client->dev, -1, core->cells,244244- children, NULL, 0);244244+ children, NULL, 0, NULL);245245 if (r)246246 goto err;247247
+8-8
drivers/mfd/wm831x-core.c
···18131813 case WM8310:18141814 ret = mfd_add_devices(wm831x->dev, wm831x_num,18151815 wm8310_devs, ARRAY_SIZE(wm8310_devs),18161816- NULL, 0);18161816+ NULL, 0, NULL);18171817 break;1818181818191819 case WM8311:18201820 ret = mfd_add_devices(wm831x->dev, wm831x_num,18211821 wm8311_devs, ARRAY_SIZE(wm8311_devs),18221822- NULL, 0);18221822+ NULL, 0, NULL);18231823 if (!pdata || !pdata->disable_touch)18241824 mfd_add_devices(wm831x->dev, wm831x_num,18251825 touch_devs, ARRAY_SIZE(touch_devs),18261826- NULL, 0);18261826+ NULL, 0, NULL);18271827 break;1828182818291829 case WM8312:18301830 ret = mfd_add_devices(wm831x->dev, wm831x_num,18311831 wm8312_devs, ARRAY_SIZE(wm8312_devs),18321832- NULL, 0);18321832+ NULL, 0, NULL);18331833 if (!pdata || !pdata->disable_touch)18341834 mfd_add_devices(wm831x->dev, wm831x_num,18351835 touch_devs, ARRAY_SIZE(touch_devs),18361836- NULL, 0);18361836+ NULL, 0, NULL);18371837 break;1838183818391839 case WM8320:···18421842 case WM8326:18431843 ret = mfd_add_devices(wm831x->dev, wm831x_num,18441844 wm8320_devs, ARRAY_SIZE(wm8320_devs),18451845- NULL, 0);18451845+ NULL, 0, NULL);18461846 break;1847184718481848 default:···18671867 if (ret & WM831X_XTAL_ENA) {18681868 ret = mfd_add_devices(wm831x->dev, wm831x_num,18691869 rtc_devs, ARRAY_SIZE(rtc_devs),18701870- NULL, 0);18701870+ NULL, 0, NULL);18711871 if (ret != 0) {18721872 dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret);18731873 goto err_irq;···18801880 /* Treat errors as non-critical */18811881 ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs,18821882 ARRAY_SIZE(backlight_devs), NULL,18831883- 0);18831883+ 0, NULL);18841884 if (ret < 0)18851885 dev_err(wm831x->dev, "Failed to add backlight: %d\n",18861886 ret);
···20462046 */20472047 bnx2x_setup_tc(bp->dev, bp->max_cos);2048204820492049+ /* Add all NAPI objects */20502050+ bnx2x_add_all_napi(bp);20492051 bnx2x_napi_enable(bp);2050205220512053 /* set pf load just before approaching the MCP */···2410240824112409 /* Disable HW interrupts, NAPI */24122410 bnx2x_netif_stop(bp, 1);24112411+ /* Delete all NAPI objects */24122412+ bnx2x_del_all_napi(bp);2413241324142414 /* Release IRQs */24152415 bnx2x_free_irq(bp);
+7-8
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h
···710710 prod = txdata->tx_bd_prod;711711 cons = txdata->tx_bd_cons;712712713713- /* NUM_TX_RINGS = number of "next-page" entries714714- It will be used as a threshold */715715- used = SUB_S16(prod, cons) + (s16)NUM_TX_RINGS;713713+ used = SUB_S16(prod, cons);716714717715#ifdef BNX2X_STOP_ON_ERROR718716 WARN_ON(used < 0);719719- WARN_ON(used > bp->tx_ring_size);720720- WARN_ON((bp->tx_ring_size - used) > MAX_TX_AVAIL);717717+ WARN_ON(used > txdata->tx_ring_size);718718+ WARN_ON((txdata->tx_ring_size - used) > MAX_TX_AVAIL);721719#endif722720723723- return (s16)(bp->tx_ring_size) - used;721721+ return (s16)(txdata->tx_ring_size) - used;724722}725723726724static inline int bnx2x_tx_queue_has_work(struct bnx2x_fp_txdata *txdata)···790792 bp->num_napi_queues = bp->num_queues;791793792794 /* Add NAPI objects */793793- for_each_napi_rx_queue(bp, i)795795+ for_each_rx_queue(bp, i)794796 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi),795797 bnx2x_poll, BNX2X_NAPI_WEIGHT);796798}···799801{800802 int i;801803802802- for_each_napi_rx_queue(bp, i)804804+ for_each_rx_queue(bp, i)803805 netif_napi_del(&bnx2x_fp(bp, i, napi));804806}805807···10861088 txdata->txq_index = txq_index;10871089 txdata->tx_cons_sb = tx_cons_sb;10881090 txdata->parent_fp = fp;10911091+ txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size;1089109210901093 DP(NETIF_MSG_IFUP, "created tx data cid %d, txq %d\n",10911094 txdata->cid, txdata->txq_index);
···26672667 return bnx2x_status;2668266826692669 DP(NETIF_MSG_LINK, "About to update PFC in BMAC\n");26702670- if (CHIP_IS_E3(bp))26712671- bnx2x_update_pfc_xmac(params, vars, 0);26722672- else {26702670+26712671+ if (CHIP_IS_E3(bp)) {26722672+ if (vars->mac_type == MAC_TYPE_XMAC)26732673+ bnx2x_update_pfc_xmac(params, vars, 0);26742674+ } else {26732675 val = REG_RD(bp, MISC_REG_RESET_REG_2);26742676 if ((val &26752677 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port))···54345432 switch (speed_mask) {54355433 case GP_STATUS_10M:54365434 vars->line_speed = SPEED_10;54375437- if (vars->duplex == DUPLEX_FULL)54355435+ if (is_duplex == DUPLEX_FULL)54385436 vars->link_status |= LINK_10TFD;54395437 else54405438 vars->link_status |= LINK_10THD;···5442544054435441 case GP_STATUS_100M:54445442 vars->line_speed = SPEED_100;54455445- if (vars->duplex == DUPLEX_FULL)54435443+ if (is_duplex == DUPLEX_FULL)54465444 vars->link_status |= LINK_100TXFD;54475445 else54485446 vars->link_status |= LINK_100TXHD;···54515449 case GP_STATUS_1G:54525450 case GP_STATUS_1G_KX:54535451 vars->line_speed = SPEED_1000;54545454- if (vars->duplex == DUPLEX_FULL)54525452+ if (is_duplex == DUPLEX_FULL)54555453 vars->link_status |= LINK_1000TFD;54565454 else54575455 vars->link_status |= LINK_1000THD;···5459545754605458 case GP_STATUS_2_5G:54615459 vars->line_speed = SPEED_2500;54625462- if (vars->duplex == DUPLEX_FULL)54605460+ if (is_duplex == DUPLEX_FULL)54635461 vars->link_status |= LINK_2500TFD;54645462 else54655463 vars->link_status |= LINK_2500THD;···5533553155345532 if (gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS) {55355533 if (SINGLE_MEDIA_DIRECT(params)) {55345534+ vars->duplex = duplex;55365535 bnx2x_flow_ctrl_resolve(phy, params, vars, gp_status);55375536 if (phy->req_line_speed == SPEED_AUTO_NEG)55385537 bnx2x_xgxs_an_resolve(phy, params, vars,···56285625 LINK_STATUS_PARALLEL_DETECTION_USED;56295626 }56305627 bnx2x_ext_phy_resolve_fc(phy, params, vars);56285628+ vars->duplex = duplex;56315629 }56325630 }56335631
+25-14
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
···75617561 }7562756275637563 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);75647564- if (rc < 0)75647564+75657565+ if (rc == -EEXIST) {75667566+ DP(BNX2X_MSG_SP, "Failed to schedule ADD operations: %d\n", rc);75677567+ /* do not treat adding same MAC as error */75687568+ rc = 0;75697569+ } else if (rc < 0)75657570 BNX2X_ERR("%s MAC failed\n", (set ? "Set" : "Del"));75717571+75667572 return rc;75677573}75687574···8433842784348428 /* Disable HW interrupts, NAPI */84358429 bnx2x_netif_stop(bp, 1);84308430+ /* Delete all NAPI objects */84318431+ bnx2x_del_all_napi(bp);8436843284378433 /* Release IRQs */84388434 bnx2x_free_irq(bp);···1030010292 dev_info.port_hw_config[port].1030110293 fcoe_wwn_node_name_lower);1030210294 } else if (!IS_MF_SD(bp)) {1030310303- u32 cfg = MF_CFG_RD(bp, func_ext_config[func].func_cfg);1030410304-1030510295 /*1030610296 * Read the WWN info only if the FCoE feature is enabled for1030710297 * this function.1030810298 */1030910309- if (cfg & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD)1029910299+ if (BNX2X_MF_EXT_PROTOCOL_FCOE(bp) && !CHIP_IS_E1x(bp))1031010300 bnx2x_get_ext_wwn_info(bp, func);10311103011031210302 } else if (IS_MF_FCOE_SD(bp))···1107711071 netdev_for_each_uc_addr(ha, dev) {1107811072 rc = bnx2x_set_mac_one(bp, bnx2x_uc_addr(ha), mac_obj, true,1107911073 BNX2X_UC_LIST_MAC, &ramrod_flags);1108011080- if (rc < 0) {1107411074+ if (rc == -EEXIST) {1107511075+ DP(BNX2X_MSG_SP,1107611076+ "Failed to schedule ADD operations: %d\n", rc);1107711077+ /* do not treat adding same MAC as error */1107811078+ rc = 0;1107911079+1108011080+ } else if (rc < 0) {1108111081+1108111082 BNX2X_ERR("Failed to schedule ADD operations: %d\n",1108211083 rc);1108311084 return rc;···1124211229static void poll_bnx2x(struct net_device *dev)1124311230{1124411231 struct bnx2x *bp = netdev_priv(dev);1123211232+ int i;11245112331124611246- disable_irq(bp->pdev->irq);1124711247- bnx2x_interrupt(bp->pdev->irq, dev);1124811248- enable_irq(bp->pdev->irq);1123411234+ for_each_eth_queue(bp, i) {1123511235+ struct bnx2x_fastpath *fp = &bp->fp[i];1123611236+ napi_schedule(&bnx2x_fp(bp, fp->index, napi));1123711237+ }1124911238}1125011239#endif1125111240···1191411899 */1191511900 bnx2x_set_int_mode(bp);11916119011191711917- /* Add all NAPI objects */1191811918- bnx2x_add_all_napi(bp);1191911919-1192011902 rc = register_netdev(dev);1192111903 if (rc) {1192211904 dev_err(&pdev->dev, "Cannot register net device\n");···11988119761198911977 unregister_netdev(dev);11990119781199111991- /* Delete all NAPI objects */1199211992- bnx2x_del_all_napi(bp);1199311993-1199411979 /* Power on: we can't let PCI layer write to us while we are in D3 */1199511980 bnx2x_set_power_state(bp, PCI_D0);1199611981···1203412025 bnx2x_tx_disable(bp);12035120261203612027 bnx2x_netif_stop(bp, 0);1202812028+ /* Delete all NAPI objects */1202912029+ bnx2x_del_all_napi(bp);12037120301203812031 del_timer_sync(&bp->timer);1203912032
+10-5
drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c
···101101 if (CHIP_REV_IS_SLOW(bp))102102 return;103103104104+ /* Update MCP's statistics if possible */105105+ if (bp->func_stx)106106+ memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,107107+ sizeof(bp->func_stats));108108+104109 /* loader */105110 if (bp->executer_idx) {106111 int loader_idx = PMF_DMAE_C(bp);···133128134129 } else if (bp->func_stx) {135130 *stats_comp = 0;136136- memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,137137- sizeof(bp->func_stats));138131 bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));139132 }140133}···11541151 if (bp->port.pmf)11551152 bnx2x_hw_stats_update(bp);1156115311571157- if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {11581158- BNX2X_ERR("storm stats were not updated for 3 times\n");11591159- bnx2x_panic();11541154+ if (bnx2x_storm_stats_update(bp)) {11551155+ if (bp->stats_pending++ == 3) {11561156+ BNX2X_ERR("storm stats were not updated for 3 times\n");11571157+ bnx2x_panic();11581158+ }11601159 return;11611160 }11621161
+5-5
drivers/net/ethernet/cirrus/cs89x0.c
···12431243{12441244 struct net_local *lp = netdev_priv(dev);12451245 unsigned long flags;12461246+ u16 cfg;1246124712471248 spin_lock_irqsave(&lp->lock, flags);12481249 if (dev->flags & IFF_PROMISC)···12611260 /* in promiscuous mode, we accept errored packets,12621261 * so we have to enable interrupts on them also12631262 */12641264- writereg(dev, PP_RxCFG,12651265- (lp->curr_rx_cfg |12661266- (lp->rx_mode == RX_ALL_ACCEPT)12671267- ? (RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | RX_EXTRA_DATA_ENBL)12681268- : 0));12631263+ cfg = lp->curr_rx_cfg;12641264+ if (lp->rx_mode == RX_ALL_ACCEPT)12651265+ cfg |= RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | RX_EXTRA_DATA_ENBL;12661266+ writereg(dev, PP_RxCFG, cfg);12691267 spin_unlock_irqrestore(&lp->lock, flags);12701268}12711269
+4-2
drivers/net/ethernet/emulex/benet/be_cmds.c
···259259 int num = 0, status = 0;260260 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;261261262262- spin_lock_bh(&adapter->mcc_cq_lock);262262+ spin_lock(&adapter->mcc_cq_lock);263263 while ((compl = be_mcc_compl_get(adapter))) {264264 if (compl->flags & CQE_FLAGS_ASYNC_MASK) {265265 /* Interpret flags as an async trailer */···280280 if (num)281281 be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num);282282283283- spin_unlock_bh(&adapter->mcc_cq_lock);283283+ spin_unlock(&adapter->mcc_cq_lock);284284 return status;285285}286286···295295 if (be_error(adapter))296296 return -EIO;297297298298+ local_bh_disable();298299 status = be_process_mcc(adapter);300300+ local_bh_enable();299301300302 if (atomic_read(&mcc_obj->q.used) == 0)301303 break;
+2
drivers/net/ethernet/emulex/benet/be_main.c
···37633763 /* when interrupts are not yet enabled, just reap any pending37643764 * mcc completions */37653765 if (!netif_running(adapter->netdev)) {37663766+ local_bh_disable();37663767 be_process_mcc(adapter);37683768+ local_bh_enable();37673769 goto reschedule;37683770 }37693771
···310310 */311311 struct e1000_ring *tx_ring /* One per active queue */312312 ____cacheline_aligned_in_smp;313313+ u32 tx_fifo_limit;313314314315 struct napi_struct napi;315316
+23-25
drivers/net/ethernet/intel/e1000e/netdev.c
···35173517 }3518351835193519 /*35203520+ * Alignment of Tx data is on an arbitrary byte boundary with the35213521+ * maximum size per Tx descriptor limited only to the transmit35223522+ * allocation of the packet buffer minus 96 bytes with an upper35233523+ * limit of 24KB due to receive synchronization limitations.35243524+ */35253525+ adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,35263526+ 24 << 10);35273527+35283528+ /*35203529 * Disable Adaptive Interrupt Moderation if 2 full packets cannot35213530 * fit in receive buffer.35223531 */···47944785 return 1;47954786}4796478747974797-#define E1000_MAX_PER_TXD 819247984798-#define E1000_MAX_TXD_PWR 1247994799-48004788static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,48014789 unsigned int first, unsigned int max_per_txd,48024802- unsigned int nr_frags, unsigned int mss)47904790+ unsigned int nr_frags)48034791{48044792 struct e1000_adapter *adapter = tx_ring->adapter;48054793 struct pci_dev *pdev = adapter->pdev;···5029502350305024static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)50315025{50265026+ BUG_ON(size > tx_ring->count);50275027+50325028 if (e1000_desc_unused(tx_ring) >= size)50335029 return 0;50345030 return __e1000_maybe_stop_tx(tx_ring, size);50355031}5036503250375037-#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1)50385033static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,50395034 struct net_device *netdev)50405035{50415036 struct e1000_adapter *adapter = netdev_priv(netdev);50425037 struct e1000_ring *tx_ring = adapter->tx_ring;50435038 unsigned int first;50445044- unsigned int max_per_txd = E1000_MAX_PER_TXD;50455045- unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;50465039 unsigned int tx_flags = 0;50475040 unsigned int len = skb_headlen(skb);50485041 unsigned int nr_frags;···50615056 }5062505750635058 mss = skb_shinfo(skb)->gso_size;50645064- /*50655065- * The controller does a simple calculation to50665066- * make sure there is enough room in the FIFO before50675067- * initiating the DMA for each buffer. The calc is:50685068- * 4 = ceil(buffer len/mss). To make sure we don't50695069- * overrun the FIFO, adjust the max buffer len if mss50705070- * drops.50715071- */50725059 if (mss) {50735060 u8 hdr_len;50745074- max_per_txd = min(mss << 2, max_per_txd);50755075- max_txd_pwr = fls(max_per_txd) - 1;5076506150775062 /*50785063 * TSO Workaround for 82571/2/3 Controllers -- if skb->data···50925097 count++;50935098 count++;5094509950955095- count += TXD_USE_COUNT(len, max_txd_pwr);51005100+ count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);5096510150975102 nr_frags = skb_shinfo(skb)->nr_frags;50985103 for (f = 0; f < nr_frags; f++)50995099- count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),51005100- max_txd_pwr);51045104+ count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),51055105+ adapter->tx_fifo_limit);5101510651025107 if (adapter->hw.mac.tx_pkt_filtering)51035108 e1000_transfer_dhcp_info(adapter, skb);···51395144 tx_flags |= E1000_TX_FLAGS_NO_FCS;5140514551415146 /* if count is 0 then mapping error has occurred */51425142- count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss);51475147+ count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,51485148+ nr_frags);51435149 if (count) {51445150 skb_tx_timestamp(skb);5145515151465152 netdev_sent_queue(netdev, skb->len);51475153 e1000_tx_queue(tx_ring, tx_flags, count);51485154 /* Make sure there is space in the ring for the next send. */51495149- e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2);51505150-51555155+ e1000_maybe_stop_tx(tx_ring,51565156+ (MAX_SKB_FRAGS *51575157+ DIV_ROUND_UP(PAGE_SIZE,51585158+ adapter->tx_fifo_limit) + 2));51515159 } else {51525160 dev_kfree_skb_any(skb);51535161 tx_ring->buffer_info[first].time_stamp = 0;···63256327 adapter->hw.phy.autoneg_advertised = 0x2f;6326632863276329 /* ring size defaults */63286328- adapter->rx_ring->count = 256;63296329- adapter->tx_ring->count = 256;63306330+ adapter->rx_ring->count = E1000_DEFAULT_RXD;63316331+ adapter->tx_ring->count = E1000_DEFAULT_TXD;6330633263316333 /*63326334 * Initial Wake on LAN setting - If APM wake is enabled in
···20422042 return;20432043 }20442044 len = ETH_ALEN;20452045- ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, &bssid, &len);20452045+ ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, bssid,20462046+ &len);20462047 if (ret) {20472048 IPW_DEBUG_INFO("failed querying ordinals at line %d\n",20482049 __LINE__);
+3
drivers/net/wireless/iwlwifi/dvm/debugfs.c
···124124 const struct fw_img *img;125125 size_t bufsz;126126127127+ if (!iwl_is_ready_rf(priv))128128+ return -EAGAIN;129129+127130 /* default is to dump the entire data segment */128131 if (!priv->dbgfs_sram_offset && !priv->dbgfs_sram_len) {129132 priv->dbgfs_sram_offset = 0x800000;
···983983static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)984984{985985 int retval;986986+ u32 reg;986987987988 /*988989 * Allocate eeprom data.···995994 retval = rt2800_init_eeprom(rt2x00dev);996995 if (retval)997996 return retval;997997+998998+ /*999999+ * Enable rfkill polling by setting GPIO direction of the10001000+ * rfkill switch GPIO pin correctly.10011001+ */10021002+ rt2x00pci_register_read(rt2x00dev, GPIO_CTRL_CFG, ®);10031003+ rt2x00_set_field32(®, GPIO_CTRL_CFG_GPIOD_BIT2, 1);10041004+ rt2x00pci_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);99810059991006 /*10001007 * Initialize hw specifications.
+20-2
drivers/net/wireless/rt2x00/rt2800usb.c
···667667 skb_pull(entry->skb, RXINFO_DESC_SIZE);668668669669 /*670670- * FIXME: we need to check for rx_pkt_len validity670670+ * Check for rx_pkt_len validity. Return if invalid, leaving671671+ * rxdesc->size zeroed out by the upper level.671672 */673673+ if (unlikely(rx_pkt_len == 0 ||674674+ rx_pkt_len > entry->queue->data_size)) {675675+ ERROR(entry->queue->rt2x00dev,676676+ "Bad frame size %d, forcing to 0\n", rx_pkt_len);677677+ return;678678+ }679679+672680 rxd = (__le32 *)(entry->skb->data + rx_pkt_len);673681674682 /*···744736static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)745737{746738 int retval;739739+ u32 reg;747740748741 /*749742 * Allocate eeprom data.···756747 retval = rt2800_init_eeprom(rt2x00dev);757748 if (retval)758749 return retval;750750+751751+ /*752752+ * Enable rfkill polling by setting GPIO direction of the753753+ * rfkill switch GPIO pin correctly.754754+ */755755+ rt2x00usb_register_read(rt2x00dev, GPIO_CTRL_CFG, ®);756756+ rt2x00_set_field32(®, GPIO_CTRL_CFG_GPIOD_BIT2, 1);757757+ rt2x00usb_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);759758760759 /*761760 * Initialize hw specifications.···11741157 { USB_DEVICE(0x1690, 0x0744) },11751158 { USB_DEVICE(0x1690, 0x0761) },11761159 { USB_DEVICE(0x1690, 0x0764) },11601160+ /* ASUS */11611161+ { USB_DEVICE(0x0b05, 0x179d) },11771162 /* Cisco */11781163 { USB_DEVICE(0x167b, 0x4001) },11791164 /* EnGenius */···12411222 { USB_DEVICE(0x0b05, 0x1760) },12421223 { USB_DEVICE(0x0b05, 0x1761) },12431224 { USB_DEVICE(0x0b05, 0x1790) },12441244- { USB_DEVICE(0x0b05, 0x179d) },12451225 /* AzureWave */12461226 { USB_DEVICE(0x13d3, 0x3262) },12471227 { USB_DEVICE(0x13d3, 0x3284) },
+1-1
drivers/net/wireless/rt2x00/rt2x00dev.c
···629629 */630630 if (unlikely(rxdesc.size == 0 ||631631 rxdesc.size > entry->queue->data_size)) {632632- WARNING(rt2x00dev, "Wrong frame size %d max %d.\n",632632+ ERROR(rt2x00dev, "Wrong frame size %d max %d.\n",633633 rxdesc.size, entry->queue->data_size);634634 dev_kfree_skb(entry->skb);635635 goto renew_skb;
+9
drivers/net/wireless/rt2x00/rt61pci.c
···28322832static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev)28332833{28342834 int retval;28352835+ u32 reg;2835283628362837 /*28372838 * Disable power saving.···28492848 retval = rt61pci_init_eeprom(rt2x00dev);28502849 if (retval)28512850 return retval;28512851+28522852+ /*28532853+ * Enable rfkill polling by setting GPIO direction of the28542854+ * rfkill switch GPIO pin correctly.28552855+ */28562856+ rt2x00pci_register_read(rt2x00dev, MAC_CSR13, ®);28572857+ rt2x00_set_field32(®, MAC_CSR13_BIT13, 1);28582858+ rt2x00pci_register_write(rt2x00dev, MAC_CSR13, reg);2852285928532860 /*28542861 * Initialize hw specifications.
+1
drivers/net/wireless/rt2x00/rt61pci.h
···372372#define MAC_CSR13_BIT10 FIELD32(0x00000400)373373#define MAC_CSR13_BIT11 FIELD32(0x00000800)374374#define MAC_CSR13_BIT12 FIELD32(0x00001000)375375+#define MAC_CSR13_BIT13 FIELD32(0x00002000)375376376377/*377378 * MAC_CSR14: LED control register.
+9
drivers/net/wireless/rt2x00/rt73usb.c
···21772177static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)21782178{21792179 int retval;21802180+ u32 reg;2180218121812182 /*21822183 * Allocate eeprom data.···21892188 retval = rt73usb_init_eeprom(rt2x00dev);21902189 if (retval)21912190 return retval;21912191+21922192+ /*21932193+ * Enable rfkill polling by setting GPIO direction of the21942194+ * rfkill switch GPIO pin correctly.21952195+ */21962196+ rt2x00usb_register_read(rt2x00dev, MAC_CSR13, ®);21972197+ rt2x00_set_field32(®, MAC_CSR13_BIT15, 0);21982198+ rt2x00usb_register_write(rt2x00dev, MAC_CSR13, reg);2192219921932200 /*21942201 * Initialize hw specifications.
+3
drivers/net/wireless/rt2x00/rt73usb.h
···282282#define MAC_CSR13_BIT10 FIELD32(0x00000400)283283#define MAC_CSR13_BIT11 FIELD32(0x00000800)284284#define MAC_CSR13_BIT12 FIELD32(0x00001000)285285+#define MAC_CSR13_BIT13 FIELD32(0x00002000)286286+#define MAC_CSR13_BIT14 FIELD32(0x00004000)287287+#define MAC_CSR13_BIT15 FIELD32(0x00008000)285288286289/*287290 * MAC_CSR14: LED control register.
+10-29
drivers/net/xen-netfront.c
···5757static const struct ethtool_ops xennet_ethtool_ops;58585959struct netfront_cb {6060- struct page *page;6161- unsigned offset;6060+ int pull_to;6261};63626463#define NETFRONT_SKB_CB(skb) ((struct netfront_cb *)((skb)->cb))···866867 struct sk_buff *skb;867868868869 while ((skb = __skb_dequeue(rxq)) != NULL) {869869- struct page *page = NETFRONT_SKB_CB(skb)->page;870870- void *vaddr = page_address(page);871871- unsigned offset = NETFRONT_SKB_CB(skb)->offset;870870+ int pull_to = NETFRONT_SKB_CB(skb)->pull_to;872871873873- memcpy(skb->data, vaddr + offset,874874- skb_headlen(skb));875875-876876- if (page != skb_frag_page(&skb_shinfo(skb)->frags[0]))877877- __free_page(page);872872+ __pskb_pull_tail(skb, pull_to - skb_headlen(skb));878873879874 /* Ethernet work: Delayed to here as it peeks the header. */880875 skb->protocol = eth_type_trans(skb, dev);···906913 struct sk_buff_head errq;907914 struct sk_buff_head tmpq;908915 unsigned long flags;909909- unsigned int len;910916 int err;911917912918 spin_lock(&np->rx_lock);···947955 }948956 }949957950950- NETFRONT_SKB_CB(skb)->page =951951- skb_frag_page(&skb_shinfo(skb)->frags[0]);952952- NETFRONT_SKB_CB(skb)->offset = rx->offset;958958+ NETFRONT_SKB_CB(skb)->pull_to = rx->status;959959+ if (NETFRONT_SKB_CB(skb)->pull_to > RX_COPY_THRESHOLD)960960+ NETFRONT_SKB_CB(skb)->pull_to = RX_COPY_THRESHOLD;953961954954- len = rx->status;955955- if (len > RX_COPY_THRESHOLD)956956- len = RX_COPY_THRESHOLD;957957- skb_put(skb, len);958958-959959- if (rx->status > len) {960960- skb_shinfo(skb)->frags[0].page_offset =961961- rx->offset + len;962962- skb_frag_size_set(&skb_shinfo(skb)->frags[0], rx->status - len);963963- skb->data_len = rx->status - len;964964- } else {965965- __skb_fill_page_desc(skb, 0, NULL, 0, 0);966966- skb_shinfo(skb)->nr_frags = 0;967967- }962962+ skb_shinfo(skb)->frags[0].page_offset = rx->offset;963963+ skb_frag_size_set(&skb_shinfo(skb)->frags[0], rx->status);964964+ skb->data_len = rx->status;968965969966 i = xennet_fill_frags(np, skb, &tmpq);970967···980999 * receive throughout using the standard receive9811000 * buffer size was cut by 25%(!!!).9821001 */983983- skb->truesize += skb->data_len - (RX_COPY_THRESHOLD - len);10021002+ skb->truesize += skb->data_len - RX_COPY_THRESHOLD;9841003 skb->len += skb->data_len;98510049861005 if (rx->flags & XEN_NETRXF_csum_blank)
+6
drivers/pci/pci-driver.c
···280280{281281 struct drv_dev_and_id *ddi = _ddi;282282 struct device *dev = &ddi->dev->dev;283283+ struct device *parent = dev->parent;283284 int rc;284285286286+ /* The parent bridge must be in active state when probing */287287+ if (parent)288288+ pm_runtime_get_sync(parent);285289 /* Unbound PCI devices are always set to disabled and suspended.286290 * During probe, the device is set to enabled and active and the287291 * usage count is incremented. If the driver supports runtime PM,···302298 pm_runtime_set_suspended(dev);303299 pm_runtime_put_noidle(dev);304300 }301301+ if (parent)302302+ pm_runtime_put(parent);305303 return rc;306304}307305
+42
drivers/pci/pci-sysfs.c
···458458}459459struct device_attribute vga_attr = __ATTR_RO(boot_vga);460460461461+static void462462+pci_config_pm_runtime_get(struct pci_dev *pdev)463463+{464464+ struct device *dev = &pdev->dev;465465+ struct device *parent = dev->parent;466466+467467+ if (parent)468468+ pm_runtime_get_sync(parent);469469+ pm_runtime_get_noresume(dev);470470+ /*471471+ * pdev->current_state is set to PCI_D3cold during suspending,472472+ * so wait until suspending completes473473+ */474474+ pm_runtime_barrier(dev);475475+ /*476476+ * Only need to resume devices in D3cold, because config477477+ * registers are still accessible for devices suspended but478478+ * not in D3cold.479479+ */480480+ if (pdev->current_state == PCI_D3cold)481481+ pm_runtime_resume(dev);482482+}483483+484484+static void485485+pci_config_pm_runtime_put(struct pci_dev *pdev)486486+{487487+ struct device *dev = &pdev->dev;488488+ struct device *parent = dev->parent;489489+490490+ pm_runtime_put(dev);491491+ if (parent)492492+ pm_runtime_put_sync(parent);493493+}494494+461495static ssize_t462496pci_read_config(struct file *filp, struct kobject *kobj,463497 struct bin_attribute *bin_attr,···517483 } else {518484 size = count;519485 }486486+487487+ pci_config_pm_runtime_get(dev);520488521489 if ((off & 1) && size) {522490 u8 val;···565529 --size;566530 }567531532532+ pci_config_pm_runtime_put(dev);533533+568534 return count;569535}570536···587549 count = size;588550 }589551552552+ pci_config_pm_runtime_get(dev);553553+590554 if ((off & 1) && size) {591555 pci_user_write_config_byte(dev, off, data[off - init_off]);592556 off++;···626586 off++;627587 --size;628588 }589589+590590+ pci_config_pm_runtime_put(dev);629591630592 return count;631593}
···140140{141141 return 0;142142}143143+144144+static int pcie_port_runtime_idle(struct device *dev)145145+{146146+ /* Delay for a short while to prevent too frequent suspend/resume */147147+ pm_schedule_suspend(dev, 10);148148+ return -EBUSY;149149+}143150#else144151#define pcie_port_runtime_suspend NULL145152#define pcie_port_runtime_resume NULL153153+#define pcie_port_runtime_idle NULL146154#endif147155148156static const struct dev_pm_ops pcie_portdrv_pm_ops = {···163155 .resume_noirq = pcie_port_resume_noirq,164156 .runtime_suspend = pcie_port_runtime_suspend,165157 .runtime_resume = pcie_port_runtime_resume,158158+ .runtime_idle = pcie_port_runtime_idle,166159};167160168161#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)···209200 return status;210201211202 pci_save_state(dev);203203+ /*204204+ * D3cold may not work properly on some PCIe port, so disable205205+ * it by default.206206+ */207207+ dev->d3cold_allowed = false;212208 if (!pci_match_id(port_runtime_pm_black_list, dev))213209 pm_runtime_put_noidle(&dev->dev);214210
+17-14
drivers/pci/probe.c
···144144 case PCI_BASE_ADDRESS_MEM_TYPE_32:145145 break;146146 case PCI_BASE_ADDRESS_MEM_TYPE_1M:147147- dev_info(&dev->dev, "1M mem BAR treated as 32-bit BAR\n");147147+ /* 1M mem BAR treated as 32-bit BAR */148148 break;149149 case PCI_BASE_ADDRESS_MEM_TYPE_64:150150 flags |= IORESOURCE_MEM_64;151151 break;152152 default:153153- dev_warn(&dev->dev,154154- "mem unknown type %x treated as 32-bit BAR\n",155155- mem_type);153153+ /* mem unknown type treated as 32-bit BAR */156154 break;157155 }158156 return flags;···171173 u32 l, sz, mask;172174 u16 orig_cmd;173175 struct pci_bus_region region;176176+ bool bar_too_big = false, bar_disabled = false;174177175178 mask = type ? PCI_ROM_ADDRESS_MASK : ~0;176179180180+ /* No printks while decoding is disabled! */177181 if (!dev->mmio_always_on) {178182 pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);179183 pci_write_config_word(dev, PCI_COMMAND,···240240 goto fail;241241242242 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {243243- dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n",244244- pos);243243+ bar_too_big = true;245244 goto fail;246245 }247246···251252 region.start = 0;252253 region.end = sz64;253254 pcibios_bus_to_resource(dev, res, ®ion);255255+ bar_disabled = true;254256 } else {255257 region.start = l64;256258 region.end = l64 + sz64;257259 pcibios_bus_to_resource(dev, res, ®ion);258258- dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",259259- pos, res);260260 }261261 } else {262262 sz = pci_size(l, sz, mask);···266268 region.start = l;267269 region.end = l + sz;268270 pcibios_bus_to_resource(dev, res, ®ion);269269-270270- dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);271271 }272272273273- out:273273+ goto out;274274+275275+276276+fail:277277+ res->flags = 0;278278+out:274279 if (!dev->mmio_always_on)275280 pci_write_config_word(dev, PCI_COMMAND, orig_cmd);276281282282+ if (bar_too_big)283283+ dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", pos);284284+ if (res->flags && !bar_disabled)285285+ dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);286286+277287 return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;278278- fail:279279- res->flags = 0;280280- goto out;281288}282289283290static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
-2
drivers/platform/x86/acer-wmi.c
···21962196 interface->capability &= ~ACER_CAP_BRIGHTNESS;21972197 pr_info("Brightness must be controlled by acpi video driver\n");21982198 } else {21992199-#ifdef CONFIG_ACPI_VIDEO22002199 pr_info("Disabling ACPI video driver\n");22012200 acpi_video_unregister();22022202-#endif22032201 }2204220222052203 if (wmi_has_guid(WMID_GUID3)) {
+13-11
drivers/platform/x86/apple-gmux.c
···101101102102 for (i = 0; i < 4; i++) {103103 tmpval = (val >> (i * 8)) & 0xff;104104- outb(tmpval, port + i);104104+ outb(tmpval, gmux_data->iostart + port + i);105105 }106106}107107···142142 u8 val;143143144144 mutex_lock(&gmux_data->index_lock);145145- outb((port & 0xff), gmux_data->iostart + GMUX_PORT_READ);146145 gmux_index_wait_ready(gmux_data);146146+ outb((port & 0xff), gmux_data->iostart + GMUX_PORT_READ);147147+ gmux_index_wait_complete(gmux_data);147148 val = inb(gmux_data->iostart + GMUX_PORT_VALUE);148149 mutex_unlock(&gmux_data->index_lock);149150···167166 u32 val;168167169168 mutex_lock(&gmux_data->index_lock);170170- outb((port & 0xff), gmux_data->iostart + GMUX_PORT_READ);171169 gmux_index_wait_ready(gmux_data);170170+ outb((port & 0xff), gmux_data->iostart + GMUX_PORT_READ);171171+ gmux_index_wait_complete(gmux_data);172172 val = inl(gmux_data->iostart + GMUX_PORT_VALUE);173173 mutex_unlock(&gmux_data->index_lock);174174···463461 ver_release = gmux_read8(gmux_data, GMUX_PORT_VERSION_RELEASE);464462 if (ver_major == 0xff && ver_minor == 0xff && ver_release == 0xff) {465463 if (gmux_is_indexed(gmux_data)) {464464+ u32 version;466465 mutex_init(&gmux_data->index_lock);467466 gmux_data->indexed = true;467467+ version = gmux_read32(gmux_data,468468+ GMUX_PORT_VERSION_MAJOR);469469+ ver_major = (version >> 24) & 0xff;470470+ ver_minor = (version >> 16) & 0xff;471471+ ver_release = (version >> 8) & 0xff;468472 } else {469473 pr_info("gmux device not present\n");470474 ret = -ENODEV;471475 goto err_release;472476 }473473- pr_info("Found indexed gmux\n");474474- } else {475475- pr_info("Found gmux version %d.%d.%d\n", ver_major, ver_minor,476476- ver_release);477477 }478478+ pr_info("Found gmux version %d.%d.%d [%s]\n", ver_major, ver_minor,479479+ ver_release, (gmux_data->indexed ? "indexed" : "classic"));478480479481 memset(&props, 0, sizeof(props));480482 props.type = BACKLIGHT_PLATFORM;···511505 * Disable the other backlight choices.512506 */513507 acpi_video_dmi_promote_vendor();514514-#if defined (CONFIG_ACPI_VIDEO) || defined (CONFIG_ACPI_VIDEO_MODULE)515508 acpi_video_unregister();516516-#endif517509 apple_bl_unregister();518510519511 gmux_data->power_state = VGA_SWITCHEROO_ON;···597593 kfree(gmux_data);598594599595 acpi_video_dmi_demote_vendor();600600-#if defined (CONFIG_ACPI_VIDEO) || defined (CONFIG_ACPI_VIDEO_MODULE)601596 acpi_video_register();602602-#endif603597 apple_bl_register();604598}605599
+5-5
drivers/platform/x86/asus-laptop.c
···8585static char *bled_type = "unknown";86868787module_param(wled_type, charp, 0444);8888-MODULE_PARM_DESC(wlan_status, "Set the wled type on boot "8888+MODULE_PARM_DESC(wled_type, "Set the wled type on boot "8989 "(unknown, led or rfkill). "9090 "default is unknown");9191···863863 * The significance of others is yet to be found.864864 * If we don't find the method, we assume the device are present.865865 */866866- rv = acpi_evaluate_integer(asus->handle, "HRWS", NULL, &temp);866866+ rv = acpi_evaluate_integer(asus->handle, "HWRS", NULL, &temp);867867 if (!ACPI_FAILURE(rv))868868- len += sprintf(page + len, "HRWS value : %#x\n",868868+ len += sprintf(page + len, "HWRS value : %#x\n",869869 (uint) temp);870870 /*871871 * Another value for userspace: the ASYM method returns 0x02 for···17511751 * The significance of others is yet to be found.17521752 */17531753 status =17541754- acpi_evaluate_integer(asus->handle, "HRWS", NULL, &hwrs_result);17541754+ acpi_evaluate_integer(asus->handle, "HWRS", NULL, &hwrs_result);17551755 if (!ACPI_FAILURE(status))17561756- pr_notice(" HRWS returned %x", (int)hwrs_result);17561756+ pr_notice(" HWRS returned %x", (int)hwrs_result);1757175717581758 if (!acpi_check_handle(asus->handle, METHOD_WL_STATUS, NULL))17591759 asus->have_rsts = true;
-4
drivers/platform/x86/asus-wmi.c
···4747#include <linux/thermal.h>4848#include <acpi/acpi_bus.h>4949#include <acpi/acpi_drivers.h>5050-#ifdef CONFIG_ACPI_VIDEO5150#include <acpi/video.h>5252-#endif53515452#include "asus-wmi.h"5553···17021704 if (asus->driver->quirks->wmi_backlight_power)17031705 acpi_video_dmi_promote_vendor();17041706 if (!acpi_video_backlight_support()) {17051705-#ifdef CONFIG_ACPI_VIDEO17061707 pr_info("Disabling ACPI video driver\n");17071708 acpi_video_unregister();17081708-#endif17091709 err = asus_wmi_backlight_init(asus);17101710 if (err && err != -ENODEV)17111711 goto fail_backlight;
+6-4
drivers/platform/x86/eeepc-laptop.c
···610610611611 if (!bus) {612612 pr_warn("Unable to find PCI bus 1?\n");613613- goto out_unlock;613613+ goto out_put_dev;614614 }615615616616 if (pci_bus_read_config_dword(bus, 0, PCI_VENDOR_ID, &l)) {617617 pr_err("Unable to read PCI config space?\n");618618- goto out_unlock;618618+ goto out_put_dev;619619 }620620621621 absent = (l == 0xffffffff);···627627 absent ? "absent" : "present");628628 pr_warn("skipped wireless hotplug as probably "629629 "inappropriate for this model\n");630630- goto out_unlock;630630+ goto out_put_dev;631631 }632632633633 if (!blocked) {···635635 if (dev) {636636 /* Device already present */637637 pci_dev_put(dev);638638- goto out_unlock;638638+ goto out_put_dev;639639 }640640 dev = pci_scan_single_device(bus, 0);641641 if (dev) {···650650 pci_dev_put(dev);651651 }652652 }653653+out_put_dev:654654+ pci_dev_put(port);653655 }654656655657out_unlock:
-4
drivers/platform/x86/samsung-laptop.c
···2626#include <linux/seq_file.h>2727#include <linux/debugfs.h>2828#include <linux/ctype.h>2929-#ifdef CONFIG_ACPI_VIDEO3029#include <acpi/video.h>3131-#endif32303331/*3432 * This driver is needed because a number of Samsung laptops do not hook···15561558 samsung->handle_backlight = false;15571559 } else if (samsung->quirks->broken_acpi_video) {15581560 pr_info("Disabling ACPI video driver\n");15591559-#ifdef CONFIG_ACPI_VIDEO15601561 acpi_video_unregister();15611561-#endif15621562 }15631563#endif15641564
+7-6
drivers/platform/x86/thinkpad_acpi.c
···545545 */546546547547static int acpi_evalf(acpi_handle handle,548548- void *res, char *method, char *fmt, ...)548548+ int *res, char *method, char *fmt, ...)549549{550550 char *fmt0 = fmt;551551 struct acpi_object_list params;···606606 success = (status == AE_OK &&607607 out_obj.type == ACPI_TYPE_INTEGER);608608 if (success && res)609609- *(int *)res = out_obj.integer.value;609609+ *res = out_obj.integer.value;610610 break;611611 case 'v': /* void */612612 success = status == AE_OK;···73867386 * Add TPACPI_FAN_RD_ACPI_FANS ? */7387738773887388 switch (fan_status_access_mode) {73897389- case TPACPI_FAN_RD_ACPI_GFAN:73897389+ case TPACPI_FAN_RD_ACPI_GFAN: {73907390 /* 570, 600e/x, 770e, 770x */73917391+ int res;7391739273927392- if (unlikely(!acpi_evalf(gfan_handle, &s, NULL, "d")))73937393+ if (unlikely(!acpi_evalf(gfan_handle, &res, NULL, "d")))73937394 return -EIO;7394739573957396 if (likely(status))73967396- *status = s & 0x07;73977397+ *status = res & 0x07;7397739873987399 break;73997399-74007400+ }74007401 case TPACPI_FAN_RD_TPEC:74017402 /* all except 570, 600e/x, 770e, 770x */74027403 if (unlikely(!acpi_ec_read(fan_status_offset, &s)))
···104104 struct pwm_chip chip;105105 unsigned int clk_rate;106106 void __iomem *mmio_base;107107+ unsigned long period_cycles[NUM_PWM_CHANNEL];107108};108109109110static inline struct ehrpwm_pwm_chip *to_ehrpwm_pwm_chip(struct pwm_chip *chip)···211210 unsigned long long c;212211 unsigned long period_cycles, duty_cycles;213212 unsigned short ps_divval, tb_divval;213213+ int i;214214215215 if (period_ns < 0 || duty_ns < 0 || period_ns > NSEC_PER_SEC)216216 return -ERANGE;···230228 do_div(c, NSEC_PER_SEC);231229 duty_cycles = (unsigned long)c;232230 }231231+232232+ /*233233+ * Period values should be same for multiple PWM channels as IP uses234234+ * same period register for multiple channels.235235+ */236236+ for (i = 0; i < NUM_PWM_CHANNEL; i++) {237237+ if (pc->period_cycles[i] &&238238+ (pc->period_cycles[i] != period_cycles)) {239239+ /*240240+ * Allow channel to reconfigure period if no other241241+ * channels being configured.242242+ */243243+ if (i == pwm->hwpwm)244244+ continue;245245+246246+ dev_err(chip->dev, "Period value conflicts with channel %d\n",247247+ i);248248+ return -EINVAL;249249+ }250250+ }251251+252252+ pc->period_cycles[pwm->hwpwm] = period_cycles;233253234254 /* Configure clock prescaler to support Low frequency PWM wave */235255 if (set_prescale_div(period_cycles/PERIOD_MAX, &ps_divval,···344320345321static void ehrpwm_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)346322{323323+ struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip);324324+347325 if (test_bit(PWMF_ENABLED, &pwm->flags)) {348326 dev_warn(chip->dev, "Removing PWM device without disabling\n");349327 pm_runtime_put_sync(chip->dev);350328 }329329+330330+ /* set period value to zero on free */331331+ pc->period_cycles[pwm->hwpwm] = 0;351332}352333353334static const struct pwm_ops ehrpwm_pwm_ops = {
+109-15
drivers/regulator/tps65217-regulator.c
···2222#include <linux/err.h>2323#include <linux/platform_device.h>24242525+#include <linux/regulator/of_regulator.h>2526#include <linux/regulator/driver.h>2627#include <linux/regulator/machine.h>2728#include <linux/mfd/tps65217.h>···282281 NULL),283282};284283284284+#ifdef CONFIG_OF285285+static struct of_regulator_match reg_matches[] = {286286+ { .name = "dcdc1", .driver_data = (void *)TPS65217_DCDC_1 },287287+ { .name = "dcdc2", .driver_data = (void *)TPS65217_DCDC_2 },288288+ { .name = "dcdc3", .driver_data = (void *)TPS65217_DCDC_3 },289289+ { .name = "ldo1", .driver_data = (void *)TPS65217_LDO_1 },290290+ { .name = "ldo2", .driver_data = (void *)TPS65217_LDO_2 },291291+ { .name = "ldo3", .driver_data = (void *)TPS65217_LDO_3 },292292+ { .name = "ldo4", .driver_data = (void *)TPS65217_LDO_4 },293293+};294294+295295+static struct tps65217_board *tps65217_parse_dt(struct platform_device *pdev)296296+{297297+ struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent);298298+ struct device_node *node = tps->dev->of_node;299299+ struct tps65217_board *pdata;300300+ struct device_node *regs;301301+ int i, count;302302+303303+ regs = of_find_node_by_name(node, "regulators");304304+ if (!regs)305305+ return NULL;306306+307307+ count = of_regulator_match(pdev->dev.parent, regs,308308+ reg_matches, TPS65217_NUM_REGULATOR);309309+ of_node_put(regs);310310+ if ((count < 0) || (count > TPS65217_NUM_REGULATOR))311311+ return NULL;312312+313313+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);314314+ if (!pdata)315315+ return NULL;316316+317317+ for (i = 0; i < count; i++) {318318+ if (!reg_matches[i].init_data || !reg_matches[i].of_node)319319+ continue;320320+321321+ pdata->tps65217_init_data[i] = reg_matches[i].init_data;322322+ pdata->of_node[i] = reg_matches[i].of_node;323323+ }324324+325325+ return pdata;326326+}327327+#else328328+static struct tps65217_board *tps65217_parse_dt(struct platform_device *pdev)329329+{330330+ return NULL;331331+}332332+#endif333333+285334static int __devinit tps65217_regulator_probe(struct platform_device *pdev)286335{336336+ struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent);337337+ struct tps65217_board *pdata = dev_get_platdata(tps->dev);338338+ struct regulator_init_data *reg_data;287339 struct regulator_dev *rdev;288288- struct tps65217 *tps;289289- struct tps_info *info = &tps65217_pmic_regs[pdev->id];290340 struct regulator_config config = { };341341+ int i, ret;291342292292- /* Already set by core driver */293293- tps = dev_to_tps65217(pdev->dev.parent);294294- tps->info[pdev->id] = info;343343+ if (tps->dev->of_node)344344+ pdata = tps65217_parse_dt(pdev);295345296296- config.dev = &pdev->dev;297297- config.of_node = pdev->dev.of_node;298298- config.init_data = pdev->dev.platform_data;299299- config.driver_data = tps;346346+ if (!pdata) {347347+ dev_err(&pdev->dev, "Platform data not found\n");348348+ return -EINVAL;349349+ }300350301301- rdev = regulator_register(®ulators[pdev->id], &config);302302- if (IS_ERR(rdev))303303- return PTR_ERR(rdev);351351+ if (tps65217_chip_id(tps) != TPS65217) {352352+ dev_err(&pdev->dev, "Invalid tps chip version\n");353353+ return -ENODEV;354354+ }304355305305- platform_set_drvdata(pdev, rdev);356356+ platform_set_drvdata(pdev, tps);306357358358+ for (i = 0; i < TPS65217_NUM_REGULATOR; i++) {359359+360360+ reg_data = pdata->tps65217_init_data[i];361361+362362+ /*363363+ * Regulator API handles empty constraints but not NULL364364+ * constraints365365+ */366366+ if (!reg_data)367367+ continue;368368+369369+ /* Register the regulators */370370+ tps->info[i] = &tps65217_pmic_regs[i];371371+372372+ config.dev = tps->dev;373373+ config.init_data = reg_data;374374+ config.driver_data = tps;375375+ config.regmap = tps->regmap;376376+ if (tps->dev->of_node)377377+ config.of_node = pdata->of_node[i];378378+379379+ rdev = regulator_register(®ulators[i], &config);380380+ if (IS_ERR(rdev)) {381381+ dev_err(tps->dev, "failed to register %s regulator\n",382382+ pdev->name);383383+ ret = PTR_ERR(rdev);384384+ goto err_unregister_regulator;385385+ }386386+387387+ /* Save regulator for cleanup */388388+ tps->rdev[i] = rdev;389389+ }307390 return 0;391391+392392+err_unregister_regulator:393393+ while (--i >= 0)394394+ regulator_unregister(tps->rdev[i]);395395+396396+ return ret;308397}309398310399static int __devexit tps65217_regulator_remove(struct platform_device *pdev)311400{312312- struct regulator_dev *rdev = platform_get_drvdata(pdev);401401+ struct tps65217 *tps = platform_get_drvdata(pdev);402402+ unsigned int i;403403+404404+ for (i = 0; i < TPS65217_NUM_REGULATOR; i++)405405+ regulator_unregister(tps->rdev[i]);313406314407 platform_set_drvdata(pdev, NULL);315315- regulator_unregister(rdev);316408317409 return 0;318410}
+15-7
drivers/rtc/rtc-at91sam9.c
···5858 struct rtc_device *rtcdev;5959 u32 imr;6060 void __iomem *gpbr;6161+ int irq;6162};62636364#define rtt_readl(rtc, field) \···293292{294293 struct resource *r, *r_gpbr;295294 struct sam9_rtc *rtc;296296- int ret;295295+ int ret, irq;297296 u32 mr;298297299298 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);···303302 return -ENODEV;304303 }305304305305+ irq = platform_get_irq(pdev, 0);306306+ if (irq < 0) {307307+ dev_err(&pdev->dev, "failed to get interrupt resource\n");308308+ return irq;309309+ }310310+306311 rtc = kzalloc(sizeof *rtc, GFP_KERNEL);307312 if (!rtc)308313 return -ENOMEM;314314+315315+ rtc->irq = irq;309316310317 /* platform setup code should have handled this; sigh */311318 if (!device_can_wakeup(&pdev->dev))···354345 }355346356347 /* register irq handler after we know what name we'll use */357357- ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt,358358- IRQF_SHARED,348348+ ret = request_irq(rtc->irq, at91_rtc_interrupt, IRQF_SHARED,359349 dev_name(&rtc->rtcdev->dev), rtc);360350 if (ret) {361361- dev_dbg(&pdev->dev, "can't share IRQ %d?\n", AT91_ID_SYS);351351+ dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);362352 rtc_device_unregister(rtc->rtcdev);363353 goto fail_register;364354 }···394386395387 /* disable all interrupts */396388 rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));397397- free_irq(AT91_ID_SYS, rtc);389389+ free_irq(rtc->irq, rtc);398390399391 rtc_device_unregister(rtc->rtcdev);400392···431423 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);432424 if (rtc->imr) {433425 if (device_may_wakeup(&pdev->dev) && (mr & AT91_RTT_ALMIEN)) {434434- enable_irq_wake(AT91_ID_SYS);426426+ enable_irq_wake(rtc->irq);435427 /* don't let RTTINC cause wakeups */436428 if (mr & AT91_RTT_RTTINCIEN)437429 rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);···449441450442 if (rtc->imr) {451443 if (device_may_wakeup(&pdev->dev))452452- disable_irq_wake(AT91_ID_SYS);444444+ disable_irq_wake(rtc->irq);453445 mr = rtt_readl(rtc, MR);454446 rtt_writel(rtc, MR, mr | rtc->imr);455447 }
···24242424 }2425242524262426 /* command line tunables for max controller queue depth */24272427- if (max_queue_depth != -1)24282428- max_request_credit = (max_queue_depth < facts->RequestCredit)24292429- ? max_queue_depth : facts->RequestCredit;24302430- else24272427+ if (max_queue_depth != -1 && max_queue_depth != 0) {24282428+ max_request_credit = min_t(u16, max_queue_depth +24292429+ ioc->hi_priority_depth + ioc->internal_depth,24302430+ facts->RequestCredit);24312431+ if (max_request_credit > MAX_HBA_QUEUE_DEPTH)24322432+ max_request_credit = MAX_HBA_QUEUE_DEPTH;24332433+ } else24312434 max_request_credit = min_t(u16, facts->RequestCredit,24322435 MAX_HBA_QUEUE_DEPTH);24332436···25052502 /* set the scsi host can_queue depth25062503 * with some internal commands that could be outstanding25072504 */25082508- ioc->shost->can_queue = ioc->scsiio_depth - (2);25052505+ ioc->shost->can_queue = ioc->scsiio_depth;25092506 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "25102507 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));25112508
+10
drivers/scsi/scsi_error.c
···42424343#include <trace/events/scsi.h>44444545+static void scsi_eh_done(struct scsi_cmnd *scmd);4646+4547#define SENSE_TIMEOUT (10*HZ)46484749/*···242240243241 if (! scsi_command_normalize_sense(scmd, &sshdr))244242 return FAILED; /* no valid sense data */243243+244244+ if (scmd->cmnd[0] == TEST_UNIT_READY && scmd->scsi_done != scsi_eh_done)245245+ /*246246+ * nasty: for mid-layer issued TURs, we need to return the247247+ * actual sense data without any recovery attempt. For eh248248+ * issued ones, we need to try to recover and interpret249249+ */250250+ return SUCCESS;245251246252 if (scsi_sense_is_deferred(&sshdr))247253 return NEEDS_RETRY;
+4-1
drivers/scsi/scsi_lib.c
···776776 }777777778778 if (req->cmd_type == REQ_TYPE_BLOCK_PC) { /* SG_IO ioctl from block level */779779- req->errors = result;780779 if (result) {781780 if (sense_valid && req->sense) {782781 /*···791792 if (!sense_deferred)792793 error = __scsi_error_from_host_byte(cmd, result);793794 }795795+ /*796796+ * __scsi_error_from_host_byte may have reset the host_byte797797+ */798798+ req->errors = cmd->result;794799795800 req->resid_len = scsi_get_resid(cmd);796801
+10
drivers/scsi/scsi_scan.c
···764764 sdev->model = (char *) (sdev->inquiry + 16);765765 sdev->rev = (char *) (sdev->inquiry + 32);766766767767+ if (strncmp(sdev->vendor, "ATA ", 8) == 0) {768768+ /*769769+ * sata emulation layer device. This is a hack to work around770770+ * the SATL power management specifications which state that771771+ * when the SATL detects the device has gone into standby772772+ * mode, it shall respond with NOT READY.773773+ */774774+ sdev->allow_restart = 1;775775+ }776776+767777 if (*bflags & BLIST_ISROM) {768778 sdev->type = TYPE_ROM;769779 sdev->removable = 1;
···14121412 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");14131413 return -EINVAL;14141414 }14151415+ /*14161416+ * Need to 'get' the PCI device to match the 'put' in dio200_detach().14171417+ * TODO: Remove the pci_dev_get() and matching pci_dev_put() once14181418+ * support for manual attachment of PCI devices via dio200_attach()14191419+ * has been removed.14201420+ */14211421+ pci_dev_get(pci_dev);14151422 return dio200_pci_common_attach(dev, pci_dev);14161423}14171424
+7
drivers/staging/comedi/drivers/amplc_pc236.c
···565565 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");566566 return -EINVAL;567567 }568568+ /*569569+ * Need to 'get' the PCI device to match the 'put' in pc236_detach().570570+ * TODO: Remove the pci_dev_get() and matching pci_dev_put() once571571+ * support for manual attachment of PCI devices via pc236_attach()572572+ * has been removed.573573+ */574574+ pci_dev_get(pci_dev);568575 return pc236_pci_common_attach(dev, pci_dev);569576}570577
+7
drivers/staging/comedi/drivers/amplc_pc263.c
···298298 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");299299 return -EINVAL;300300 }301301+ /*302302+ * Need to 'get' the PCI device to match the 'put' in pc263_detach().303303+ * TODO: Remove the pci_dev_get() and matching pci_dev_put() once304304+ * support for manual attachment of PCI devices via pc263_attach()305305+ * has been removed.306306+ */307307+ pci_dev_get(pci_dev);301308 return pc263_pci_common_attach(dev, pci_dev);302309}303310
+7
drivers/staging/comedi/drivers/amplc_pci224.c
···15031503 DRIVER_NAME ": BUG! cannot determine board type!\n");15041504 return -EINVAL;15051505 }15061506+ /*15071507+ * Need to 'get' the PCI device to match the 'put' in pci224_detach().15081508+ * TODO: Remove the pci_dev_get() and matching pci_dev_put() once15091509+ * support for manual attachment of PCI devices via pci224_attach()15101510+ * has been removed.15111511+ */15121512+ pci_dev_get(pci_dev);15061513 return pci224_attach_common(dev, pci_dev, NULL);15071514}15081515
+7
drivers/staging/comedi/drivers/amplc_pci230.c
···29252925 "amplc_pci230: BUG! cannot determine board type!\n");29262926 return -EINVAL;29272927 }29282928+ /*29292929+ * Need to 'get' the PCI device to match the 'put' in pci230_detach().29302930+ * TODO: Remove the pci_dev_get() and matching pci_dev_put() once29312931+ * support for manual attachment of PCI devices via pci230_attach()29322932+ * has been removed.29332933+ */29342934+ pci_dev_get(pci_dev);29282935 return pci230_attach_common(dev, pci_dev);29292936}29302937
+9-2
drivers/staging/comedi/drivers/das08.c
···378378 int chan;379379380380 lsb = data[0] & 0xff;381381- msb = (data[0] >> 8) & 0xf;381381+ msb = (data[0] >> 8) & 0xff;382382383383 chan = CR_CHAN(insn->chanspec);384384···623623 .ai = das08_ai_rinsn,624624 .ai_nbits = 16,625625 .ai_pg = das08_pg_none,626626- .ai_encoding = das08_encode12,626626+ .ai_encoding = das08_encode16,627627 .ao = das08jr_ao_winsn,628628 .ao_nbits = 16,629629 .di = das08jr_di_rbits,···922922 dev_err(dev->class_dev, "BUG! cannot determine board type!\n");923923 return -EINVAL;924924 }925925+ /*926926+ * Need to 'get' the PCI device to match the 'put' in das08_detach().927927+ * TODO: Remove the pci_dev_get() and matching pci_dev_put() once928928+ * support for manual attachment of PCI devices via das08_attach()929929+ * has been removed.930930+ */931931+ pci_dev_get(pdev);925932 return das08_pci_attach_common(dev, pdev);926933}927934
+3-1
drivers/staging/iio/accel/lis3l02dq_ring.c
···121121 if (rx_array == NULL)122122 return -ENOMEM;123123 ret = lis3l02dq_read_all(indio_dev, rx_array);124124- if (ret < 0)124124+ if (ret < 0) {125125+ kfree(rx_array);125126 return ret;127127+ }126128 for (i = 0; i < scan_count; i++)127129 data[i] = combine_8_to_16(rx_array[i*4+1],128130 rx_array[i*4+3]);
+2
drivers/staging/iio/adc/ad7192.c
···647647 ret = strict_strtoul(buf, 10, &lval);648648 if (ret)649649 return ret;650650+ if (lval == 0)651651+ return -EINVAL;650652651653 mutex_lock(&indio_dev->mlock);652654 if (iio_buffer_enabled(indio_dev)) {
+2
drivers/staging/iio/gyro/adis16260_core.c
···195195 ret = strict_strtol(buf, 10, &val);196196 if (ret)197197 return ret;198198+ if (val == 0)199199+ return -EINVAL;198200199201 mutex_lock(&indio_dev->mlock);200202 if (spi_get_device_id(st->us)) {
+2
drivers/staging/iio/imu/adis16400_core.c
···234234 ret = strict_strtol(buf, 10, &val);235235 if (ret)236236 return ret;237237+ if (val == 0)238238+ return -EINVAL;237239238240 mutex_lock(&indio_dev->mlock);239241
+2
drivers/staging/iio/meter/ade7753.c
···425425 ret = strict_strtol(buf, 10, &val);426426 if (ret)427427 return ret;428428+ if (val == 0)429429+ return -EINVAL;428430429431 mutex_lock(&indio_dev->mlock);430432
+2
drivers/staging/iio/meter/ade7754.c
···445445 ret = strict_strtol(buf, 10, &val);446446 if (ret)447447 return ret;448448+ if (val == 0)449449+ return -EINVAL;448450449451 mutex_lock(&indio_dev->mlock);450452
+2
drivers/staging/iio/meter/ade7759.c
···385385 ret = strict_strtol(buf, 10, &val);386386 if (ret)387387 return ret;388388+ if (val == 0)389389+ return -EINVAL;388390389391 mutex_lock(&indio_dev->mlock);390392
+1-1
drivers/staging/nvec/nvec.c
···837837 }838838839839 ret = mfd_add_devices(nvec->dev, -1, nvec_devices,840840- ARRAY_SIZE(nvec_devices), base, 0);840840+ ARRAY_SIZE(nvec_devices), base, 0, NULL);841841 if (ret)842842 dev_err(nvec->dev, "error adding subdevices\n");843843
+32-9
drivers/staging/omapdrm/omap_connector.c
···4848 mode->vsync_end = mode->vsync_start + timings->vsw;4949 mode->vtotal = mode->vsync_end + timings->vbp;50505151- /* note: whether or not it is interlaced, +/- h/vsync, etc,5252- * which should be set in the mode flags, is not exposed in5353- * the omap_video_timings struct.. but hdmi driver tracks5454- * those separately so all we have to have to set the mode5555- * is the way to recover these timings values, and the5656- * omap_dss_driver would do the rest.5757- */5151+ mode->flags = 0;5252+5353+ if (timings->interlace)5454+ mode->flags |= DRM_MODE_FLAG_INTERLACE;5555+5656+ if (timings->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH)5757+ mode->flags |= DRM_MODE_FLAG_PHSYNC;5858+ else5959+ mode->flags |= DRM_MODE_FLAG_NHSYNC;6060+6161+ if (timings->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH)6262+ mode->flags |= DRM_MODE_FLAG_PVSYNC;6363+ else6464+ mode->flags |= DRM_MODE_FLAG_NVSYNC;5865}59666067static inline void copy_timings_drm_to_omap(struct omap_video_timings *timings,···7871 timings->vfp = mode->vsync_start - mode->vdisplay;7972 timings->vsw = mode->vsync_end - mode->vsync_start;8073 timings->vbp = mode->vtotal - mode->vsync_end;7474+7575+ timings->interlace = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);7676+7777+ if (mode->flags & DRM_MODE_FLAG_PHSYNC)7878+ timings->hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;7979+ else8080+ timings->hsync_level = OMAPDSS_SIG_ACTIVE_LOW;8181+8282+ if (mode->flags & DRM_MODE_FLAG_PVSYNC)8383+ timings->vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;8484+ else8585+ timings->vsync_level = OMAPDSS_SIG_ACTIVE_LOW;8686+8787+ timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;8888+ timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;8989+ timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;8190}82918392static void omap_connector_dpms(struct drm_connector *connector, int mode)···210187 }211188 } else {212189 struct drm_display_mode *mode = drm_mode_create(dev);213213- struct omap_video_timings timings;190190+ struct omap_video_timings timings = {0};214191215192 dssdrv->get_timings(dssdev, &timings);216193···314291 struct omap_connector *omap_connector = to_omap_connector(connector);315292 struct omap_dss_device *dssdev = omap_connector->dssdev;316293 struct omap_dss_driver *dssdrv = dssdev->driver;317317- struct omap_video_timings timings;294294+ struct omap_video_timings timings = {0};318295319296 copy_timings_drm_to_omap(&timings, mode);320297
+2-1
drivers/staging/ozwpan/ozcdev.c
···88#include <linux/cdev.h>99#include <linux/uaccess.h>1010#include <linux/netdevice.h>1111+#include <linux/etherdevice.h>1112#include <linux/poll.h>1213#include <linux/sched.h>1314#include "ozconfig.h"···214213 if (old_pd)215214 oz_pd_put(old_pd);216215 } else {217217- if (!memcmp(addr, "\0\0\0\0\0\0", sizeof(addr))) {216216+ if (is_zero_ether_addr(addr)) {218217 spin_lock_bh(&g_cdev.lock);219218 pd = g_cdev.active_pd;220219 g_cdev.active_pd = 0;
···263263 if (req->request.status == -EINPROGRESS)264264 req->request.status = status;265265266266- usb_gadget_unmap_request(&dwc->gadget, &req->request,267267- req->direction);266266+ if (dwc->ep0_bounced && dep->number == 0)267267+ dwc->ep0_bounced = false;268268+ else269269+ usb_gadget_unmap_request(&dwc->gadget, &req->request,270270+ req->direction);268271269272 dev_dbg(dwc->dev, "request %p from %s completed %d/%d ===> %d\n",270273 req, dep->name, req->request.actual,···10291026 if (list_empty(&dep->request_list)) {10301027 dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n",10311028 dep->name);10291029+ dep->flags |= DWC3_EP_PENDING_REQUEST;10321030 return;10331031 }10341032···10921088 */10931089 if (dep->flags & DWC3_EP_PENDING_REQUEST) {10941090 int ret;10911091+10921092+ /*10931093+ * If xfernotready is already elapsed and it is a case10941094+ * of isoc transfer, then issue END TRANSFER, so that10951095+ * you can receive xfernotready again and can have10961096+ * notion of current microframe.10971097+ */10981098+ if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {10991099+ dwc3_stop_active_transfer(dwc, dep->number);11001100+ return 0;11011101+ }1095110210961103 ret = __dwc3_gadget_kick_transfer(dep, 0, true);10971104 if (ret && ret != -EBUSY) {
···128128 else {129129 qtd = list_entry (qh->qtd_list.next,130130 struct ehci_qtd, qtd_list);131131- /* first qtd may already be partially processed */132132- if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)131131+ /*132132+ * first qtd may already be partially processed.133133+ * If we come here during unlink, the QH overlay region134134+ * might have reference to the just unlinked qtd. The135135+ * qtd is updated in qh_completions(). Update the QH136136+ * overlay here.137137+ */138138+ if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current) {139139+ qh->hw->hw_qtd_next = qtd->hw_next;133140 qtd = NULL;141141+ }134142 }135143136144 if (qtd)
+10
drivers/usb/host/ohci-at91.c
···570570571571 if (pdata) {572572 at91_for_each_port(i) {573573+ /*574574+ * do not configure PIO if not in relation with575575+ * real USB port on board576576+ */577577+ if (i >= pdata->ports) {578578+ pdata->vbus_pin[i] = -EINVAL;579579+ pdata->overcurrent_pin[i] = -EINVAL;580580+ break;581581+ }582582+573583 if (!gpio_is_valid(pdata->vbus_pin[i]))574584 continue;575585 gpio = pdata->vbus_pin[i];
+35-7
drivers/usb/host/pci-quirks.c
···7575#define NB_PIF0_PWRDOWN_1 0x0110001376767777#define USB_INTEL_XUSB2PR 0xD07878+#define USB_INTEL_USB2PRM 0xD47879#define USB_INTEL_USB3_PSSEN 0xD88080+#define USB_INTEL_USB3PRM 0xDC79818082static struct amd_chipset_info {8183 struct pci_dev *nb_dev;···774772 return;775773 }776774777777- ports_available = 0xffffffff;775775+ /* Read USB3PRM, the USB 3.0 Port Routing Mask Register776776+ * Indicate the ports that can be changed from OS.777777+ */778778+ pci_read_config_dword(xhci_pdev, USB_INTEL_USB3PRM,779779+ &ports_available);780780+781781+ dev_dbg(&xhci_pdev->dev, "Configurable ports to enable SuperSpeed: 0x%x\n",782782+ ports_available);783783+778784 /* Write USB3_PSSEN, the USB 3.0 Port SuperSpeed Enable779779- * Register, to turn on SuperSpeed terminations for all780780- * available ports.785785+ * Register, to turn on SuperSpeed terminations for the786786+ * switchable ports.781787 */782788 pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,783789 cpu_to_le32(ports_available));···795785 dev_dbg(&xhci_pdev->dev, "USB 3.0 ports that are now enabled "796786 "under xHCI: 0x%x\n", ports_available);797787798798- ports_available = 0xffffffff;788788+ /* Read XUSB2PRM, xHCI USB 2.0 Port Routing Mask Register789789+ * Indicate the USB 2.0 ports to be controlled by the xHCI host.790790+ */791791+792792+ pci_read_config_dword(xhci_pdev, USB_INTEL_USB2PRM,793793+ &ports_available);794794+795795+ dev_dbg(&xhci_pdev->dev, "Configurable USB 2.0 ports to hand over to xCHI: 0x%x\n",796796+ ports_available);797797+799798 /* Write XUSB2PR, the xHC USB 2.0 Port Routing Register, to800799 * switch the USB 2.0 power and data lines over to the xHCI801800 * host.···841822 void __iomem *op_reg_base;842823 u32 val;843824 int timeout;825825+ int len = pci_resource_len(pdev, 0);844826845827 if (!mmio_resource_enabled(pdev, 0))846828 return;847829848848- base = ioremap_nocache(pci_resource_start(pdev, 0),849849- pci_resource_len(pdev, 0));830830+ base = ioremap_nocache(pci_resource_start(pdev, 0), len);850831 if (base == NULL)851832 return;852833···856837 */857838 ext_cap_offset = xhci_find_next_cap_offset(base, XHCI_HCC_PARAMS_OFFSET);858839 do {840840+ if ((ext_cap_offset + sizeof(val)) > len) {841841+ /* We're reading garbage from the controller */842842+ dev_warn(&pdev->dev,843843+ "xHCI controller failing to respond");844844+ return;845845+ }846846+859847 if (!ext_cap_offset)860848 /* We've reached the end of the extended capabilities */861849 goto hc_init;850850+862851 val = readl(base + ext_cap_offset);863852 if (XHCI_EXT_CAPS_ID(val) == XHCI_EXT_CAPS_LEGACY)864853 break;···897870 /* Disable any BIOS SMIs and clear all SMI events*/898871 writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);899872873873+hc_init:900874 if (usb_is_intel_switchable_xhci(pdev))901875 usb_enable_xhci_ports(pdev);902902-hc_init:876876+903877 op_reg_base = base + XHCI_HC_LENGTH(readl(base));904878905879 /* Wait for the host controller to be ready before writing any
···493493 * when this bit is set.494494 */495495 pls |= USB_PORT_STAT_CONNECTION;496496+ } else {497497+ /*498498+ * If CAS bit isn't set but the Port is already at499499+ * Compliance Mode, fake a connection so the USB core500500+ * notices the Compliance state and resets the port.501501+ * This resolves an issue generated by the SN65LVPE502CP502502+ * in which sometimes the port enters compliance mode503503+ * caused by a delay on the host-device negotiation.504504+ */505505+ if (pls == USB_SS_PORT_LS_COMP_MOD)506506+ pls |= USB_PORT_STAT_CONNECTION;496507 }508508+497509 /* update status field */498510 *status |= pls;511511+}512512+513513+/*514514+ * Function for Compliance Mode Quirk.515515+ *516516+ * This Function verifies if all xhc USB3 ports have entered U0, if so,517517+ * the compliance mode timer is deleted. A port won't enter518518+ * compliance mode if it has previously entered U0.519519+ */520520+void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status, u16 wIndex)521521+{522522+ u32 all_ports_seen_u0 = ((1 << xhci->num_usb3_ports)-1);523523+ bool port_in_u0 = ((status & PORT_PLS_MASK) == XDEV_U0);524524+525525+ if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK))526526+ return;527527+528528+ if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) {529529+ xhci->port_status_u0 |= 1 << wIndex;530530+ if (xhci->port_status_u0 == all_ports_seen_u0) {531531+ del_timer_sync(&xhci->comp_mode_recovery_timer);532532+ xhci_dbg(xhci, "All USB3 ports have entered U0 already!\n");533533+ xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted.\n");534534+ }535535+ }499536}500537501538int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,···688651 /* Update Port Link State for super speed ports*/689652 if (hcd->speed == HCD_USB3) {690653 xhci_hub_report_link_state(&status, temp);654654+ /*655655+ * Verify if all USB3 Ports Have entered U0 already.656656+ * Delete Compliance Mode Timer if so.657657+ */658658+ xhci_del_comp_mod_timer(xhci, temp, wIndex);691659 }692660 if (bus_state->port_c_suspend & (1 << wIndex))693661 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
···2626#include <linux/module.h>2727#include <linux/moduleparam.h>2828#include <linux/slab.h>2929+#include <linux/dmi.h>29303031#include "xhci.h"3132···399398400399#endif401400401401+static void compliance_mode_recovery(unsigned long arg)402402+{403403+ struct xhci_hcd *xhci;404404+ struct usb_hcd *hcd;405405+ u32 temp;406406+ int i;407407+408408+ xhci = (struct xhci_hcd *)arg;409409+410410+ for (i = 0; i < xhci->num_usb3_ports; i++) {411411+ temp = xhci_readl(xhci, xhci->usb3_ports[i]);412412+ if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {413413+ /*414414+ * Compliance Mode Detected. Letting USB Core415415+ * handle the Warm Reset416416+ */417417+ xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",418418+ i + 1);419419+ xhci_dbg(xhci, "Attempting Recovery routine!\n");420420+ hcd = xhci->shared_hcd;421421+422422+ if (hcd->state == HC_STATE_SUSPENDED)423423+ usb_hcd_resume_root_hub(hcd);424424+425425+ usb_hcd_poll_rh_status(hcd);426426+ }427427+ }428428+429429+ if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))430430+ mod_timer(&xhci->comp_mode_recovery_timer,431431+ jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));432432+}433433+434434+/*435435+ * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver436436+ * that causes ports behind that hardware to enter compliance mode sometimes.437437+ * The quirk creates a timer that polls every 2 seconds the link state of438438+ * each host controller's port and recovers it by issuing a Warm reset439439+ * if Compliance mode is detected, otherwise the port will become "dead" (no440440+ * device connections or disconnections will be detected anymore). Becasue no441441+ * status event is generated when entering compliance mode (per xhci spec),442442+ * this quirk is needed on systems that have the failing hardware installed.443443+ */444444+static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)445445+{446446+ xhci->port_status_u0 = 0;447447+ init_timer(&xhci->comp_mode_recovery_timer);448448+449449+ xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;450450+ xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;451451+ xhci->comp_mode_recovery_timer.expires = jiffies +452452+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);453453+454454+ set_timer_slack(&xhci->comp_mode_recovery_timer,455455+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));456456+ add_timer(&xhci->comp_mode_recovery_timer);457457+ xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");458458+}459459+460460+/*461461+ * This function identifies the systems that have installed the SN65LVPE502CP462462+ * USB3.0 re-driver and that need the Compliance Mode Quirk.463463+ * Systems:464464+ * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820465465+ */466466+static bool compliance_mode_recovery_timer_quirk_check(void)467467+{468468+ const char *dmi_product_name, *dmi_sys_vendor;469469+470470+ dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);471471+ dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);472472+473473+ if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))474474+ return false;475475+476476+ if (strstr(dmi_product_name, "Z420") ||477477+ strstr(dmi_product_name, "Z620") ||478478+ strstr(dmi_product_name, "Z820"))479479+ return true;480480+481481+ return false;482482+}483483+484484+static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)485485+{486486+ return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));487487+}488488+489489+402490/*403491 * Initialize memory for HCD and xHC (one-time init).404492 *···510420 }511421 retval = xhci_mem_init(xhci, GFP_KERNEL);512422 xhci_dbg(xhci, "Finished xhci_init\n");423423+424424+ /* Initializing Compliance Mode Recovery Data If Needed */425425+ if (compliance_mode_recovery_timer_quirk_check()) {426426+ xhci->quirks |= XHCI_COMP_MODE_QUIRK;427427+ compliance_mode_recovery_timer_init(xhci);428428+ }513429514430 return retval;515431}···725629 del_timer_sync(&xhci->event_ring_timer);726630#endif727631632632+ /* Deleting Compliance Mode Recovery Timer */633633+ if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&634634+ (!(xhci_all_ports_seen_u0(xhci))))635635+ del_timer_sync(&xhci->comp_mode_recovery_timer);636636+728637 if (xhci->quirks & XHCI_AMD_PLL_FIX)729638 usb_amd_dev_put();730639···760659{761660 struct xhci_hcd *xhci = hcd_to_xhci(hcd);762661763763- if (xhci->quirks && XHCI_SPURIOUS_REBOOT)662662+ if (xhci->quirks & XHCI_SPURIOUS_REBOOT)764663 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));765664766665 spin_lock_irq(&xhci->lock);···907806 }908807 spin_unlock_irq(&xhci->lock);909808809809+ /*810810+ * Deleting Compliance Mode Recovery Timer because the xHCI Host811811+ * is about to be suspended.812812+ */813813+ if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&814814+ (!(xhci_all_ports_seen_u0(xhci)))) {815815+ del_timer_sync(&xhci->comp_mode_recovery_timer);816816+ xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");817817+ }818818+910819 /* step 5: remove core well power */911820 /* synchronize irq when using MSI-X */912821 xhci_msix_sync_irqs(xhci);···1049938 usb_hcd_resume_root_hub(hcd);1050939 usb_hcd_resume_root_hub(xhci->shared_hcd);1051940 }941941+942942+ /*943943+ * If system is subject to the Quirk, Compliance Mode Timer needs to944944+ * be re-initialized Always after a system resume. Ports are subject945945+ * to suffer the Compliance Mode issue again. It doesn't matter if946946+ * ports have entered previously to U0 before system's suspension.947947+ */948948+ if (xhci->quirks & XHCI_COMP_MODE_QUIRK)949949+ compliance_mode_recovery_timer_init(xhci);950950+1052951 return retval;1053952}1054953#endif /* CONFIG_PM */
+6
drivers/usb/host/xhci.h
···14951495#define XHCI_LPM_SUPPORT (1 << 11)14961496#define XHCI_INTEL_HOST (1 << 12)14971497#define XHCI_SPURIOUS_REBOOT (1 << 13)14981498+#define XHCI_COMP_MODE_QUIRK (1 << 14)14981499 unsigned int num_active_eps;14991500 unsigned int limit_active_eps;15001501 /* There are two roothubs to keep track of bus suspend info for */···15121511 unsigned sw_lpm_support:1;15131512 /* support xHCI 1.0 spec USB2 hardware LPM */15141513 unsigned hw_lpm_support:1;15141514+ /* Compliance Mode Recovery Data */15151515+ struct timer_list comp_mode_recovery_timer;15161516+ u32 port_status_u0;15171517+/* Compliance Mode Timer Triggered every 2 seconds */15181518+#define COMP_MODE_RCVRY_MSECS 200015151519};1516152015171521/* convert between an HCD pointer and the corresponding EHCI_HCD */
+1-1
drivers/usb/musb/musb_host.c
···20492049 * we only have work to do in the former case.20502050 */20512051 spin_lock_irqsave(&musb->lock, flags);20522052- if (hep->hcpriv) {20522052+ if (hep->hcpriv || !next_urb(qh)) {20532053 /* some concurrent activity submitted another urb to hep...20542054 * odd, rare, error prone, but legal.20552055 */
+1-1
drivers/usb/musb/musbhsdma.c
···388388 struct platform_device *pdev = to_platform_device(dev);389389 int irq = platform_get_irq_byname(pdev, "dma");390390391391- if (irq == 0) {391391+ if (irq <= 0) {392392 dev_err(dev, "No DMA interrupt line!\n");393393 return NULL;394394 }
···7575#define FTDI_OPENDCC_GATEWAY_PID 0xBFDB7676#define FTDI_OPENDCC_GBM_PID 0xBFDC77777878+/* NZR SEM 16+ USB (http://www.nzr.de) */7979+#define FTDI_NZR_SEM_USB_PID 0xC1E0 /* NZR SEM-LOG16+ */8080+7881/*7982 * RR-CirKits LocoBuffer USB (http://www.rr-cirkits.com)8083 */···542539/*543540 * Microchip Technology, Inc.544541 *545545- * MICROCHIP_VID (0x04D8) and MICROCHIP_USB_BOARD_PID (0x000A) are also used by:542542+ * MICROCHIP_VID (0x04D8) and MICROCHIP_USB_BOARD_PID (0x000A) are543543+ * used by single function CDC ACM class based firmware demo544544+ * applications. The VID/PID has also been used in firmware545545+ * emulating FTDI serial chips by:546546 * Hornby Elite - Digital Command Control Console547547 * http://www.hornby.com/hornby-dcc/controllers/548548 */···797791 * Physik Instrumente798792 * http://www.physikinstrumente.com/en/products/799793 */794794+/* These two devices use the VID of FTDI */795795+#define PI_C865_PID 0xe0a0 /* PI C-865 Piezomotor Controller */796796+#define PI_C857_PID 0xe0a1 /* PI Encoder Trigger Box */797797+800798#define PI_VID 0x1a72 /* Vendor ID */801801-#define PI_E861_PID 0x1008 /* E-861 piezo controller USB connection */799799+#define PI_C866_PID 0x1000 /* PI C-866 Piezomotor Controller */800800+#define PI_C663_PID 0x1001 /* PI C-663 Mercury-Step */801801+#define PI_C725_PID 0x1002 /* PI C-725 Piezomotor Controller */802802+#define PI_E517_PID 0x1005 /* PI E-517 Digital Piezo Controller Operation Module */803803+#define PI_C863_PID 0x1007 /* PI C-863 */804804+#define PI_E861_PID 0x1008 /* PI E-861 Piezomotor Controller */805805+#define PI_C867_PID 0x1009 /* PI C-867 Piezomotor Controller */806806+#define PI_E609_PID 0x100D /* PI E-609 Digital Piezo Controller */807807+#define PI_E709_PID 0x100E /* PI E-709 Digital Piezo Controller */808808+#define PI_100F_PID 0x100F /* PI Digital Piezo Controller */809809+#define PI_1011_PID 0x1011 /* PI Digital Piezo Controller */810810+#define PI_1012_PID 0x1012 /* PI Motion Controller */811811+#define PI_1013_PID 0x1013 /* PI Motion Controller */812812+#define PI_1014_PID 0x1014 /* PI Device */813813+#define PI_1015_PID 0x1015 /* PI Device */814814+#define PI_1016_PID 0x1016 /* PI Digital Servo Module */802815803816/*804817 * Kondo Kagaku Co.Ltd.
···162162 image.depth = 1;163163164164 if (attribute) {165165- buf = kmalloc(cellsize, GFP_KERNEL);165165+ buf = kmalloc(cellsize, GFP_ATOMIC);166166 if (!buf)167167 return;168168 }
+1-1
drivers/video/console/fbcon.c
···449449450450 while ((options = strsep(&this_opt, ",")) != NULL) {451451 if (!strncmp(options, "font:", 5))452452- strcpy(fontname, options + 5);452452+ strlcpy(fontname, options + 5, sizeof(fontname));453453454454 if (!strncmp(options, "scrollback:", 11)) {455455 options += 11;
+2
drivers/video/mb862xx/mb862xxfbdrv.c
···328328 case MB862XX_L1_SET_CFG:329329 if (copy_from_user(l1_cfg, argp, sizeof(*l1_cfg)))330330 return -EFAULT;331331+ if (l1_cfg->dh == 0 || l1_cfg->dw == 0)332332+ return -EINVAL;331333 if ((l1_cfg->sw >= l1_cfg->dw) && (l1_cfg->sh >= l1_cfg->dh)) {332334 /* downscaling */333335 outreg(cap, GC_CAP_CSC,
+14
drivers/video/omap2/dss/sdi.c
···105105106106 sdi_config_lcd_manager(dssdev);107107108108+ /*109109+ * LCLK and PCLK divisors are located in shadow registers, and we110110+ * normally write them to DISPC registers when enabling the output.111111+ * However, SDI uses pck-free as source clock for its PLL, and pck-free112112+ * is affected by the divisors. And as we need the PLL before enabling113113+ * the output, we need to write the divisors early.114114+ *115115+ * It seems just writing to the DISPC register is enough, and we don't116116+ * need to care about the shadow register mechanism for pck-free. The117117+ * exact reason for this is unknown.118118+ */119119+ dispc_mgr_set_clock_div(dssdev->manager->id,120120+ &sdi.mgr_config.clock_info);121121+108122 dss_sdi_init(dssdev->phy.sdi.datapairs);109123 r = dss_sdi_enable();110124 if (r)
···353353 if (err)354354 goto config_release;355355356356- dev_dbg(&dev->dev, "reseting (FLR, D3, etc) the device\n");357357- __pci_reset_function_locked(dev);358358-359356 /* We need the device active to save the state. */360357 dev_dbg(&dev->dev, "save state of device\n");361358 pci_save_state(dev);362359 dev_data->pci_saved_state = pci_store_saved_state(dev);363360 if (!dev_data->pci_saved_state)364361 dev_err(&dev->dev, "Could not store PCI conf saved state!\n");365365-362362+ else {363363+ dev_dbg(&dev->dev, "reseting (FLR, D3, etc) the device\n");364364+ __pci_reset_function_locked(dev);365365+ }366366 /* Now disable the device (this also ensures some private device367367 * data is setup before we export)368368 */
+2-6
fs/btrfs/qgroup.c
···1371137113721372 if (srcid) {13731373 srcgroup = find_qgroup_rb(fs_info, srcid);13741374- if (!srcgroup) {13751375- ret = -EINVAL;13741374+ if (!srcgroup)13761375 goto unlock;13771377- }13781376 dstgroup->rfer = srcgroup->rfer - level_size;13791377 dstgroup->rfer_cmpr = srcgroup->rfer_cmpr - level_size;13801378 srcgroup->excl = level_size;···13811383 qgroup_dirty(fs_info, srcgroup);13821384 }1383138513841384- if (!inherit) {13851385- ret = -EINVAL;13861386+ if (!inherit)13861387 goto unlock;13871387- }1388138813891389 i_qgroups = (u64 *)(inherit + 1);13901390 for (i = 0; i < inherit->num_qgroups; ++i) {
+8-3
fs/cifs/cifssmb.c
···15761576 /* result already set, check signature */15771577 if (server->sec_mode &15781578 (SECMODE_SIGN_REQUIRED | SECMODE_SIGN_ENABLED)) {15791579- if (cifs_verify_signature(rdata->iov, rdata->nr_iov,15801580- server, mid->sequence_number + 1))15811581- cERROR(1, "Unexpected SMB signature");15791579+ int rc = 0;15801580+15811581+ rc = cifs_verify_signature(rdata->iov, rdata->nr_iov,15821582+ server,15831583+ mid->sequence_number + 1);15841584+ if (rc)15851585+ cERROR(1, "SMB signature verification returned "15861586+ "error = %d", rc);15821587 }15831588 /* FIXME: should this be counted toward the initiating task? */15841589 task_io_account_read(rdata->bytes);
···917917 if (!buf) {918918 mutex_unlock(&cinode->lock_mutex);919919 free_xid(xid);920920- return rc;920920+ return -ENOMEM;921921 }922922923923 for (i = 0; i < 2; i++) {
+16-8
fs/cifs/inode.c
···124124{125125 struct cifsInodeInfo *cifs_i = CIFS_I(inode);126126 struct cifs_sb_info *cifs_sb = CIFS_SB(inode->i_sb);127127- unsigned long oldtime = cifs_i->time;128127129128 cifs_revalidate_cache(inode, fattr);130129130130+ spin_lock(&inode->i_lock);131131 inode->i_atime = fattr->cf_atime;132132 inode->i_mtime = fattr->cf_mtime;133133 inode->i_ctime = fattr->cf_ctime;···148148 else149149 cifs_i->time = jiffies;150150151151- cFYI(1, "inode 0x%p old_time=%ld new_time=%ld", inode,152152- oldtime, cifs_i->time);153153-154151 cifs_i->delete_pending = fattr->cf_flags & CIFS_FATTR_DELETE_PENDING;155152156153 cifs_i->server_eof = fattr->cf_eof;···155158 * Can't safely change the file size here if the client is writing to156159 * it due to potential races.157160 */158158- spin_lock(&inode->i_lock);159161 if (is_size_safe_to_change(cifs_i, fattr->cf_eof)) {160162 i_size_write(inode, fattr->cf_eof);161163···855859856860 if (rc && tcon->ipc) {857861 cFYI(1, "ipc connection - fake read inode");862862+ spin_lock(&inode->i_lock);858863 inode->i_mode |= S_IFDIR;859864 set_nlink(inode, 2);860865 inode->i_op = &cifs_ipc_inode_ops;861866 inode->i_fop = &simple_dir_operations;862867 inode->i_uid = cifs_sb->mnt_uid;863868 inode->i_gid = cifs_sb->mnt_gid;869869+ spin_unlock(&inode->i_lock);864870 } else if (rc) {865871 iget_failed(inode);866872 inode = ERR_PTR(rc);···11081110 goto out_close;11091111}1110111211131113+/* copied from fs/nfs/dir.c with small changes */11141114+static void11151115+cifs_drop_nlink(struct inode *inode)11161116+{11171117+ spin_lock(&inode->i_lock);11181118+ if (inode->i_nlink > 0)11191119+ drop_nlink(inode);11201120+ spin_unlock(&inode->i_lock);11211121+}1111112211121123/*11131124 * If dentry->d_inode is null (usually meaning the cached dentry···11731166psx_del_no_retry:11741167 if (!rc) {11751168 if (inode)11761176- drop_nlink(inode);11691169+ cifs_drop_nlink(inode);11771170 } else if (rc == -ENOENT) {11781171 d_drop(dentry);11791172 } else if (rc == -ETXTBSY) {11801173 rc = cifs_rename_pending_delete(full_path, dentry, xid);11811174 if (rc == 0)11821182- drop_nlink(inode);11751175+ cifs_drop_nlink(inode);11831176 } else if ((rc == -EACCES) && (dosattr == 0) && inode) {11841177 attrs = kzalloc(sizeof(*attrs), GFP_KERNEL);11851178 if (attrs == NULL) {···12481241 * setting nlink not necessary except in cases where we failed to get it12491242 * from the server or was set bogus12501243 */12441244+ spin_lock(&dentry->d_inode->i_lock);12511245 if ((dentry->d_inode) && (dentry->d_inode->i_nlink < 2))12521246 set_nlink(dentry->d_inode, 2);12531253-12471247+ spin_unlock(&dentry->d_inode->i_lock);12541248 mode &= ~current_umask();12551249 /* must turn on setgid bit if parent dir has it */12561250 if (inode->i_mode & S_ISGID)
+2
fs/cifs/link.c
···433433 if (old_file->d_inode) {434434 cifsInode = CIFS_I(old_file->d_inode);435435 if (rc == 0) {436436+ spin_lock(&old_file->d_inode->i_lock);436437 inc_nlink(old_file->d_inode);438438+ spin_unlock(&old_file->d_inode->i_lock);437439/* BB should we make this contingent on superblock flag NOATIME? */438440/* old_file->d_inode->i_ctime = CURRENT_TIME;*/439441 /* parent dir timestamps will update from srv
+9-7
fs/cifs/smb2misc.c
···5252 cERROR(1, "Bad protocol string signature header %x",5353 *(unsigned int *) hdr->ProtocolId);5454 if (mid != hdr->MessageId)5555- cERROR(1, "Mids do not match");5555+ cERROR(1, "Mids do not match: %llu and %llu", mid,5656+ hdr->MessageId);5657 }5758 cERROR(1, "Bad SMB detected. The Mid=%llu", hdr->MessageId);5859 return 1;···108107 * ie Validate the wct via smb2_struct_sizes table above109108 */110109111111- if (length < 2 + sizeof(struct smb2_hdr)) {110110+ if (length < sizeof(struct smb2_pdu)) {112111 if ((length >= sizeof(struct smb2_hdr)) && (hdr->Status != 0)) {113112 pdu->StructureSize2 = 0;114113 /*···122121 return 1;123122 }124123 if (len > CIFSMaxBufSize + MAX_SMB2_HDR_SIZE - 4) {125125- cERROR(1, "SMB length greater than maximum, mid=%lld", mid);124124+ cERROR(1, "SMB length greater than maximum, mid=%llu", mid);126125 return 1;127126 }128127129128 if (check_smb2_hdr(hdr, mid))130129 return 1;131130132132- if (hdr->StructureSize != SMB2_HEADER_SIZE) {133133- cERROR(1, "Illegal structure size %d",131131+ if (hdr->StructureSize != SMB2_HEADER_STRUCTURE_SIZE) {132132+ cERROR(1, "Illegal structure size %u",134133 le16_to_cpu(hdr->StructureSize));135134 return 1;136135 }···162161 if (4 + len != clc_len) {163162 cFYI(1, "Calculated size %u length %u mismatch mid %llu",164163 clc_len, 4 + len, mid);165165- if (clc_len == 4 + len + 1) /* BB FIXME (fix samba) */166166- return 0; /* BB workaround Samba 3 bug SessSetup rsp */164164+ /* server can return one byte more */165165+ if (clc_len == 4 + len + 1)166166+ return 0;167167 return 1;168168 }169169 return 0;
+6-4
fs/cifs/smb2pdu.h
···87878888#define SMB2_PROTO_NUMBER __constant_cpu_to_le32(0x424d53fe)89899090-#define SMB2_HEADER_SIZE __constant_le16_to_cpu(64)9191-9292-#define SMB2_ERROR_STRUCTURE_SIZE2 __constant_le16_to_cpu(9)9393-9490/*9591 * SMB2 Header Definition9692 *···9599 * "PDU" : "Protocol Data Unit" (ie a network "frame")96100 *97101 */102102+103103+#define SMB2_HEADER_STRUCTURE_SIZE __constant_cpu_to_le16(64)104104+98105struct smb2_hdr {99106 __be32 smb2_buf_length; /* big endian on wire */100107 /* length is only two or three bytes - with···139140 * command code name for the struct. Note that structures must be packed.140141 *141142 */143143+144144+#define SMB2_ERROR_STRUCTURE_SIZE2 __constant_cpu_to_le16(9)145145+142146struct smb2_err_rsp {143147 struct smb2_hdr hdr;144148 __le16 StructureSize;
+6-3
fs/cifs/transport.c
···503503 /* convert the length into a more usable form */504504 if (server->sec_mode & (SECMODE_SIGN_REQUIRED | SECMODE_SIGN_ENABLED)) {505505 struct kvec iov;506506+ int rc = 0;506507507508 iov.iov_base = mid->resp_buf;508509 iov.iov_len = len;509510 /* FIXME: add code to kill session */510510- if (cifs_verify_signature(&iov, 1, server,511511- mid->sequence_number + 1) != 0)512512- cERROR(1, "Unexpected SMB signature");511511+ rc = cifs_verify_signature(&iov, 1, server,512512+ mid->sequence_number + 1);513513+ if (rc)514514+ cERROR(1, "SMB signature verification returned error = "515515+ "%d", rc);513516 }514517515518 /* BB special case reconnect tid and uid here? */
···323323}324324325325/**326326+ * gfs2_size_hint - Give a hint to the size of a write request327327+ * @file: The struct file328328+ * @offset: The file offset of the write329329+ * @size: The length of the write330330+ *331331+ * When we are about to do a write, this function records the total332332+ * write size in order to provide a suitable hint to the lower layers333333+ * about how many blocks will be required.334334+ *335335+ */336336+337337+static void gfs2_size_hint(struct file *filep, loff_t offset, size_t size)338338+{339339+ struct inode *inode = filep->f_dentry->d_inode;340340+ struct gfs2_sbd *sdp = GFS2_SB(inode);341341+ struct gfs2_inode *ip = GFS2_I(inode);342342+ size_t blks = (size + sdp->sd_sb.sb_bsize - 1) >> sdp->sd_sb.sb_bsize_shift;343343+ int hint = min_t(size_t, INT_MAX, blks);344344+345345+ atomic_set(&ip->i_res->rs_sizehint, hint);346346+}347347+348348+/**326349 * gfs2_allocate_page_backing - Use bmap to allocate blocks327350 * @page: The (locked) page to allocate backing for328351 *···405382 if (ret)406383 return ret;407384408408- atomic_set(&ip->i_res->rs_sizehint,409409- PAGE_CACHE_SIZE >> sdp->sd_sb.sb_bsize_shift);385385+ gfs2_size_hint(vma->vm_file, pos, PAGE_CACHE_SIZE);410386411387 gfs2_holder_init(ip->i_gl, LM_ST_EXCLUSIVE, 0, &gh);412388 ret = gfs2_glock_nq(&gh);···685663 if (ret)686664 return ret;687665688688- atomic_set(&ip->i_res->rs_sizehint, writesize >> sdp->sd_sb.sb_bsize_shift);666666+ gfs2_size_hint(file, pos, writesize);667667+689668 if (file->f_flags & O_APPEND) {690669 struct gfs2_holder gh;691670···812789 if (unlikely(error))813790 goto out_uninit;814791815815- atomic_set(&ip->i_res->rs_sizehint, len >> sdp->sd_sb.sb_bsize_shift);792792+ gfs2_size_hint(file, offset, len);816793817794 while (len > 0) {818795 if (len < bytes)
+6-2
fs/gfs2/inode.c
···17221722 gfs2_holder_init(ip->i_gl, LM_ST_EXCLUSIVE, 0, &gh);17231723 ret = gfs2_glock_nq(&gh);17241724 if (ret == 0) {17251725- ret = generic_setxattr(dentry, name, data, size, flags);17251725+ ret = gfs2_rs_alloc(ip);17261726+ if (ret == 0)17271727+ ret = generic_setxattr(dentry, name, data, size, flags);17261728 gfs2_glock_dq(&gh);17271729 }17281730 gfs2_holder_uninit(&gh);···17591757 gfs2_holder_init(ip->i_gl, LM_ST_EXCLUSIVE, 0, &gh);17601758 ret = gfs2_glock_nq(&gh);17611759 if (ret == 0) {17621762- ret = generic_removexattr(dentry, name);17601760+ ret = gfs2_rs_alloc(ip);17611761+ if (ret == 0)17621762+ ret = generic_removexattr(dentry, name);17631763 gfs2_glock_dq(&gh);17641764 }17651765 gfs2_holder_uninit(&gh);
+30-40
fs/gfs2/rgrp.c
···19611961 * @dinode: 1 if this block is a dinode block, otherwise data block19621962 * @nblocks: desired extent length19631963 *19641964- * Lay claim to previously allocated block reservation blocks.19641964+ * Lay claim to previously reserved blocks.19651965 * Returns: Starting block number of the blocks claimed.19661966 * Sets *nblocks to the actual extent length allocated.19671967 */···19701970{19711971 struct gfs2_blkreserv *rs = ip->i_res;19721972 struct gfs2_rgrpd *rgd = rs->rs_rgd;19731973- struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode);19741973 struct gfs2_bitmap *bi;19751974 u64 start_block = gfs2_rs_startblk(rs);19761975 const unsigned int elen = *nblocks;1977197619781978- /*BUG_ON(!gfs2_glock_is_locked_by_me(ip->i_gl));*/19791979- gfs2_assert_withdraw(sdp, rgd);19801980- /*BUG_ON(!gfs2_glock_is_locked_by_me(rgd->rd_gl));*/19811977 bi = rs->rs_bi;19821978 gfs2_trans_add_bh(rgd->rd_gl, bi->bi_bh, 1);1983197919841980 for (*nblocks = 0; *nblocks < elen && rs->rs_free; (*nblocks)++) {19851985- /* Make sure the bitmap hasn't changed */19811981+ if (gfs2_testbit(rgd, bi->bi_bh->b_data + bi->bi_offset,19821982+ bi->bi_len, rs->rs_biblk) != GFS2_BLKST_FREE)19831983+ break;19861984 gfs2_setbit(rgd, bi->bi_clone, bi, rs->rs_biblk,19871985 dinode ? GFS2_BLKST_DINODE : GFS2_BLKST_USED);19881986 rs->rs_biblk++;···19891991 BUG_ON(!rgd->rd_reserved);19901992 rgd->rd_reserved--;19911993 dinode = false;19921992- trace_gfs2_rs(ip, rs, TRACE_RS_CLAIM);19931994 }1994199519951995- if (!rs->rs_free) {19961996- struct gfs2_rgrpd *rgd = ip->i_res->rs_rgd;19971997-19961996+ trace_gfs2_rs(ip, rs, TRACE_RS_CLAIM);19971997+ if (!rs->rs_free || *nblocks != elen)19981998 gfs2_rs_deltree(rs);19991999- /* -nblocks because we haven't returned to do the math yet.20002000- I'm doing the math backwards to prevent negative numbers,20012001- but think of it as:20022002- if (unclaimed_blocks(rgd) - *nblocks >= RGRP_RSRV_MINBLKS */20032003- if (unclaimed_blocks(rgd) >= RGRP_RSRV_MINBLKS + *nblocks)20042004- rg_mblk_search(rgd, ip);20052005- }19991999+20062000 return start_block;20072001}20082002···20272037 if (ip->i_res->rs_requested == 0)20282038 return -ECANCELED;2029203920302030- /* Check if we have a multi-block reservation, and if so, claim the20312031- next free block from it. */20402040+ /* If we have a reservation, claim blocks from it. */20322041 if (gfs2_rs_active(ip->i_res)) {20332042 BUG_ON(!ip->i_res->rs_free);20342043 rgd = ip->i_res->rs_rgd;20352044 block = claim_reserved_blks(ip, dinode, nblocks);20362036- } else {20372037- rgd = ip->i_rgd;20382038-20392039- if (!dinode && rgrp_contains_block(rgd, ip->i_goal))20402040- goal = ip->i_goal - rgd->rd_data0;20412041- else20422042- goal = rgd->rd_last_alloc;20432043-20442044- blk = rgblk_search(rgd, goal, GFS2_BLKST_FREE, &bi);20452045-20462046- /* Since all blocks are reserved in advance, this shouldn't20472047- happen */20482048- if (blk == BFITNOENT) {20492049- printk(KERN_WARNING "BFITNOENT, nblocks=%u\n",20502050- *nblocks);20512051- printk(KERN_WARNING "FULL=%d\n",20522052- test_bit(GBF_FULL, &rgd->rd_bits->bi_flags));20532053- goto rgrp_error;20542054- }20552055-20562056- block = gfs2_alloc_extent(rgd, bi, blk, dinode, nblocks);20452045+ if (*nblocks)20462046+ goto found_blocks;20572047 }20482048+20492049+ rgd = ip->i_rgd;20502050+20512051+ if (!dinode && rgrp_contains_block(rgd, ip->i_goal))20522052+ goal = ip->i_goal - rgd->rd_data0;20532053+ else20542054+ goal = rgd->rd_last_alloc;20552055+20562056+ blk = rgblk_search(rgd, goal, GFS2_BLKST_FREE, &bi);20572057+20582058+ /* Since all blocks are reserved in advance, this shouldn't happen */20592059+ if (blk == BFITNOENT) {20602060+ printk(KERN_WARNING "BFITNOENT, nblocks=%u\n", *nblocks);20612061+ printk(KERN_WARNING "FULL=%d\n",20622062+ test_bit(GBF_FULL, &rgd->rd_bits->bi_flags));20632063+ goto rgrp_error;20642064+ }20652065+20662066+ block = gfs2_alloc_extent(rgd, bi, blk, dinode, nblocks);20672067+found_blocks:20582068 ndata = *nblocks;20592069 if (dinode)20602070 ndata--;
+3-1
fs/nfs/file.c
···287287 struct inode *inode = file->f_path.dentry->d_inode;288288289289 ret = filemap_write_and_wait_range(inode->i_mapping, start, end);290290+ if (ret != 0)291291+ goto out;290292 mutex_lock(&inode->i_mutex);291293 ret = nfs_file_fsync_commit(file, start, end, datasync);292294 mutex_unlock(&inode->i_mutex);293293-295295+out:294296 return ret;295297}296298
···9696 struct inode *inode = file->f_path.dentry->d_inode;97979898 ret = filemap_write_and_wait_range(inode->i_mapping, start, end);9999+ if (ret != 0)100100+ goto out;99101 mutex_lock(&inode->i_mutex);100102 ret = nfs_file_fsync_commit(file, start, end, datasync);101103 if (!ret && !datasync)102104 /* application has asked for meta-data sync */103105 ret = pnfs_layoutcommit_inode(inode, true);104106 mutex_unlock(&inode->i_mutex);105105-107107+out:106108 return ret;107109}108110
+25-30
fs/nfs/nfs4proc.c
···32153215 dentry->d_parent->d_name.name,32163216 dentry->d_name.name,32173217 (unsigned long long)cookie);32183218- nfs4_setup_readdir(cookie, NFS_COOKIEVERF(dir), dentry, &args);32183218+ nfs4_setup_readdir(cookie, NFS_I(dir)->cookieverf, dentry, &args);32193219 res.pgbase = args.pgbase;32203220 status = nfs4_call_sync(NFS_SERVER(dir)->client, NFS_SERVER(dir), &msg, &args.seq_args, &res.seq_res, 0);32213221 if (status >= 0) {32223222- memcpy(NFS_COOKIEVERF(dir), res.verifier.data, NFS4_VERIFIER_SIZE);32223222+ memcpy(NFS_I(dir)->cookieverf, res.verifier.data, NFS4_VERIFIER_SIZE);32233223 status += args.pgbase;32243224 }32253225···36533653 && (server->acl_bitmask & ACL4_SUPPORT_DENY_ACL);36543654}3655365536563656-/* Assuming that XATTR_SIZE_MAX is a multiple of PAGE_CACHE_SIZE, and that36573657- * it's OK to put sizeof(void) * (XATTR_SIZE_MAX/PAGE_CACHE_SIZE) bytes on36563656+/* Assuming that XATTR_SIZE_MAX is a multiple of PAGE_SIZE, and that36573657+ * it's OK to put sizeof(void) * (XATTR_SIZE_MAX/PAGE_SIZE) bytes on36583658 * the stack.36593659 */36603660-#define NFS4ACL_MAXPAGES (XATTR_SIZE_MAX >> PAGE_CACHE_SHIFT)36603660+#define NFS4ACL_MAXPAGES DIV_ROUND_UP(XATTR_SIZE_MAX, PAGE_SIZE)3661366136623662static int buf_to_pages_noslab(const void *buf, size_t buflen,36633663 struct page **pages, unsigned int *pgbase)···36683668 spages = pages;3669366936703670 do {36713671- len = min_t(size_t, PAGE_CACHE_SIZE, buflen);36713671+ len = min_t(size_t, PAGE_SIZE, buflen);36723672 newpage = alloc_page(GFP_KERNEL);3673367336743674 if (newpage == NULL)···37393739 struct nfs4_cached_acl *acl;37403740 size_t buflen = sizeof(*acl) + acl_len;3741374137423742- if (pages && buflen <= PAGE_SIZE) {37423742+ if (buflen <= PAGE_SIZE) {37433743 acl = kmalloc(buflen, GFP_KERNEL);37443744 if (acl == NULL)37453745 goto out;···37823782 .rpc_argp = &args,37833783 .rpc_resp = &res,37843784 };37853785- int ret = -ENOMEM, npages, i;37863786- size_t acl_len = 0;37853785+ unsigned int npages = DIV_ROUND_UP(buflen, PAGE_SIZE);37863786+ int ret = -ENOMEM, i;3787378737883788- npages = (buflen + PAGE_SIZE - 1) >> PAGE_SHIFT;37893788 /* As long as we're doing a round trip to the server anyway,37903789 * let's be prepared for a page of acl data. */37913790 if (npages == 0)37923791 npages = 1;37933793-37943794- /* Add an extra page to handle the bitmap returned */37953795- npages++;37923792+ if (npages > ARRAY_SIZE(pages))37933793+ return -ERANGE;3796379437973795 for (i = 0; i < npages; i++) {37983796 pages[i] = alloc_page(GFP_KERNEL);···38063808 args.acl_len = npages * PAGE_SIZE;38073809 args.acl_pgbase = 0;3808381038093809- /* Let decode_getfacl know not to fail if the ACL data is larger than38103810- * the page we send as a guess */38113811- if (buf == NULL)38123812- res.acl_flags |= NFS4_ACL_LEN_REQUEST;38133813-38143811 dprintk("%s buf %p buflen %zu npages %d args.acl_len %zu\n",38153812 __func__, buf, buflen, npages, args.acl_len);38163813 ret = nfs4_call_sync(NFS_SERVER(inode)->client, NFS_SERVER(inode),···38133820 if (ret)38143821 goto out_free;3815382238163816- acl_len = res.acl_len;38173817- if (acl_len > args.acl_len)38183818- nfs4_write_cached_acl(inode, NULL, 0, acl_len);38193819- else38203820- nfs4_write_cached_acl(inode, pages, res.acl_data_offset,38213821- acl_len);38223822- if (buf) {38233823+ /* Handle the case where the passed-in buffer is too short */38243824+ if (res.acl_flags & NFS4_ACL_TRUNC) {38253825+ /* Did the user only issue a request for the acl length? */38263826+ if (buf == NULL)38273827+ goto out_ok;38233828 ret = -ERANGE;38243824- if (acl_len > buflen)38253825- goto out_free;38263826- _copy_from_pages(buf, pages, res.acl_data_offset,38273827- acl_len);38293829+ goto out_free;38283830 }38293829- ret = acl_len;38313831+ nfs4_write_cached_acl(inode, pages, res.acl_data_offset, res.acl_len);38323832+ if (buf)38333833+ _copy_from_pages(buf, pages, res.acl_data_offset, res.acl_len);38343834+out_ok:38353835+ ret = res.acl_len;38303836out_free:38313837 for (i = 0; i < npages; i++)38323838 if (pages[i])···38833891 .rpc_argp = &arg,38843892 .rpc_resp = &res,38853893 };38943894+ unsigned int npages = DIV_ROUND_UP(buflen, PAGE_SIZE);38863895 int ret, i;3887389638883897 if (!nfs4_server_supports_acls(server))38893898 return -EOPNOTSUPP;38993899+ if (npages > ARRAY_SIZE(pages))39003900+ return -ERANGE;38903901 i = buf_to_pages_noslab(buf, buflen, arg.acl_pages, &arg.acl_pgbase);38913902 if (i < 0)38923903 return i;
+7-10
fs/nfs/nfs4xdr.c
···50725072 * are stored with the acl data to handle the problem of50735073 * variable length bitmaps.*/50745074 res->acl_data_offset = xdr_stream_pos(xdr) - pg_offset;50755075-50765076- /* We ignore &savep and don't do consistency checks on50775077- * the attr length. Let userspace figure it out.... */50785075 res->acl_len = attrlen;50795079- if (attrlen > (xdr->nwords << 2)) {50805080- if (res->acl_flags & NFS4_ACL_LEN_REQUEST) {50815081- /* getxattr interface called with a NULL buf */50825082- goto out;50835083- }50765076+50775077+ /* Check for receive buffer overflow */50785078+ if (res->acl_len > (xdr->nwords << 2) ||50795079+ res->acl_len + res->acl_data_offset > xdr->buf->page_len) {50805080+ res->acl_flags |= NFS4_ACL_TRUNC;50845081 dprintk("NFS: acl reply: attrlen %u > page_len %u\n",50855082 attrlen, xdr->nwords << 2);50865086- return -EINVAL;50875083 }50885084 } else50895085 status = -EOPNOTSUPP;···62256229 status = decode_open(xdr, res);62266230 if (status)62276231 goto out;62286228- if (decode_getfh(xdr, &res->fh) != 0)62326232+ status = decode_getfh(xdr, &res->fh);62336233+ if (status)62296234 goto out;62306235 decode_getfattr(xdr, res->f_attr, res->server);62316236out:
+2
fs/nfs/super.c
···1867186718681868 memcpy(sap, &data->addr, sizeof(data->addr));18691869 args->nfs_server.addrlen = sizeof(data->addr);18701870+ args->nfs_server.port = ntohs(data->addr.sin_port);18701871 if (!nfs_verify_server_address(sap))18711872 goto out_no_address;18721873···25652564 return -EFAULT;25662565 if (!nfs_verify_server_address(sap))25672566 goto out_no_address;25672567+ args->nfs_server.port = ntohs(((struct sockaddr_in *)sap)->sin_port);2568256825692569 if (data->auth_flavourlen) {25702570 if (data->auth_flavourlen > 1)
+1-1
fs/stat.c
···5858int vfs_fstat(unsigned int fd, struct kstat *stat)5959{6060 int fput_needed;6161- struct file *f = fget_light(fd, &fput_needed);6161+ struct file *f = fget_raw_light(fd, &fput_needed);6262 int error = -EBADF;63636464 if (f) {
···2222 struct timer_list timer; /* Timeout */2323 u8 * buf; /* Data buffer */2424 int len; /* Length of data buffer */2525+ int order; /* RX Bytes to order via TX */2526};26272728struct i2c_pnx_algo_data {
···16161717#include <linux/platform_device.h>18181919+struct irq_domain;2020+1921/*2022 * This struct describes the MFD part ("cell").2123 * After registration the copy of this structure will become the platform data···10098extern int mfd_add_devices(struct device *parent, int id,10199 struct mfd_cell *cells, int n_devs,102100 struct resource *mem_base,103103- int irq_base);101101+ int irq_base, struct irq_domain *irq_domain);104102105103extern void mfd_remove_devices(struct device *parent);106104
+9-3
include/linux/mfd/tps65217.h
···2222#include <linux/regulator/driver.h>2323#include <linux/regulator/machine.h>24242525+/* TPS chip id list */2626+#define TPS65217 0xF02727+2528/* I2C ID for TPS65217 part */2629#define TPS65217_I2C_ID 0x242730···251248struct tps65217 {252249 struct device *dev;253250 struct tps65217_board *pdata;251251+ unsigned int id;254252 struct regulator_desc desc[TPS65217_NUM_REGULATOR];255253 struct regulator_dev *rdev[TPS65217_NUM_REGULATOR];256254 struct tps_info *info[TPS65217_NUM_REGULATOR];257255 struct regmap *regmap;258258-259259- /* Client devices */260260- struct platform_device *regulator_pdev[TPS65217_NUM_REGULATOR];261256};262257263258static inline struct tps65217 *dev_to_tps65217(struct device *dev)264259{265260 return dev_get_drvdata(dev);261261+}262262+263263+static inline int tps65217_chip_id(struct tps65217 *tps65217)264264+{265265+ return tps65217->id;266266}267267268268int tps65217_reg_read(struct tps65217 *tps, unsigned int reg,
+13
include/linux/mlx4/device.h
···796796 MLX4_NET_TRANS_RULE_NUM, /* should be last */797797};798798799799+extern const u16 __sw_id_hw[];800800+801801+static inline int map_hw_to_sw_id(u16 header_id)802802+{803803+804804+ int i;805805+ for (i = 0; i < MLX4_NET_TRANS_RULE_NUM; i++) {806806+ if (header_id == __sw_id_hw[i])807807+ return i;808808+ }809809+ return -EINVAL;810810+}811811+799812enum mlx4_net_trans_promisc_mode {800813 MLX4_FS_PROMISC_NONE = 0,801814 MLX4_FS_PROMISC_UPLINK,
+1
include/linux/mmc/card.h
···239239#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */240240#define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */241241#define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */242242+#define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10) /* Skip secure for erase/trim */242243 /* byte mode */243244 unsigned int poweroff_notify_state; /* eMMC4.5 notify feature */244245#define MMC_NO_POWER_NOTIFICATION 0
···954954 unsigned int smt_gain;955955 int flags; /* See SD_* */956956 int level;957957- int idle_buddy; /* cpu assigned to select_idle_sibling() */958957959958 /* Runtime fields. */960959 unsigned long last_balance; /* init to jiffies. units in jiffies */
···12531253/*12541254 * Cross CPU call to disable a performance event12551255 */12561256-static int __perf_event_disable(void *info)12561256+int __perf_event_disable(void *info)12571257{12581258 struct perf_event *event = info;12591259 struct perf_event_context *ctx = event->ctx;···29352935/*29362936 * Called when the last reference to the file is gone.29372937 */29382938-static int perf_release(struct inode *inode, struct file *file)29382938+static void put_event(struct perf_event *event)29392939{29402940- struct perf_event *event = file->private_data;29412940 struct task_struct *owner;2942294129432943- file->private_data = NULL;29422942+ if (!atomic_long_dec_and_test(&event->refcount))29432943+ return;2944294429452945 rcu_read_lock();29462946 owner = ACCESS_ONCE(event->owner);···29752975 put_task_struct(owner);29762976 }2977297729782978- return perf_event_release_kernel(event);29782978+ perf_event_release_kernel(event);29792979+}29802980+29812981+static int perf_release(struct inode *inode, struct file *file)29822982+{29832983+ put_event(file->private_data);29842984+ return 0;29792985}2980298629812987u64 perf_event_read_value(struct perf_event *event, u64 *enabled, u64 *running)···3233322732343228static const struct file_operations perf_fops;3235322932363236-static struct perf_event *perf_fget_light(int fd, int *fput_needed)32303230+static struct file *perf_fget_light(int fd, int *fput_needed)32373231{32383232 struct file *file;32393233···32473241 return ERR_PTR(-EBADF);32483242 }3249324332503250- return file->private_data;32443244+ return file;32513245}3252324632533247static int perf_event_set_output(struct perf_event *event,···3279327332803274 case PERF_EVENT_IOC_SET_OUTPUT:32813275 {32763276+ struct file *output_file = NULL;32823277 struct perf_event *output_event = NULL;32833278 int fput_needed = 0;32843279 int ret;3285328032863281 if (arg != -1) {32873287- output_event = perf_fget_light(arg, &fput_needed);32883288- if (IS_ERR(output_event))32893289- return PTR_ERR(output_event);32823282+ output_file = perf_fget_light(arg, &fput_needed);32833283+ if (IS_ERR(output_file))32843284+ return PTR_ERR(output_file);32853285+ output_event = output_file->private_data;32903286 }3291328732923288 ret = perf_event_set_output(event, output_event);32933289 if (output_event)32943294- fput_light(output_event->filp, fput_needed);32903290+ fput_light(output_file, fput_needed);3295329132963292 return ret;32973293 }···5958595059595951 mutex_init(&event->mmap_mutex);5960595259535953+ atomic_long_set(&event->refcount, 1);59615954 event->cpu = cpu;59625955 event->attr = *attr;59635956 event->group_leader = group_leader;···62696260 return event_fd;6270626162716262 if (group_fd != -1) {62726272- group_leader = perf_fget_light(group_fd, &fput_needed);62736273- if (IS_ERR(group_leader)) {62746274- err = PTR_ERR(group_leader);62636263+ group_file = perf_fget_light(group_fd, &fput_needed);62646264+ if (IS_ERR(group_file)) {62656265+ err = PTR_ERR(group_file);62756266 goto err_fd;62766267 }62776277- group_file = group_leader->filp;62686268+ group_leader = group_file->private_data;62786269 if (flags & PERF_FLAG_FD_OUTPUT)62796270 output_event = group_leader;62806271 if (flags & PERF_FLAG_FD_NO_GROUP)···64116402 put_ctx(gctx);64126403 }6413640464146414- event->filp = event_file;64156405 WARN_ON_ONCE(ctx->parent_ctx);64166406 mutex_lock(&ctx->mutex);64176407···65046496 goto err_free;65056497 }6506649865076507- event->filp = NULL;65086499 WARN_ON_ONCE(ctx->parent_ctx);65096500 mutex_lock(&ctx->mutex);65106501 perf_install_in_context(ctx, event, cpu);···65856578 * Release the parent event, if this was the last65866579 * reference to it.65876580 */65886588- fput(parent_event->filp);65816581+ put_event(parent_event);65896582}6590658365916584static void···66616654 *66626655 * __perf_event_exit_task()66636656 * sync_child_event()66646664- * fput(parent_event->filp)66656665- * perf_release()66666666- * mutex_lock(&ctx->mutex)66576657+ * put_event()66586658+ * mutex_lock(&ctx->mutex)66676659 *66686660 * But since its the parent context it won't be the same instance.66696661 */···67306724 list_del_init(&event->child_list);67316725 mutex_unlock(&parent->child_mutex);6732672667336733- fput(parent->filp);67276727+ put_event(parent);6734672867356729 perf_group_detach(event);67366730 list_del_event(event, ctx);···68106804 NULL, NULL);68116805 if (IS_ERR(child_event))68126806 return child_event;68076807+68086808+ if (!atomic_long_inc_not_zero(&parent_event->refcount)) {68096809+ free_event(child_event);68106810+ return NULL;68116811+ }68126812+68136813 get_ctx(child_ctx);6814681468156815 /*···68556843 raw_spin_lock_irqsave(&child_ctx->lock, flags);68566844 add_event_to_ctx(child_event, child_ctx);68576845 raw_spin_unlock_irqrestore(&child_ctx->lock, flags);68586858-68596859- /*68606860- * Get a reference to the parent filp - we will fput it68616861- * when the child event exits. This is safe to do because68626862- * we are in the parent and we know that the filp still68636863- * exists and has a nonzero count:68646864- */68656865- atomic_long_inc(&parent_event->filp->f_count);6866684668676847 /*68686848 * Link this into the parent event's child list
+10-1
kernel/events/hw_breakpoint.c
···453453 int old_type = bp->attr.bp_type;454454 int err = 0;455455456456- perf_event_disable(bp);456456+ /*457457+ * modify_user_hw_breakpoint can be invoked with IRQs disabled and hence it458458+ * will not be possible to raise IPIs that invoke __perf_event_disable.459459+ * So call the function directly after making sure we are targeting the460460+ * current task.461461+ */462462+ if (irqs_disabled() && bp->ctx && bp->ctx->task == current)463463+ __perf_event_disable(bp);464464+ else465465+ perf_event_disable(bp);457466458467 bp->attr.bp_addr = attr->bp_addr;459468 bp->attr.bp_type = attr->bp_type;
+11-62
kernel/sched/core.c
···53045304}5305530553065306/*53075307- * While a dead CPU has no uninterruptible tasks queued at this point,53085308- * it might still have a nonzero ->nr_uninterruptible counter, because53095309- * for performance reasons the counter is not stricly tracking tasks to53105310- * their home CPUs. So we just add the counter to another CPU's counter,53115311- * to keep the global sum constant after CPU-down:53075307+ * Since this CPU is going 'away' for a while, fold any nr_active delta53085308+ * we might have. Assumes we're called after migrate_tasks() so that the53095309+ * nr_active count is stable.53105310+ *53115311+ * Also see the comment "Global load-average calculations".53125312 */53135313-static void migrate_nr_uninterruptible(struct rq *rq_src)53135313+static void calc_load_migrate(struct rq *rq)53145314{53155315- struct rq *rq_dest = cpu_rq(cpumask_any(cpu_active_mask));53165316-53175317- rq_dest->nr_uninterruptible += rq_src->nr_uninterruptible;53185318- rq_src->nr_uninterruptible = 0;53195319-}53205320-53215321-/*53225322- * remove the tasks which were accounted by rq from calc_load_tasks.53235323- */53245324-static void calc_global_load_remove(struct rq *rq)53255325-{53265326- atomic_long_sub(rq->calc_load_active, &calc_load_tasks);53275327- rq->calc_load_active = 0;53155315+ long delta = calc_load_fold_active(rq);53165316+ if (delta)53175317+ atomic_long_add(delta, &calc_load_tasks);53285318}5329531953305320/*···53415351 * done here.53425352 */53435353 rq->stop = NULL;53445344-53455345- /* Ensure any throttled groups are reachable by pick_next_task */53465346- unthrottle_offline_cfs_rqs(rq);5347535453485355 for ( ; ; ) {53495356 /*···56055618 BUG_ON(rq->nr_running != 1); /* the migration thread */56065619 raw_spin_unlock_irqrestore(&rq->lock, flags);5607562056085608- migrate_nr_uninterruptible(rq);56095609- calc_global_load_remove(rq);56215621+ calc_load_migrate(rq);56105622 break;56115623#endif56125624 }···60146028 * SD_SHARE_PKG_RESOURCE set (Last Level Cache Domain) for this60156029 * allows us to avoid some pointer chasing select_idle_sibling().60166030 *60176017- * Iterate domains and sched_groups downward, assigning CPUs to be60186018- * select_idle_sibling() hw buddy. Cross-wiring hw makes bouncing60196019- * due to random perturbation self canceling, ie sw buddies pull60206020- * their counterpart to their CPU's hw counterpart.60216021- *60226031 * Also keep a unique ID per domain (we use the first cpu number in60236032 * the cpumask of the domain), this allows us to quickly tell if60246033 * two cpus are in the same cache domain, see cpus_share_cache().···60276046 int id = cpu;6028604760296048 sd = highest_flag_domain(cpu, SD_SHARE_PKG_RESOURCES);60306030- if (sd) {60316031- struct sched_domain *tmp = sd;60326032- struct sched_group *sg, *prev;60336033- bool right;60346034-60356035- /*60366036- * Traverse to first CPU in group, and count hops60376037- * to cpu from there, switching direction on each60386038- * hop, never ever pointing the last CPU rightward.60396039- */60406040- do {60416041- id = cpumask_first(sched_domain_span(tmp));60426042- prev = sg = tmp->groups;60436043- right = 1;60446044-60456045- while (cpumask_first(sched_group_cpus(sg)) != id)60466046- sg = sg->next;60476047-60486048- while (!cpumask_test_cpu(cpu, sched_group_cpus(sg))) {60496049- prev = sg;60506050- sg = sg->next;60516051- right = !right;60526052- }60536053-60546054- /* A CPU went down, never point back to domain start. */60556055- if (right && cpumask_first(sched_group_cpus(sg->next)) == id)60566056- right = false;60576057-60586058- sg = right ? sg->next : prev;60596059- tmp->idle_buddy = cpumask_first(sched_group_cpus(sg));60606060- } while ((tmp = tmp->child));60616061-60496049+ if (sd)60626050 id = cpumask_first(sched_domain_span(sd));60636063- }6064605160656052 rcu_assign_pointer(per_cpu(sd_llc, cpu), sd);60666053 per_cpu(sd_llc_id, cpu) = id;
+26-11
kernel/sched/fair.c
···20522052 hrtimer_cancel(&cfs_b->slack_timer);20532053}2054205420552055-void unthrottle_offline_cfs_rqs(struct rq *rq)20552055+static void unthrottle_offline_cfs_rqs(struct rq *rq)20562056{20572057 struct cfs_rq *cfs_rq;20582058···21062106 return NULL;21072107}21082108static inline void destroy_cfs_bandwidth(struct cfs_bandwidth *cfs_b) {}21092109-void unthrottle_offline_cfs_rqs(struct rq *rq) {}21092109+static inline void unthrottle_offline_cfs_rqs(struct rq *rq) {}2110211021112111#endif /* CONFIG_CFS_BANDWIDTH */21122112···26372637 int cpu = smp_processor_id();26382638 int prev_cpu = task_cpu(p);26392639 struct sched_domain *sd;26402640+ struct sched_group *sg;26412641+ int i;2640264226412643 /*26422644 * If the task is going to be woken-up on this cpu and if it is···26552653 return prev_cpu;2656265426572655 /*26582658- * Otherwise, check assigned siblings to find an elegible idle cpu.26562656+ * Otherwise, iterate the domains and find an elegible idle cpu.26592657 */26602658 sd = rcu_dereference(per_cpu(sd_llc, target));26612661-26622659 for_each_lower_domain(sd) {26632663- if (!cpumask_test_cpu(sd->idle_buddy, tsk_cpus_allowed(p)))26642664- continue;26652665- if (idle_cpu(sd->idle_buddy))26662666- return sd->idle_buddy;26672667- }26602660+ sg = sd->groups;26612661+ do {26622662+ if (!cpumask_intersects(sched_group_cpus(sg),26632663+ tsk_cpus_allowed(p)))26642664+ goto next;2668266526662666+ for_each_cpu(i, sched_group_cpus(sg)) {26672667+ if (!idle_cpu(i))26682668+ goto next;26692669+ }26702670+26712671+ target = cpumask_first_and(sched_group_cpus(sg),26722672+ tsk_cpus_allowed(p));26732673+ goto done;26742674+next:26752675+ sg = sg->next;26762676+ } while (sg != sd->groups);26772677+ }26782678+done:26692679 return target;26702680}26712681···36723658 * @group: sched_group whose statistics are to be updated.36733659 * @load_idx: Load index of sched_domain of this_cpu for load calc.36743660 * @local_group: Does group contain this_cpu.36753675- * @cpus: Set of cpus considered for load balancing.36763661 * @balance: Should we balance.36773662 * @sgs: variable to hold the statistics for this group.36783663 */···38183805/**38193806 * update_sd_lb_stats - Update sched_domain's statistics for load balancing.38203807 * @env: The load balancing environment.38213821- * @cpus: Set of cpus considered for load balancing.38223808 * @balance: Should we balance.38233809 * @sds: variable to hold the statistics for this sched_domain.38243810 */···49684956static void rq_offline_fair(struct rq *rq)49694957{49704958 update_sysctl();49594959+49604960+ /* Ensure any throttled groups are reachable by pick_next_task */49614961+ unthrottle_offline_cfs_rqs(rq);49714962}4972496349734964#endif /* CONFIG_SMP */
+1
kernel/sched/rt.c
···691691 * runtime - in which case borrowing doesn't make sense.692692 */693693 rt_rq->rt_runtime = RUNTIME_INF;694694+ rt_rq->rt_throttled = 0;694695 raw_spin_unlock(&rt_rq->rt_runtime_lock);695696 raw_spin_unlock(&rt_b->rt_runtime_lock);696697 }
···573573 tick_do_update_jiffies64(now);574574 update_cpu_load_nohz();575575576576+ calc_load_exit_idle();576577 touch_softlockup_watchdog();577578 /*578579 * Cancel the scheduled timer and restore the tick
+89-21
kernel/workqueue.c
···66666767 /* pool flags */6868 POOL_MANAGE_WORKERS = 1 << 0, /* need to manage workers */6969+ POOL_MANAGING_WORKERS = 1 << 1, /* managing workers */69707071 /* worker flags */7172 WORKER_STARTED = 1 << 0, /* started */···653652/* Do we have too many workers and should some go away? */654653static bool too_many_workers(struct worker_pool *pool)655654{656656- bool managing = mutex_is_locked(&pool->manager_mutex);655655+ bool managing = pool->flags & POOL_MANAGING_WORKERS;657656 int nr_idle = pool->nr_idle + managing; /* manager is considered idle */658657 int nr_busy = pool->nr_workers - nr_idle;659658···1327132613281327 /* we did our part, wait for rebind_workers() to finish up */13291328 wait_event(gcwq->rebind_hold, !(worker->flags & WORKER_REBIND));13291329+13301330+ /*13311331+ * rebind_workers() shouldn't finish until all workers passed the13321332+ * above WORKER_REBIND wait. Tell it when done.13331333+ */13341334+ spin_lock_irq(&worker->pool->gcwq->lock);13351335+ if (!--worker->idle_rebind->cnt)13361336+ complete(&worker->idle_rebind->done);13371337+ spin_unlock_irq(&worker->pool->gcwq->lock);13301338}1331133913321340/*···14061396 /* set REBIND and kick idle ones, we'll wait for these later */14071397 for_each_worker_pool(pool, gcwq) {14081398 list_for_each_entry(worker, &pool->idle_list, entry) {13991399+ unsigned long worker_flags = worker->flags;14001400+14091401 if (worker->flags & WORKER_REBIND)14101402 continue;1411140314121412- /* morph UNBOUND to REBIND */14131413- worker->flags &= ~WORKER_UNBOUND;14141414- worker->flags |= WORKER_REBIND;14041404+ /* morph UNBOUND to REBIND atomically */14051405+ worker_flags &= ~WORKER_UNBOUND;14061406+ worker_flags |= WORKER_REBIND;14071407+ ACCESS_ONCE(worker->flags) = worker_flags;1415140814161409 idle_rebind.cnt++;14171410 worker->idle_rebind = &idle_rebind;···14321419 goto retry;14331420 }1434142114351435- /*14361436- * All idle workers are rebound and waiting for %WORKER_REBIND to14371437- * be cleared inside idle_worker_rebind(). Clear and release.14381438- * Clearing %WORKER_REBIND from this foreign context is safe14391439- * because these workers are still guaranteed to be idle.14401440- */14411441- for_each_worker_pool(pool, gcwq)14421442- list_for_each_entry(worker, &pool->idle_list, entry)14431443- worker->flags &= ~WORKER_REBIND;14441444-14451445- wake_up_all(&gcwq->rebind_hold);14461446-14471447- /* rebind busy workers */14221422+ /* all idle workers are rebound, rebind busy workers */14481423 for_each_busy_worker(worker, i, pos, gcwq) {14491424 struct work_struct *rebind_work = &worker->rebind_work;14251425+ unsigned long worker_flags = worker->flags;1450142614511451- /* morph UNBOUND to REBIND */14521452- worker->flags &= ~WORKER_UNBOUND;14531453- worker->flags |= WORKER_REBIND;14271427+ /* morph UNBOUND to REBIND atomically */14281428+ worker_flags &= ~WORKER_UNBOUND;14291429+ worker_flags |= WORKER_REBIND;14301430+ ACCESS_ONCE(worker->flags) = worker_flags;1454143114551432 if (test_and_set_bit(WORK_STRUCT_PENDING_BIT,14561433 work_data_bits(rebind_work)))···14511448 insert_work(get_cwq(gcwq->cpu, system_wq), rebind_work,14521449 worker->scheduled.next,14531450 work_color_to_flags(WORK_NO_COLOR));14511451+ }14521452+14531453+ /*14541454+ * All idle workers are rebound and waiting for %WORKER_REBIND to14551455+ * be cleared inside idle_worker_rebind(). Clear and release.14561456+ * Clearing %WORKER_REBIND from this foreign context is safe14571457+ * because these workers are still guaranteed to be idle.14581458+ *14591459+ * We need to make sure all idle workers passed WORKER_REBIND wait14601460+ * in idle_worker_rebind() before returning; otherwise, workers can14611461+ * get stuck at the wait if hotplug cycle repeats.14621462+ */14631463+ idle_rebind.cnt = 1;14641464+ INIT_COMPLETION(idle_rebind.done);14651465+14661466+ for_each_worker_pool(pool, gcwq) {14671467+ list_for_each_entry(worker, &pool->idle_list, entry) {14681468+ worker->flags &= ~WORKER_REBIND;14691469+ idle_rebind.cnt++;14701470+ }14711471+ }14721472+14731473+ wake_up_all(&gcwq->rebind_hold);14741474+14751475+ if (--idle_rebind.cnt) {14761476+ spin_unlock_irq(&gcwq->lock);14771477+ wait_for_completion(&idle_rebind.done);14781478+ spin_lock_irq(&gcwq->lock);14541479 }14551480}14561481···18251794 struct worker_pool *pool = worker->pool;18261795 bool ret = false;1827179618281828- if (!mutex_trylock(&pool->manager_mutex))17971797+ if (pool->flags & POOL_MANAGING_WORKERS)18291798 return ret;17991799+18001800+ pool->flags |= POOL_MANAGING_WORKERS;18011801+18021802+ /*18031803+ * To simplify both worker management and CPU hotplug, hold off18041804+ * management while hotplug is in progress. CPU hotplug path can't18051805+ * grab %POOL_MANAGING_WORKERS to achieve this because that can18061806+ * lead to idle worker depletion (all become busy thinking someone18071807+ * else is managing) which in turn can result in deadlock under18081808+ * extreme circumstances. Use @pool->manager_mutex to synchronize18091809+ * manager against CPU hotplug.18101810+ *18111811+ * manager_mutex would always be free unless CPU hotplug is in18121812+ * progress. trylock first without dropping @gcwq->lock.18131813+ */18141814+ if (unlikely(!mutex_trylock(&pool->manager_mutex))) {18151815+ spin_unlock_irq(&pool->gcwq->lock);18161816+ mutex_lock(&pool->manager_mutex);18171817+ /*18181818+ * CPU hotplug could have happened while we were waiting18191819+ * for manager_mutex. Hotplug itself can't handle us18201820+ * because manager isn't either on idle or busy list, and18211821+ * @gcwq's state and ours could have deviated.18221822+ *18231823+ * As hotplug is now excluded via manager_mutex, we can18241824+ * simply try to bind. It will succeed or fail depending18251825+ * on @gcwq's current state. Try it and adjust18261826+ * %WORKER_UNBOUND accordingly.18271827+ */18281828+ if (worker_maybe_bind_and_lock(worker))18291829+ worker->flags &= ~WORKER_UNBOUND;18301830+ else18311831+ worker->flags |= WORKER_UNBOUND;18321832+18331833+ ret = true;18341834+ }1830183518311836 pool->flags &= ~POOL_MANAGE_WORKERS;18321837···18731806 ret |= maybe_destroy_workers(pool);18741807 ret |= maybe_create_worker(pool);1875180818091809+ pool->flags &= ~POOL_MANAGING_WORKERS;18761810 mutex_unlock(&pool->manager_mutex);18771811 return ret;18781812}
+4-2
lib/digsig.c
···163163 memcpy(out1 + head, p, l);164164165165 err = pkcs_1_v1_5_decode_emsa(out1, len, mblen, out2, &len);166166+ if (err)167167+ goto err;166168167167- if (!err && len == hlen)168168- err = memcmp(out2, h, hlen);169169+ if (len != hlen || memcmp(out2, h, hlen))170170+ err = -EINVAL;169171170172err:171173 mpi_free(in);
+1-1
mm/memblock.c
···246246 min(new_area_start, memblock.current_limit),247247 new_alloc_size, PAGE_SIZE);248248249249- new_array = addr ? __va(addr) : 0;249249+ new_array = addr ? __va(addr) : NULL;250250 }251251 if (!addr) {252252 pr_err("memblock: Failed to double %s array from %ld to %ld entries !\n",
···8080 unsigned int bitmask;81818282 spin_lock_bh(&ebt_log_lock);8383- printk("<%c>%s IN=%s OUT=%s MAC source = %pM MAC dest = %pM proto = 0x%04x",8383+ printk(KERN_SOH "%c%s IN=%s OUT=%s MAC source = %pM MAC dest = %pM proto = 0x%04x",8484 '0' + loginfo->u.log.level, prefix,8585 in ? in->name : "", out ? out->name : "",8686 eth_hdr(skb)->h_source, eth_hdr(skb)->h_dest,
···18111811 meshhdrlen = ieee80211_new_mesh_header(&mesh_hdr,18121812 sdata, NULL, NULL);18131813 } else {18141814- int is_mesh_mcast = 1;18151815- const u8 *mesh_da;18141814+ /* DS -> MBSS (802.11-2012 13.11.3.3).18151815+ * For unicast with unknown forwarding information,18161816+ * destination might be in the MBSS or if that fails18171817+ * forwarded to another mesh gate. In either case18181818+ * resolution will be handled in ieee80211_xmit(), so18191819+ * leave the original DA. This also works for mcast */18201820+ const u8 *mesh_da = skb->data;1816182118171817- if (is_multicast_ether_addr(skb->data))18181818- /* DA TA mSA AE:SA */18191819- mesh_da = skb->data;18201820- else {18211821- static const u8 bcast[ETH_ALEN] =18221822- { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };18231823- if (mppath) {18241824- /* RA TA mDA mSA AE:DA SA */18251825- mesh_da = mppath->mpp;18261826- is_mesh_mcast = 0;18271827- } else if (mpath) {18281828- mesh_da = mpath->dst;18291829- is_mesh_mcast = 0;18301830- } else {18311831- /* DA TA mSA AE:SA */18321832- mesh_da = bcast;18331833- }18341834- }18221822+ if (mppath)18231823+ mesh_da = mppath->mpp;18241824+ else if (mpath)18251825+ mesh_da = mpath->dst;18261826+ rcu_read_unlock();18271827+18351828 hdrlen = ieee80211_fill_mesh_addresses(&hdr, &fc,18361829 mesh_da, sdata->vif.addr);18371837- rcu_read_unlock();18381838- if (is_mesh_mcast)18301830+ if (is_multicast_ether_addr(mesh_da))18311831+ /* DA TA mSA AE:SA */18391832 meshhdrlen =18401833 ieee80211_new_mesh_header(&mesh_hdr,18411834 sdata,18421835 skb->data + ETH_ALEN,18431836 NULL);18441837 else18381838+ /* RA TA mDA mSA AE:DA SA */18451839 meshhdrlen =18461840 ieee80211_new_mesh_header(&mesh_hdr,18471841 sdata,
+3-1
net/netfilter/ipvs/ip_vs_ctl.c
···11711171 goto out_err;11721172 }11731173 svc->stats.cpustats = alloc_percpu(struct ip_vs_cpu_stats);11741174- if (!svc->stats.cpustats)11741174+ if (!svc->stats.cpustats) {11751175+ ret = -ENOMEM;11751176 goto out_err;11771177+ }1176117811771179 /* I'm the first user of the service */11781180 atomic_set(&svc->usecnt, 0);
+11-5
net/netfilter/nf_conntrack_core.c
···249249{250250 struct nf_conn *ct = (void *)ul_conntrack;251251 struct net *net = nf_ct_net(ct);252252+ struct nf_conntrack_ecache *ecache = nf_ct_ecache_find(ct);253253+254254+ BUG_ON(ecache == NULL);252255253256 if (nf_conntrack_event(IPCT_DESTROY, ct) < 0) {254257 /* bad luck, let's retry again */255255- ct->timeout.expires = jiffies +258258+ ecache->timeout.expires = jiffies +256259 (random32() % net->ct.sysctl_events_retry_timeout);257257- add_timer(&ct->timeout);260260+ add_timer(&ecache->timeout);258261 return;259262 }260263 /* we've got the event delivered, now it's dying */···271268void nf_ct_insert_dying_list(struct nf_conn *ct)272269{273270 struct net *net = nf_ct_net(ct);271271+ struct nf_conntrack_ecache *ecache = nf_ct_ecache_find(ct);272272+273273+ BUG_ON(ecache == NULL);274274275275 /* add this conntrack to the dying list */276276 spin_lock_bh(&nf_conntrack_lock);···281275 &net->ct.dying);282276 spin_unlock_bh(&nf_conntrack_lock);283277 /* set a new timer to retry event delivery */284284- setup_timer(&ct->timeout, death_by_event, (unsigned long)ct);285285- ct->timeout.expires = jiffies +278278+ setup_timer(&ecache->timeout, death_by_event, (unsigned long)ct);279279+ ecache->timeout.expires = jiffies +286280 (random32() % net->ct.sysctl_events_retry_timeout);287287- add_timer(&ct->timeout);281281+ add_timer(&ecache->timeout);288282}289283EXPORT_SYMBOL_GPL(nf_ct_insert_dying_list);290284
+2-1
net/netfilter/nf_conntrack_netlink.c
···27902790 goto err_unreg_subsys;27912791 }2792279227932793- if (register_pernet_subsys(&ctnetlink_net_ops)) {27932793+ ret = register_pernet_subsys(&ctnetlink_net_ops);27942794+ if (ret < 0) {27942795 pr_err("ctnetlink_init: cannot register pernet operations\n");27952796 goto err_unreg_exp_subsys;27962797 }
+10-19
net/netfilter/nf_conntrack_proto_tcp.c
···158158 * sCL -> sSS159159 */160160/* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */161161-/*synack*/ { sIV, sIV, sIG, sIG, sIG, sIG, sIG, sIG, sIG, sSR },161161+/*synack*/ { sIV, sIV, sSR, sIV, sIV, sIV, sIV, sIV, sIV, sSR },162162/*163163 * sNO -> sIV Too late and no reason to do anything164164 * sSS -> sIV Client can't send SYN and then SYN/ACK165165 * sS2 -> sSR SYN/ACK sent to SYN2 in simultaneous open166166- * sSR -> sIG167167- * sES -> sIG Error: SYNs in window outside the SYN_SENT state168168- * are errors. Receiver will reply with RST169169- * and close the connection.170170- * Or we are not in sync and hold a dead connection.171171- * sFW -> sIG172172- * sCW -> sIG173173- * sLA -> sIG174174- * sTW -> sIG175175- * sCL -> sIG166166+ * sSR -> sSR Late retransmitted SYN/ACK in simultaneous open167167+ * sES -> sIV Invalid SYN/ACK packets sent by the client168168+ * sFW -> sIV169169+ * sCW -> sIV170170+ * sLA -> sIV171171+ * sTW -> sIV172172+ * sCL -> sIV176173 */177174/* sNO, sSS, sSR, sES, sFW, sCW, sLA, sTW, sCL, sS2 */178175/*fin*/ { sIV, sIV, sFW, sFW, sLA, sLA, sLA, sTW, sCL, sIV },···630633 ack = sack = receiver->td_end;631634 }632635633633- if (seq == end634634- && (!tcph->rst635635- || (seq == 0 && state->state == TCP_CONNTRACK_SYN_SENT)))636636+ if (tcph->rst && seq == 0 && state->state == TCP_CONNTRACK_SYN_SENT)636637 /*637637- * Packets contains no data: we assume it is valid638638- * and check the ack value only.639639- * However RST segments are always validated by their640640- * SEQ number, except when seq == 0 (reset sent answering641641- * SYN.638638+ * RST sent answering SYN.642639 */643640 seq = end = sender->td_end;644641
···102102 if (q == NULL)103103 continue;104104105105- for (n = 0; n < table->DPs; n++)106106- if (table->tab[n] && table->tab[n] != q &&107107- table->tab[n]->prio == q->prio)105105+ for (n = i + 1; n < table->DPs; n++)106106+ if (table->tab[n] && table->tab[n]->prio == q->prio)108107 return 1;109108 }110109···136137 struct gred_sched_data *q)137138{138139 table->wred_set.qavg = q->vars.qavg;140140+ table->wred_set.qidlestart = q->vars.qidlestart;139141}140142141143static inline int gred_use_ecn(struct gred_sched *t)···176176 skb->tc_index = (skb->tc_index & ~GRED_VQ_MASK) | dp;177177 }178178179179- /* sum up all the qaves of prios <= to ours to get the new qave */179179+ /* sum up all the qaves of prios < ours to get the new qave */180180 if (!gred_wred_mode(t) && gred_rio_mode(t)) {181181 int i;182182···260260 } else {261261 q->backlog -= qdisc_pkt_len(skb);262262263263- if (!q->backlog && !gred_wred_mode(t))264264- red_start_of_idle_period(&q->vars);263263+ if (gred_wred_mode(t)) {264264+ if (!sch->qstats.backlog)265265+ red_start_of_idle_period(&t->wred_set);266266+ } else {267267+ if (!q->backlog)268268+ red_start_of_idle_period(&q->vars);269269+ }265270 }266271267272 return skb;268273 }269269-270270- if (gred_wred_mode(t) && !red_is_idling(&t->wred_set))271271- red_start_of_idle_period(&t->wred_set);272274273275 return NULL;274276}···293291 q->backlog -= len;294292 q->stats.other++;295293296296- if (!q->backlog && !gred_wred_mode(t))297297- red_start_of_idle_period(&q->vars);294294+ if (gred_wred_mode(t)) {295295+ if (!sch->qstats.backlog)296296+ red_start_of_idle_period(&t->wred_set);297297+ } else {298298+ if (!q->backlog)299299+ red_start_of_idle_period(&q->vars);300300+ }298301 }299302300303 qdisc_drop(skb, sch);301304 return len;302305 }303306304304- if (gred_wred_mode(t) && !red_is_idling(&t->wred_set))305305- red_start_of_idle_period(&t->wred_set);306306-307307 return 0;308308-309308}310309311310static void gred_reset(struct Qdisc *sch)···538535 for (i = 0; i < MAX_DPs; i++) {539536 struct gred_sched_data *q = table->tab[i];540537 struct tc_gred_qopt opt;538538+ unsigned long qavg;541539542540 memset(&opt, 0, sizeof(opt));543541···570566 if (gred_wred_mode(table))571567 gred_load_wred_set(table, q);572568573573- opt.qave = red_calc_qavg(&q->parms, &q->vars, q->vars.qavg);569569+ qavg = red_calc_qavg(&q->parms, &q->vars,570570+ q->vars.qavg >> q->parms.Wlog);571571+ opt.qave = qavg >> q->parms.Wlog;574572575573append_opt:576574 if (nla_append(skb, sizeof(opt), &opt) < 0)
+20-1
net/sctp/output.c
···364364 return retval;365365}366366367367+static void sctp_packet_release_owner(struct sk_buff *skb)368368+{369369+ sk_free(skb->sk);370370+}371371+372372+static void sctp_packet_set_owner_w(struct sk_buff *skb, struct sock *sk)373373+{374374+ skb_orphan(skb);375375+ skb->sk = sk;376376+ skb->destructor = sctp_packet_release_owner;377377+378378+ /*379379+ * The data chunks have already been accounted for in sctp_sendmsg(),380380+ * therefore only reserve a single byte to keep socket around until381381+ * the packet has been transmitted.382382+ */383383+ atomic_inc(&sk->sk_wmem_alloc);384384+}385385+367386/* All packets are sent to the network through this function from368387 * sctp_outq_tail().369388 *···424405 /* Set the owning socket so that we know where to get the425406 * destination IP address.426407 */427427- skb_set_owner_w(nskb, sk);408408+ sctp_packet_set_owner_w(nskb, sk);428409429410 if (!sctp_transport_dst_check(tp)) {430411 sctp_transport_route(tp, NULL, sctp_sk(sk));
···56335633 sizeof(connect.ht_capa_mask));5634563456355635 if (info->attrs[NL80211_ATTR_HT_CAPABILITY]) {56365636- if (!info->attrs[NL80211_ATTR_HT_CAPABILITY_MASK])56365636+ if (!info->attrs[NL80211_ATTR_HT_CAPABILITY_MASK]) {56375637+ kfree(connkeys);56375638 return -EINVAL;56395639+ }56385640 memcpy(&connect.ht_capa,56395641 nla_data(info->attrs[NL80211_ATTR_HT_CAPABILITY]),56405642 sizeof(connect.ht_capa));
+1-1
net/xfrm/xfrm_input.c
···212212 /* only the first xfrm gets the encap type */213213 encap_type = 0;214214215215- if (async && x->repl->check(x, skb, seq)) {215215+ if (async && x->repl->recheck(x, skb, seq)) {216216 XFRM_INC_STATS(net, LINUX_MIB_XFRMINSTATESEQERROR);217217 goto drop_unlock;218218 }
···7474 info KSYM ${2}7575 local kallsymopt;76767777+ if [ -n "${CONFIG_SYMBOL_PREFIX}" ]; then7878+ kallsymopt="${kallsymopt} \7979+ --symbol-prefix=${CONFIG_SYMBOL_PREFIX}"8080+ fi8181+7782 if [ -n "${CONFIG_KALLSYMS_ALL}" ]; then7878- kallsymopt=--all-symbols8383+ kallsymopt="${kallsymopt} --all-symbols"7984 fi80858186 local aflags="${KBUILD_AFLAGS} ${KBUILD_AFLAGS_KERNEL} \···216211217212 if ! cmp -s System.map .tmp_System.map; then218213 echo >&2 Inconsistent kallsyms data219219- echo >&2 echo Try "make KALLSYMS_EXTRA_PASS=1" as a workaround214214+ echo >&2 Try "make KALLSYMS_EXTRA_PASS=1" as a workaround220215 cleanup221216 exit 1222217 fi
+3-5
sound/core/compress_offload.c
···8080 int maj = imajor(inode);8181 int ret;82828383- if (f->f_flags & O_WRONLY)8383+ if ((f->f_flags & O_ACCMODE) == O_WRONLY)8484 dirn = SND_COMPRESS_PLAYBACK;8585- else if (f->f_flags & O_RDONLY)8585+ else if ((f->f_flags & O_ACCMODE) == O_RDONLY)8686 dirn = SND_COMPRESS_CAPTURE;8787- else {8888- pr_err("invalid direction\n");8787+ else8988 return -EINVAL;9090- }91899290 if (maj == snd_major)9391 compr = snd_lookup_minor_data(iminor(inode),
+9-3
sound/pci/hda/hda_codec.c
···12091209 kfree(codec);12101210}1211121112121212+static bool snd_hda_codec_get_supported_ps(struct hda_codec *codec,12131213+ hda_nid_t fg, unsigned int power_state);12141214+12121215static void hda_set_power_state(struct hda_codec *codec, hda_nid_t fg,12131216 unsigned int power_state);12141217···13191316 snd_hda_codec_read(codec, nid, 0,13201317 AC_VERB_GET_SUBSYSTEM_ID, 0);13211318 }13191319+13201320+ codec->epss = snd_hda_codec_get_supported_ps(codec,13211321+ codec->afg ? codec->afg : codec->mfg,13221322+ AC_PWRST_EPSS);1322132313231324 /* power-up all before initialization */13241325 hda_set_power_state(codec,···23532346 }23542347 if (codec->patch_ops.free)23552348 codec->patch_ops.free(codec);23492349+ memset(&codec->patch_ops, 0, sizeof(codec->patch_ops));23562350 snd_hda_jack_tbl_clear(codec);23572351 codec->proc_widget_hook = NULL;23582352 codec->spec = NULL;···23692361 codec->num_pcms = 0;23702362 codec->pcm_info = NULL;23712363 codec->preset = NULL;23722372- memset(&codec->patch_ops, 0, sizeof(codec->patch_ops));23732364 codec->slave_dig_outs = NULL;23742365 codec->spdif_status_reset = 0;23752366 module_put(codec->owner);···35503543 /* this delay seems necessary to avoid click noise at power-down */35513544 if (power_state == AC_PWRST_D3) {35523545 /* transition time less than 10ms for power down */35533553- bool epss = snd_hda_codec_get_supported_ps(codec, fg, AC_PWRST_EPSS);35543554- msleep(epss ? 10 : 100);35463546+ msleep(codec->epss ? 10 : 100);35553547 }3556354835573549 /* repeat power states setting at most 10 times*/
+1
sound/pci/hda/hda_codec.h
···862862 unsigned int ignore_misc_bit:1; /* ignore MISC_NO_PRESENCE bit */863863 unsigned int no_jack_detect:1; /* Machine has no jack-detection */864864 unsigned int pcm_format_first:1; /* PCM format must be set first */865865+ unsigned int epss:1; /* supporting EPSS? */865866#ifdef CONFIG_SND_HDA_POWER_SAVE866867 unsigned int power_on :1; /* current (global) power-state */867868 int power_transition; /* power-state in transition */
···141141 *142142 * For implicit feedback, next_packet_size() is unused.143143 */144144-static int next_packet_size(struct snd_usb_endpoint *ep)144144+int snd_usb_endpoint_next_packet_size(struct snd_usb_endpoint *ep)145145{146146 unsigned long flags;147147 int ret;···175175176176 if (ep->retire_data_urb)177177 ep->retire_data_urb(ep->data_subs, urb);178178-}179179-180180-static void prepare_outbound_urb_sizes(struct snd_usb_endpoint *ep,181181- struct snd_urb_ctx *ctx)182182-{183183- int i;184184-185185- for (i = 0; i < ctx->packets; ++i)186186- ctx->packet_size[i] = next_packet_size(ep);187178}188179189180/*···361370 goto exit_clear;362371 }363372364364- prepare_outbound_urb_sizes(ep, ctx);365373 prepare_outbound_urb(ep, ctx);366374 } else {367375 retire_inbound_urb(ep, ctx);···789799/**790800 * snd_usb_endpoint_start: start an snd_usb_endpoint791801 *792792- * @ep: the endpoint to start802802+ * @ep: the endpoint to start803803+ * @can_sleep: flag indicating whether the operation is executed in804804+ * non-atomic context793805 *794806 * A call to this function will increment the use count of the endpoint.795807 * In case it is not already running, the URBs for this endpoint will be···801809 *802810 * Returns an error if the URB submission failed, 0 in all other cases.803811 */804804-int snd_usb_endpoint_start(struct snd_usb_endpoint *ep)812812+int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep)805813{806814 int err;807815 unsigned int i;···812820 /* already running? */813821 if (++ep->use_count != 1)814822 return 0;823823+824824+ /* just to be sure */825825+ deactivate_urbs(ep, 0, can_sleep);826826+ if (can_sleep)827827+ wait_clear_urbs(ep);815828816829 ep->active_mask = 0;817830 ep->unlink_mask = 0;···847850 goto __error;848851849852 if (usb_pipeout(ep->pipe)) {850850- prepare_outbound_urb_sizes(ep, urb->context);851853 prepare_outbound_urb(ep, urb->context);852854 } else {853855 prepare_inbound_urb(ep, urb->context);