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linux
ASoC: qcom: lpass: Add dma fields for codec dma lpass interface
Add lpass interface memebers to support audio path over codec dma.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/1645716828-15305-3-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Srinivasa Rao Mandadapu
and committed by
Mark Brown
ddd60045
74190d7c
+114
+114
sound/soc/qcom/lpass.h
+114
sound/soc/qcom/lpass.h
···
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#define LPASS_MAX_MI2S_PORTS (8)
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#define LPASS_MAX_DMA_CHANNELS (8)
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#define LPASS_MAX_HDMI_DMA_CHANNELS (4)
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#define LPASS_MAX_CDC_DMA_CHANNELS (8)
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#define LPASS_MAX_VA_CDC_DMA_CHANNELS (8)
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#define LPASS_CDC_DMA_INTF_ONE_CHANNEL (0x01)
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#define LPASS_CDC_DMA_INTF_TWO_CHANNEL (0x03)
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#define LPASS_CDC_DMA_INTF_FOUR_CHANNEL (0x0F)
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#define LPASS_CDC_DMA_INTF_SIX_CHANNEL (0x3F)
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#define LPASS_CDC_DMA_INTF_EIGHT_CHANNEL (0xFF)
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#define LPASS_ACTIVE_PDS (4)
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#define LPASS_PROXY_PDS (8)
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#define QCOM_REGMAP_FIELD_ALLOC(d, m, f, mf) \
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do { \
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struct regmap_field *burst8;
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struct regmap_field *burst16;
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struct regmap_field *dynburst;
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struct regmap_field *codec_enable;
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struct regmap_field *codec_pack;
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struct regmap_field *codec_intf;
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struct regmap_field *codec_fs_sel;
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struct regmap_field *codec_channel;
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struct regmap_field *codec_fs_delay;
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};
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/* Both the CPU DAI and platform drivers will access this data */
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/* MI2S bit clock (derived from system clock by a divider */
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struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS];
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struct clk *codec_mem0;
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struct clk *codec_mem1;
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struct clk *codec_mem2;
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struct clk *va_mem0;
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/* MI2S SD lines to use for playback/capture */
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unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS];
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unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS];
···
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bool mi2s_was_prepared[LPASS_MAX_MI2S_PORTS];
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int hdmi_port_enable;
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int codec_dma_enable;
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/* low-power audio interface (LPAIF) registers */
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void __iomem *lpaif;
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void __iomem *hdmiif;
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void __iomem *rxtx_lpaif;
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void __iomem *va_lpaif;
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u32 rxtx_cdc_dma_lpm_buf;
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u32 va_cdc_dma_lpm_buf;
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/* regmap backed by the low-power audio interface (LPAIF) registers */
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struct regmap *lpaif_map;
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struct regmap *hdmiif_map;
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struct regmap *rxtx_lpaif_map;
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struct regmap *va_lpaif_map;
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/* interrupts from the low-power audio interface (LPAIF) */
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int lpaif_irq;
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int hdmiif_irq;
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int rxtxif_irq;
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int vaif_irq;
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/* SOC specific variations in the LPASS IP integration */
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struct lpass_variant *variant;
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/* bit map to keep track of static channel allocations */
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unsigned long dma_ch_bit_map;
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unsigned long hdmi_dma_ch_bit_map;
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unsigned long rxtx_dma_ch_bit_map;
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unsigned long va_dma_ch_bit_map;
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/* used it for handling interrupt per dma channel */
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struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];
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struct snd_pcm_substream *hdmi_substream[LPASS_MAX_HDMI_DMA_CHANNELS];
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struct snd_pcm_substream *rxtx_substream[LPASS_MAX_CDC_DMA_CHANNELS];
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struct snd_pcm_substream *va_substream[LPASS_MAX_CDC_DMA_CHANNELS];
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/* SOC specific clock list */
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struct clk_bulk_data *clks;
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struct lpaif_dmactl *rd_dmactl;
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struct lpaif_dmactl *wr_dmactl;
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struct lpaif_dmactl *hdmi_rd_dmactl;
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/* Regmap fields of CODEC DMA CTRL registers */
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struct lpaif_dmactl *rxtx_rd_dmactl;
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struct lpaif_dmactl *rxtx_wr_dmactl;
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struct lpaif_dmactl *va_wr_dmactl;
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/* Regmap fields of HDMI_CTRL registers*/
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struct regmap_field *hdmitx_legacy_en;
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struct regmap_field *hdmitx_parity_calc_en;
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u32 wrdma_reg_base;
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u32 wrdma_reg_stride;
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u32 wrdma_channels;
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u32 rxtx_irq_reg_base;
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u32 rxtx_irq_reg_stride;
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u32 rxtx_irq_ports;
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u32 rxtx_rdma_reg_base;
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u32 rxtx_rdma_reg_stride;
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u32 rxtx_rdma_channels;
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u32 rxtx_wrdma_reg_base;
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u32 rxtx_wrdma_reg_stride;
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u32 rxtx_wrdma_channels;
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u32 va_irq_reg_base;
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u32 va_irq_reg_stride;
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u32 va_irq_ports;
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u32 va_rdma_reg_base;
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u32 va_rdma_reg_stride;
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u32 va_rdma_channels;
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u32 va_wrdma_reg_base;
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u32 va_wrdma_reg_stride;
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u32 va_wrdma_channels;
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u32 i2sctrl_reg_base;
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u32 i2sctrl_reg_stride;
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u32 i2s_ports;
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struct reg_field wrdma_enable;
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struct reg_field wrdma_dyncclk;
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/* CDC RXTX RD_DMA */
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struct reg_field rxtx_rdma_intf;
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struct reg_field rxtx_rdma_bursten;
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struct reg_field rxtx_rdma_wpscnt;
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struct reg_field rxtx_rdma_fifowm;
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struct reg_field rxtx_rdma_enable;
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struct reg_field rxtx_rdma_dyncclk;
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struct reg_field rxtx_rdma_burst8;
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struct reg_field rxtx_rdma_burst16;
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struct reg_field rxtx_rdma_dynburst;
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struct reg_field rxtx_rdma_codec_enable;
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struct reg_field rxtx_rdma_codec_pack;
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struct reg_field rxtx_rdma_codec_intf;
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struct reg_field rxtx_rdma_codec_fs_sel;
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struct reg_field rxtx_rdma_codec_ch;
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struct reg_field rxtx_rdma_codec_fs_delay;
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/* CDC RXTX WR_DMA */
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struct reg_field rxtx_wrdma_intf;
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struct reg_field rxtx_wrdma_bursten;
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struct reg_field rxtx_wrdma_wpscnt;
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struct reg_field rxtx_wrdma_fifowm;
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struct reg_field rxtx_wrdma_enable;
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struct reg_field rxtx_wrdma_dyncclk;
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struct reg_field rxtx_wrdma_burst8;
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struct reg_field rxtx_wrdma_burst16;
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struct reg_field rxtx_wrdma_dynburst;
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struct reg_field rxtx_wrdma_codec_enable;
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struct reg_field rxtx_wrdma_codec_pack;
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struct reg_field rxtx_wrdma_codec_intf;
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struct reg_field rxtx_wrdma_codec_fs_sel;
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struct reg_field rxtx_wrdma_codec_ch;
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struct reg_field rxtx_wrdma_codec_fs_delay;
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/* CDC VA WR_DMA */
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struct reg_field va_wrdma_intf;
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struct reg_field va_wrdma_bursten;
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struct reg_field va_wrdma_wpscnt;
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struct reg_field va_wrdma_fifowm;
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struct reg_field va_wrdma_enable;
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struct reg_field va_wrdma_dyncclk;
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struct reg_field va_wrdma_burst8;
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struct reg_field va_wrdma_burst16;
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struct reg_field va_wrdma_dynburst;
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struct reg_field va_wrdma_codec_enable;
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struct reg_field va_wrdma_codec_pack;
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struct reg_field va_wrdma_codec_intf;
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struct reg_field va_wrdma_codec_fs_sel;
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struct reg_field va_wrdma_codec_ch;
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struct reg_field va_wrdma_codec_fs_delay;
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/**
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* on SOCs like APQ8016 the channel control bits start
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* at different offset to ipq806x
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**/
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u32 dmactl_audif_start;
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u32 wrdma_channel_start;
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u32 rxtx_wrdma_channel_start;
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u32 va_wrdma_channel_start;
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/* SOC specific initialization like clocks */
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int (*init)(struct platform_device *pdev);
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int (*exit)(struct platform_device *pdev);