Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge some cs42l42 patches into asoc-5.15

+318 -189
+1 -1
Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
··· 114 114 115 115 ports: 116 116 $ref: /schemas/graph.yaml#/properties/ports 117 - properties: 117 + patternProperties: 118 118 port(@[0-9a-f]+)?: 119 119 $ref: audio-graph-port.yaml# 120 120 unevaluatedProperties: false
+2 -1
MAINTAINERS
··· 19992 19992 F: Documentation/devicetree/bindings/mfd/wlf,arizona.yaml 19993 19993 F: Documentation/devicetree/bindings/mfd/wm831x.txt 19994 19994 F: Documentation/devicetree/bindings/regulator/wlf,arizona.yaml 19995 - F: Documentation/devicetree/bindings/sound/wlf,arizona.yaml 19995 + F: Documentation/devicetree/bindings/sound/wlf,*.yaml 19996 + F: Documentation/devicetree/bindings/sound/wm* 19996 19997 F: Documentation/hwmon/wm83??.rst 19997 19998 F: arch/arm/mach-s3c/mach-crag6410* 19998 19999 F: drivers/clk/clk-wm83*.c
+6
include/sound/soc.h
··· 712 712 /* Do not create a PCM for this DAI link (Backend link) */ 713 713 unsigned int ignore:1; 714 714 715 + /* This flag will reorder stop sequence. By enabling this flag 716 + * DMA controller stop sequence will be invoked first followed by 717 + * CPU DAI driver stop sequence 718 + */ 719 + unsigned int stop_dma_first:1; 720 + 715 721 #ifdef CONFIG_SND_SOC_TOPOLOGY 716 722 struct snd_soc_dobj dobj; /* For topology */ 717 723 #endif
+1
sound/soc/Kconfig
··· 36 36 37 37 config SND_SOC_TOPOLOGY 38 38 bool 39 + select SND_DYNAMIC_MINORS 39 40 40 41 config SND_SOC_TOPOLOGY_KUNIT_TEST 41 42 tristate "KUnit tests for SoC topology"
+10
sound/soc/amd/acp-da7219-max98357a.c
··· 525 525 | SND_SOC_DAIFMT_CBM_CFM, 526 526 .init = cz_da7219_init, 527 527 .dpcm_playback = 1, 528 + .stop_dma_first = 1, 528 529 .ops = &cz_da7219_play_ops, 529 530 SND_SOC_DAILINK_REG(designware1, dlgs, platform), 530 531 }, ··· 535 534 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 536 535 | SND_SOC_DAIFMT_CBM_CFM, 537 536 .dpcm_capture = 1, 537 + .stop_dma_first = 1, 538 538 .ops = &cz_da7219_cap_ops, 539 539 SND_SOC_DAILINK_REG(designware2, dlgs, platform), 540 540 }, ··· 545 543 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 546 544 | SND_SOC_DAIFMT_CBM_CFM, 547 545 .dpcm_playback = 1, 546 + .stop_dma_first = 1, 548 547 .ops = &cz_max_play_ops, 549 548 SND_SOC_DAILINK_REG(designware3, mx, platform), 550 549 }, ··· 556 553 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 557 554 | SND_SOC_DAIFMT_CBM_CFM, 558 555 .dpcm_capture = 1, 556 + .stop_dma_first = 1, 559 557 .ops = &cz_dmic0_cap_ops, 560 558 SND_SOC_DAILINK_REG(designware3, adau, platform), 561 559 }, ··· 567 563 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 568 564 | SND_SOC_DAIFMT_CBM_CFM, 569 565 .dpcm_capture = 1, 566 + .stop_dma_first = 1, 570 567 .ops = &cz_dmic1_cap_ops, 571 568 SND_SOC_DAILINK_REG(designware2, adau, platform), 572 569 }, ··· 581 576 | SND_SOC_DAIFMT_CBM_CFM, 582 577 .init = cz_rt5682_init, 583 578 .dpcm_playback = 1, 579 + .stop_dma_first = 1, 584 580 .ops = &cz_rt5682_play_ops, 585 581 SND_SOC_DAILINK_REG(designware1, rt5682, platform), 586 582 }, ··· 591 585 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 592 586 | SND_SOC_DAIFMT_CBM_CFM, 593 587 .dpcm_capture = 1, 588 + .stop_dma_first = 1, 594 589 .ops = &cz_rt5682_cap_ops, 595 590 SND_SOC_DAILINK_REG(designware2, rt5682, platform), 596 591 }, ··· 601 594 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 602 595 | SND_SOC_DAIFMT_CBM_CFM, 603 596 .dpcm_playback = 1, 597 + .stop_dma_first = 1, 604 598 .ops = &cz_rt5682_max_play_ops, 605 599 SND_SOC_DAILINK_REG(designware3, mx, platform), 606 600 }, ··· 612 604 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 613 605 | SND_SOC_DAIFMT_CBM_CFM, 614 606 .dpcm_capture = 1, 607 + .stop_dma_first = 1, 615 608 .ops = &cz_rt5682_dmic0_cap_ops, 616 609 SND_SOC_DAILINK_REG(designware3, adau, platform), 617 610 }, ··· 623 614 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 624 615 | SND_SOC_DAIFMT_CBM_CFM, 625 616 .dpcm_capture = 1, 617 + .stop_dma_first = 1, 626 618 .ops = &cz_rt5682_dmic1_cap_ops, 627 619 SND_SOC_DAILINK_REG(designware2, adau, platform), 628 620 },
+1 -1
sound/soc/amd/acp-pcm-dma.c
··· 969 969 970 970 acp_set_sram_bank_state(rtd->acp_mmio, 0, true); 971 971 /* Save for runtime private data */ 972 - rtd->dma_addr = substream->dma_buffer.addr; 972 + rtd->dma_addr = runtime->dma_addr; 973 973 rtd->order = get_order(size); 974 974 975 975 /* Fill the page table entries in ACP SRAM */
+1 -1
sound/soc/amd/raven/acp3x-pcm-dma.c
··· 286 286 pr_err("pinfo failed\n"); 287 287 } 288 288 size = params_buffer_bytes(params); 289 - rtd->dma_addr = substream->dma_buffer.addr; 289 + rtd->dma_addr = substream->runtime->dma_addr; 290 290 rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT); 291 291 config_acp3x_dma(rtd, substream->stream); 292 292 return 0;
+1 -1
sound/soc/amd/renoir/acp3x-pdm-dma.c
··· 242 242 return -EINVAL; 243 243 size = params_buffer_bytes(params); 244 244 period_bytes = params_period_bytes(params); 245 - rtd->dma_addr = substream->dma_buffer.addr; 245 + rtd->dma_addr = substream->runtime->dma_addr; 246 246 rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT); 247 247 config_acp_dma(rtd, substream->stream); 248 248 init_pdm_ring_buffer(MEM_WINDOW_START, size, period_bytes,
+2
sound/soc/amd/renoir/rn-pci-acp3x.c
··· 382 382 .runtime_resume = snd_rn_acp_resume, 383 383 .suspend = snd_rn_acp_suspend, 384 384 .resume = snd_rn_acp_resume, 385 + .restore = snd_rn_acp_resume, 386 + .poweroff = snd_rn_acp_suspend, 385 387 }; 386 388 387 389 static void snd_rn_acp_remove(struct pci_dev *pci)
+2
sound/soc/codecs/Kconfig
··· 1575 1575 Qualcomm SoCs like SDM845. 1576 1576 1577 1577 config SND_SOC_WCD938X 1578 + depends on SND_SOC_WCD938X_SDW 1578 1579 tristate 1580 + depends on SOUNDWIRE || !SOUNDWIRE 1579 1581 1580 1582 config SND_SOC_WCD938X_SDW 1581 1583 tristate "WCD9380/WCD9385 Codec - SDW"
+4 -1
sound/soc/codecs/Makefile
··· 585 585 obj-$(CONFIG_SND_SOC_WCD9335) += snd-soc-wcd9335.o 586 586 obj-$(CONFIG_SND_SOC_WCD934X) += snd-soc-wcd934x.o 587 587 obj-$(CONFIG_SND_SOC_WCD938X) += snd-soc-wcd938x.o 588 - obj-$(CONFIG_SND_SOC_WCD938X_SDW) += snd-soc-wcd938x-sdw.o 588 + ifdef CONFIG_SND_SOC_WCD938X_SDW 589 + # avoid link failure by forcing sdw code built-in when needed 590 + obj-$(CONFIG_SND_SOC_WCD938X) += snd-soc-wcd938x-sdw.o 591 + endif 589 592 obj-$(CONFIG_SND_SOC_WL1273) += snd-soc-wl1273.o 590 593 obj-$(CONFIG_SND_SOC_WM0010) += snd-soc-wm0010.o 591 594 obj-$(CONFIG_SND_SOC_WM1250_EV1) += snd-soc-wm1250-ev1.o
+96 -36
sound/soc/codecs/cs42l42.c
··· 405 405 .use_single_write = true, 406 406 }; 407 407 408 - static DECLARE_TLV_DB_SCALE(adc_tlv, -9600, 100, false); 408 + static DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 100, true); 409 409 static DECLARE_TLV_DB_SCALE(mixer_tlv, -6300, 100, true); 410 410 411 411 static const char * const cs42l42_hpf_freq_text[] = { ··· 425 425 CS42L42_ADC_WNF_CF_SHIFT, 426 426 cs42l42_wnf3_freq_text); 427 427 428 - static const char * const cs42l42_wnf05_freq_text[] = { 429 - "280Hz", "315Hz", "350Hz", "385Hz", 430 - "420Hz", "455Hz", "490Hz", "525Hz" 431 - }; 432 - 433 - static SOC_ENUM_SINGLE_DECL(cs42l42_wnf05_freq_enum, CS42L42_ADC_WNF_HPF_CTL, 434 - CS42L42_ADC_WNF_CF_SHIFT, 435 - cs42l42_wnf05_freq_text); 436 - 437 428 static const struct snd_kcontrol_new cs42l42_snd_controls[] = { 438 429 /* ADC Volume and Filter Controls */ 439 430 SOC_SINGLE("ADC Notch Switch", CS42L42_ADC_CTL, 440 - CS42L42_ADC_NOTCH_DIS_SHIFT, true, false), 431 + CS42L42_ADC_NOTCH_DIS_SHIFT, true, true), 441 432 SOC_SINGLE("ADC Weak Force Switch", CS42L42_ADC_CTL, 442 433 CS42L42_ADC_FORCE_WEAK_VCM_SHIFT, true, false), 443 434 SOC_SINGLE("ADC Invert Switch", CS42L42_ADC_CTL, 444 435 CS42L42_ADC_INV_SHIFT, true, false), 445 436 SOC_SINGLE("ADC Boost Switch", CS42L42_ADC_CTL, 446 437 CS42L42_ADC_DIG_BOOST_SHIFT, true, false), 447 - SOC_SINGLE_SX_TLV("ADC Volume", CS42L42_ADC_VOLUME, 448 - CS42L42_ADC_VOL_SHIFT, 0xA0, 0x6C, adc_tlv), 438 + SOC_SINGLE_S8_TLV("ADC Volume", CS42L42_ADC_VOLUME, -97, 12, adc_tlv), 449 439 SOC_SINGLE("ADC WNF Switch", CS42L42_ADC_WNF_HPF_CTL, 450 440 CS42L42_ADC_WNF_EN_SHIFT, true, false), 451 441 SOC_SINGLE("ADC HPF Switch", CS42L42_ADC_WNF_HPF_CTL, 452 442 CS42L42_ADC_HPF_EN_SHIFT, true, false), 453 443 SOC_ENUM("HPF Corner Freq", cs42l42_hpf_freq_enum), 454 444 SOC_ENUM("WNF 3dB Freq", cs42l42_wnf3_freq_enum), 455 - SOC_ENUM("WNF 05dB Freq", cs42l42_wnf05_freq_enum), 456 445 457 446 /* DAC Volume and Filter Controls */ 458 447 SOC_SINGLE("DACA Invert Switch", CS42L42_DAC_CTL1, ··· 460 471 SND_SOC_DAPM_OUTPUT("HP"), 461 472 SND_SOC_DAPM_DAC("DAC", NULL, CS42L42_PWR_CTL1, CS42L42_HP_PDN_SHIFT, 1), 462 473 SND_SOC_DAPM_MIXER("MIXER", CS42L42_PWR_CTL1, CS42L42_MIXER_PDN_SHIFT, 1, NULL, 0), 463 - SND_SOC_DAPM_AIF_IN("SDIN1", NULL, 0, CS42L42_ASP_RX_DAI0_EN, CS42L42_ASP_RX0_CH1_SHIFT, 0), 464 - SND_SOC_DAPM_AIF_IN("SDIN2", NULL, 1, CS42L42_ASP_RX_DAI0_EN, CS42L42_ASP_RX0_CH2_SHIFT, 0), 474 + SND_SOC_DAPM_AIF_IN("SDIN1", NULL, 0, SND_SOC_NOPM, 0, 0), 475 + SND_SOC_DAPM_AIF_IN("SDIN2", NULL, 1, SND_SOC_NOPM, 0, 0), 465 476 466 477 /* Playback Requirements */ 467 478 SND_SOC_DAPM_SUPPLY("ASP DAI0", CS42L42_PWR_CTL1, CS42L42_ASP_DAI_PDN_SHIFT, 1, NULL, 0), ··· 586 597 * Table 4-5 from the Datasheet 587 598 */ 588 599 static const struct cs42l42_pll_params pll_ratio_table[] = { 600 + { 1411200, 0, 1, 0x00, 0x80, 0x000000, 0x03, 0x10, 11289600, 128, 2}, 589 601 { 1536000, 0, 1, 0x00, 0x7D, 0x000000, 0x03, 0x10, 12000000, 125, 2}, 590 602 { 2304000, 0, 1, 0x00, 0x55, 0xC00000, 0x02, 0x10, 12288000, 85, 2}, 591 603 { 2400000, 0, 1, 0x00, 0x50, 0x000000, 0x03, 0x10, 12000000, 80, 2}, ··· 620 630 621 631 for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) { 622 632 if (pll_ratio_table[i].sclk == clk) { 633 + cs42l42->pll_config = i; 634 + 623 635 /* Configure the internal sample rate */ 624 636 snd_soc_component_update_bits(component, CS42L42_MCLK_CTL, 625 637 CS42L42_INTERNAL_FS_MASK, ··· 630 638 (pll_ratio_table[i].mclk_int != 631 639 24000000)) << 632 640 CS42L42_INTERNAL_FS_SHIFT); 633 - /* Set the MCLK src (PLL or SCLK) and the divide 634 - * ratio 635 - */ 641 + 636 642 snd_soc_component_update_bits(component, CS42L42_MCLK_SRC_SEL, 637 - CS42L42_MCLK_SRC_SEL_MASK | 638 643 CS42L42_MCLKDIV_MASK, 639 - (pll_ratio_table[i].mclk_src_sel 640 - << CS42L42_MCLK_SRC_SEL_SHIFT) | 641 644 (pll_ratio_table[i].mclk_div << 642 645 CS42L42_MCLKDIV_SHIFT)); 643 646 /* Set up the LRCLK */ ··· 668 681 CS42L42_FSYNC_PULSE_WIDTH_MASK, 669 682 CS42L42_FRAC1_VAL(fsync - 1) << 670 683 CS42L42_FSYNC_PULSE_WIDTH_SHIFT); 671 - snd_soc_component_update_bits(component, 672 - CS42L42_ASP_FRM_CFG, 673 - CS42L42_ASP_5050_MASK, 674 - CS42L42_ASP_5050_MASK); 675 - /* Set the frame delay to 1.0 SCLK clocks */ 676 - snd_soc_component_update_bits(component, CS42L42_ASP_FRM_CFG, 677 - CS42L42_ASP_FSD_MASK, 678 - CS42L42_ASP_FSD_1_0 << 679 - CS42L42_ASP_FSD_SHIFT); 680 684 /* Set the sample rates (96k or lower) */ 681 685 snd_soc_component_update_bits(component, CS42L42_FS_RATE_EN, 682 686 CS42L42_FS_EN_MASK, ··· 767 789 /* interface format */ 768 790 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 769 791 case SND_SOC_DAIFMT_I2S: 770 - case SND_SOC_DAIFMT_LEFT_J: 792 + /* 793 + * 5050 mode, frame starts on falling edge of LRCLK, 794 + * frame delayed by 1.0 SCLKs 795 + */ 796 + snd_soc_component_update_bits(component, 797 + CS42L42_ASP_FRM_CFG, 798 + CS42L42_ASP_STP_MASK | 799 + CS42L42_ASP_5050_MASK | 800 + CS42L42_ASP_FSD_MASK, 801 + CS42L42_ASP_5050_MASK | 802 + (CS42L42_ASP_FSD_1_0 << 803 + CS42L42_ASP_FSD_SHIFT)); 771 804 break; 772 805 default: 773 806 return -EINVAL; ··· 808 819 return 0; 809 820 } 810 821 822 + static int cs42l42_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 823 + { 824 + struct snd_soc_component *component = dai->component; 825 + struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component); 826 + 827 + /* 828 + * Sample rates < 44.1 kHz would produce an out-of-range SCLK with 829 + * a standard I2S frame. If the machine driver sets SCLK it must be 830 + * legal. 831 + */ 832 + if (cs42l42->sclk) 833 + return 0; 834 + 835 + /* Machine driver has not set a SCLK, limit bottom end to 44.1 kHz */ 836 + return snd_pcm_hw_constraint_minmax(substream->runtime, 837 + SNDRV_PCM_HW_PARAM_RATE, 838 + 44100, 192000); 839 + } 840 + 811 841 static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream, 812 842 struct snd_pcm_hw_params *params, 813 843 struct snd_soc_dai *dai) ··· 839 831 840 832 cs42l42->srate = params_rate(params); 841 833 cs42l42->bclk = snd_soc_params_to_bclk(params); 834 + 835 + /* I2S frame always has 2 channels even for mono audio */ 836 + if (channels == 1) 837 + cs42l42->bclk *= 2; 838 + 839 + /* 840 + * Assume 24-bit samples are in 32-bit slots, to prevent SCLK being 841 + * more than assumed (which would result in overclocking). 842 + */ 843 + if (params_width(params) == 24) 844 + cs42l42->bclk = (cs42l42->bclk / 3) * 4; 842 845 843 846 switch(substream->stream) { 844 847 case SNDRV_PCM_STREAM_CAPTURE: ··· 874 855 snd_soc_component_update_bits(component, CS42L42_ASP_RX_DAI0_CH2_AP_RES, 875 856 CS42L42_ASP_RX_CH_AP_MASK | 876 857 CS42L42_ASP_RX_CH_RES_MASK, val); 858 + 859 + /* Channel B comes from the last active channel */ 860 + snd_soc_component_update_bits(component, CS42L42_SP_RX_CH_SEL, 861 + CS42L42_SP_RX_CHB_SEL_MASK, 862 + (channels - 1) << CS42L42_SP_RX_CHB_SEL_SHIFT); 863 + 864 + /* Both LRCLK slots must be enabled */ 865 + snd_soc_component_update_bits(component, CS42L42_ASP_RX_DAI0_EN, 866 + CS42L42_ASP_RX0_CH_EN_MASK, 867 + BIT(CS42L42_ASP_RX0_CH1_SHIFT) | 868 + BIT(CS42L42_ASP_RX0_CH2_SHIFT)); 877 869 break; 878 870 default: 879 871 break; ··· 898 868 { 899 869 struct snd_soc_component *component = dai->component; 900 870 struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component); 871 + int i; 901 872 902 - cs42l42->sclk = freq; 873 + if (freq == 0) { 874 + cs42l42->sclk = 0; 875 + return 0; 876 + } 903 877 904 - return 0; 878 + for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) { 879 + if (pll_ratio_table[i].sclk == freq) { 880 + cs42l42->sclk = freq; 881 + return 0; 882 + } 883 + } 884 + 885 + dev_err(component->dev, "SCLK %u not supported\n", freq); 886 + 887 + return -EINVAL; 905 888 } 906 889 907 890 static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream) ··· 943 900 */ 944 901 regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_osc_seq, 945 902 ARRAY_SIZE(cs42l42_to_osc_seq)); 903 + 904 + /* Must disconnect PLL before stopping it */ 905 + snd_soc_component_update_bits(component, 906 + CS42L42_MCLK_SRC_SEL, 907 + CS42L42_MCLK_SRC_SEL_MASK, 908 + 0); 909 + usleep_range(100, 200); 910 + 946 911 snd_soc_component_update_bits(component, CS42L42_PLL_CTL1, 947 912 CS42L42_PLL_START_MASK, 0); 948 913 } 949 914 } else { 950 915 if (!cs42l42->stream_use) { 951 916 /* SCLK must be running before codec unmute */ 952 - if ((cs42l42->bclk < 11289600) && (cs42l42->sclk < 11289600)) { 917 + if (pll_ratio_table[cs42l42->pll_config].mclk_src_sel) { 953 918 snd_soc_component_update_bits(component, CS42L42_PLL_CTL1, 954 919 CS42L42_PLL_START_MASK, 1); 955 920 ··· 978 927 CS42L42_PLL_LOCK_TIMEOUT_US); 979 928 if (ret < 0) 980 929 dev_warn(component->dev, "PLL failed to lock: %d\n", ret); 930 + 931 + /* PLL must be running to drive glitchless switch logic */ 932 + snd_soc_component_update_bits(component, 933 + CS42L42_MCLK_SRC_SEL, 934 + CS42L42_MCLK_SRC_SEL_MASK, 935 + CS42L42_MCLK_SRC_SEL_MASK); 981 936 } 982 937 983 938 /* Mark SCLK as present, turn off internal oscillator */ ··· 1017 960 SNDRV_PCM_FMTBIT_S24_LE |\ 1018 961 SNDRV_PCM_FMTBIT_S32_LE ) 1019 962 1020 - 1021 963 static const struct snd_soc_dai_ops cs42l42_ops = { 964 + .startup = cs42l42_dai_startup, 1022 965 .hw_params = cs42l42_pcm_hw_params, 1023 966 .set_fmt = cs42l42_set_dai_fmt, 1024 967 .set_sysclk = cs42l42_set_sysclk, ··· 2127 2070 MODULE_AUTHOR("James Schulman, Cirrus Logic Inc, <james.schulman@cirrus.com>"); 2128 2071 MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>"); 2129 2072 MODULE_AUTHOR("Michael White, Cirrus Logic Inc, <michael.white@cirrus.com>"); 2073 + MODULE_AUTHOR("Lucas Tanure <tanureal@opensource.cirrus.com>"); 2074 + MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>"); 2075 + MODULE_AUTHOR("Vitaly Rodionov <vitalyr@opensource.cirrus.com>"); 2130 2076 MODULE_LICENSE("GPL");
+3
sound/soc/codecs/cs42l42.h
··· 653 653 654 654 /* Page 0x25 Audio Port Registers */ 655 655 #define CS42L42_SP_RX_CH_SEL (CS42L42_PAGE_25 + 0x01) 656 + #define CS42L42_SP_RX_CHB_SEL_SHIFT 2 657 + #define CS42L42_SP_RX_CHB_SEL_MASK (3 << CS42L42_SP_RX_CHB_SEL_SHIFT) 656 658 657 659 #define CS42L42_SP_RX_ISOC_CTL (CS42L42_PAGE_25 + 0x02) 658 660 #define CS42L42_SP_RX_RSYNC_SHIFT 6 ··· 777 775 struct gpio_desc *reset_gpio; 778 776 struct completion pdn_done; 779 777 struct snd_soc_jack *jack; 778 + int pll_config; 780 779 int bclk; 781 780 u32 sclk; 782 781 u32 srate;
+6 -36
sound/soc/codecs/nau8824.c
··· 828 828 } 829 829 } 830 830 831 - static void nau8824_dapm_disable_pin(struct nau8824 *nau8824, const char *pin) 832 - { 833 - struct snd_soc_dapm_context *dapm = nau8824->dapm; 834 - const char *prefix = dapm->component->name_prefix; 835 - char prefixed_pin[80]; 836 - 837 - if (prefix) { 838 - snprintf(prefixed_pin, sizeof(prefixed_pin), "%s %s", 839 - prefix, pin); 840 - snd_soc_dapm_disable_pin(dapm, prefixed_pin); 841 - } else { 842 - snd_soc_dapm_disable_pin(dapm, pin); 843 - } 844 - } 845 - 846 - static void nau8824_dapm_enable_pin(struct nau8824 *nau8824, const char *pin) 847 - { 848 - struct snd_soc_dapm_context *dapm = nau8824->dapm; 849 - const char *prefix = dapm->component->name_prefix; 850 - char prefixed_pin[80]; 851 - 852 - if (prefix) { 853 - snprintf(prefixed_pin, sizeof(prefixed_pin), "%s %s", 854 - prefix, pin); 855 - snd_soc_dapm_force_enable_pin(dapm, prefixed_pin); 856 - } else { 857 - snd_soc_dapm_force_enable_pin(dapm, pin); 858 - } 859 - } 860 - 861 831 static void nau8824_eject_jack(struct nau8824 *nau8824) 862 832 { 863 833 struct snd_soc_dapm_context *dapm = nau8824->dapm; ··· 836 866 /* Clear all interruption status */ 837 867 nau8824_int_status_clear_all(regmap); 838 868 839 - nau8824_dapm_disable_pin(nau8824, "SAR"); 840 - nau8824_dapm_disable_pin(nau8824, "MICBIAS"); 869 + snd_soc_dapm_disable_pin(dapm, "SAR"); 870 + snd_soc_dapm_disable_pin(dapm, "MICBIAS"); 841 871 snd_soc_dapm_sync(dapm); 842 872 843 873 /* Enable the insertion interruption, disable the ejection ··· 867 897 struct regmap *regmap = nau8824->regmap; 868 898 int adc_value, event = 0, event_mask = 0; 869 899 870 - nau8824_dapm_enable_pin(nau8824, "MICBIAS"); 871 - nau8824_dapm_enable_pin(nau8824, "SAR"); 900 + snd_soc_dapm_enable_pin(dapm, "MICBIAS"); 901 + snd_soc_dapm_enable_pin(dapm, "SAR"); 872 902 snd_soc_dapm_sync(dapm); 873 903 874 904 msleep(100); ··· 879 909 if (adc_value < HEADSET_SARADC_THD) { 880 910 event |= SND_JACK_HEADPHONE; 881 911 882 - nau8824_dapm_disable_pin(nau8824, "SAR"); 883 - nau8824_dapm_disable_pin(nau8824, "MICBIAS"); 912 + snd_soc_dapm_disable_pin(dapm, "SAR"); 913 + snd_soc_dapm_disable_pin(dapm, "MICBIAS"); 884 914 snd_soc_dapm_sync(dapm); 885 915 } else { 886 916 event |= SND_JACK_HEADSET;
+2
sound/soc/codecs/rt5631.c
··· 1695 1695 .reg_defaults = rt5631_reg, 1696 1696 .num_reg_defaults = ARRAY_SIZE(rt5631_reg), 1697 1697 .cache_type = REGCACHE_RBTREE, 1698 + .use_single_read = true, 1699 + .use_single_write = true, 1698 1700 }; 1699 1701 1700 1702 static int rt5631_i2c_probe(struct i2c_client *i2c,
+7 -2
sound/soc/codecs/rt5682.c
··· 44 44 {RT5682_I2C_CTRL, 0x000f}, 45 45 {RT5682_PLL2_INTERNAL, 0x8266}, 46 46 {RT5682_SAR_IL_CMD_3, 0x8365}, 47 + {RT5682_SAR_IL_CMD_6, 0x0180}, 47 48 }; 48 49 49 50 void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev) ··· 974 973 rt5682_enable_push_button_irq(component, false); 975 974 snd_soc_component_update_bits(component, RT5682_CBJ_CTRL_1, 976 975 RT5682_TRIG_JD_MASK, RT5682_TRIG_JD_LOW); 977 - if (!snd_soc_dapm_get_pin_status(dapm, "MICBIAS")) 976 + if (!snd_soc_dapm_get_pin_status(dapm, "MICBIAS") && 977 + !snd_soc_dapm_get_pin_status(dapm, "PLL1") && 978 + !snd_soc_dapm_get_pin_status(dapm, "PLL2B")) 978 979 snd_soc_component_update_bits(component, 979 980 RT5682_PWR_ANLG_1, RT5682_PWR_MB, 0); 980 - if (!snd_soc_dapm_get_pin_status(dapm, "Vref2")) 981 + if (!snd_soc_dapm_get_pin_status(dapm, "Vref2") && 982 + !snd_soc_dapm_get_pin_status(dapm, "PLL1") && 983 + !snd_soc_dapm_get_pin_status(dapm, "PLL2B")) 981 984 snd_soc_component_update_bits(component, 982 985 RT5682_PWR_ANLG_1, RT5682_PWR_VREF2, 0); 983 986 snd_soc_component_update_bits(component, RT5682_PWR_ANLG_3,
+12
sound/soc/codecs/tlv320aic31xx.c
··· 35 35 36 36 #include "tlv320aic31xx.h" 37 37 38 + static int aic31xx_set_jack(struct snd_soc_component *component, 39 + struct snd_soc_jack *jack, void *data); 40 + 38 41 static const struct reg_default aic31xx_reg_defaults[] = { 39 42 { AIC31XX_CLKMUX, 0x00 }, 40 43 { AIC31XX_PLLPR, 0x11 }, ··· 1259 1256 return ret; 1260 1257 } 1261 1258 1259 + /* 1260 + * The jack detection configuration is in the same register 1261 + * that is used to report jack detect status so is volatile 1262 + * and not covered by the cache sync, restore it separately. 1263 + */ 1264 + aic31xx_set_jack(component, aic31xx->jack, NULL); 1265 + 1262 1266 return 0; 1263 1267 } 1264 1268 ··· 1614 1604 ret); 1615 1605 return ret; 1616 1606 } 1607 + regcache_cache_only(aic31xx->regmap, true); 1608 + 1617 1609 aic31xx->dev = &i2c->dev; 1618 1610 aic31xx->irq = i2c->irq; 1619 1611
+39 -21
sound/soc/codecs/tlv320aic32x4.c
··· 250 250 static DECLARE_TLV_DB_SCALE(tlv_driver_gain, -600, 100, 0); 251 251 /* -12dB min, 0.5dB steps */ 252 252 static DECLARE_TLV_DB_SCALE(tlv_adc_vol, -1200, 50, 0); 253 - 254 - static DECLARE_TLV_DB_LINEAR(tlv_spk_vol, TLV_DB_GAIN_MUTE, 0); 253 + /* -6dB min, 1dB steps */ 254 + static DECLARE_TLV_DB_SCALE(tlv_tas_driver_gain, -5850, 50, 0); 255 255 static DECLARE_TLV_DB_SCALE(tlv_amp_vol, 0, 600, 1); 256 256 257 257 static const char * const lo_cm_text[] = { ··· 682 682 static int aic32x4_set_processing_blocks(struct snd_soc_component *component, 683 683 u8 r_block, u8 p_block) 684 684 { 685 - if (r_block > 18 || p_block > 25) 686 - return -EINVAL; 685 + struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); 687 686 688 - snd_soc_component_write(component, AIC32X4_ADCSPB, r_block); 689 - snd_soc_component_write(component, AIC32X4_DACSPB, p_block); 687 + if (aic32x4->type == AIC32X4_TYPE_TAS2505) { 688 + if (r_block || p_block > 3) 689 + return -EINVAL; 690 + 691 + snd_soc_component_write(component, AIC32X4_DACSPB, p_block); 692 + } else { /* AIC32x4 */ 693 + if (r_block > 18 || p_block > 25) 694 + return -EINVAL; 695 + 696 + snd_soc_component_write(component, AIC32X4_ADCSPB, r_block); 697 + snd_soc_component_write(component, AIC32X4_DACSPB, p_block); 698 + } 690 699 691 700 return 0; 692 701 } ··· 704 695 unsigned int sample_rate, unsigned int channels, 705 696 unsigned int bit_depth) 706 697 { 698 + struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); 707 699 u8 aosr; 708 700 u16 dosr; 709 701 u8 adc_resource_class, dac_resource_class; ··· 731 721 adc_resource_class = 6; 732 722 dac_resource_class = 8; 733 723 dosr_increment = 8; 734 - aic32x4_set_processing_blocks(component, 1, 1); 724 + if (aic32x4->type == AIC32X4_TYPE_TAS2505) 725 + aic32x4_set_processing_blocks(component, 0, 1); 726 + else 727 + aic32x4_set_processing_blocks(component, 1, 1); 735 728 } else if (sample_rate <= 96000) { 736 729 aosr = 64; 737 730 adc_resource_class = 6; 738 731 dac_resource_class = 8; 739 732 dosr_increment = 4; 740 - aic32x4_set_processing_blocks(component, 1, 9); 733 + if (aic32x4->type == AIC32X4_TYPE_TAS2505) 734 + aic32x4_set_processing_blocks(component, 0, 1); 735 + else 736 + aic32x4_set_processing_blocks(component, 1, 9); 741 737 } else if (sample_rate == 192000) { 742 738 aosr = 32; 743 739 adc_resource_class = 3; 744 740 dac_resource_class = 4; 745 741 dosr_increment = 2; 746 - aic32x4_set_processing_blocks(component, 13, 19); 742 + if (aic32x4->type == AIC32X4_TYPE_TAS2505) 743 + aic32x4_set_processing_blocks(component, 0, 1); 744 + else 745 + aic32x4_set_processing_blocks(component, 13, 19); 747 746 } else { 748 747 dev_err(component->dev, "Sampling rate not supported\n"); 749 748 return -EINVAL; ··· 1082 1063 }; 1083 1064 1084 1065 static const struct snd_kcontrol_new aic32x4_tas2505_snd_controls[] = { 1085 - SOC_DOUBLE_R_S_TLV("PCM Playback Volume", AIC32X4_LDACVOL, 1086 - AIC32X4_LDACVOL, 0, -0x7f, 0x30, 7, 0, tlv_pcm), 1066 + SOC_SINGLE_S8_TLV("PCM Playback Volume", 1067 + AIC32X4_LDACVOL, -0x7f, 0x30, tlv_pcm), 1087 1068 SOC_ENUM("DAC Playback PowerTune Switch", l_ptm_enum), 1088 - SOC_DOUBLE_R_S_TLV("HP Driver Playback Volume", AIC32X4_HPLGAIN, 1089 - AIC32X4_HPLGAIN, 0, -0x6, 0x1d, 5, 0, 1090 - tlv_driver_gain), 1091 - SOC_DOUBLE_R("HP DAC Playback Switch", AIC32X4_HPLGAIN, 1092 - AIC32X4_HPLGAIN, 6, 0x01, 1), 1069 + 1070 + SOC_SINGLE_TLV("HP Driver Gain Volume", 1071 + AIC32X4_HPLGAIN, 0, 0x74, 1, tlv_tas_driver_gain), 1072 + SOC_SINGLE("HP DAC Playback Switch", AIC32X4_HPLGAIN, 6, 1, 1), 1073 + 1074 + SOC_SINGLE_TLV("Speaker Driver Playback Volume", 1075 + TAS2505_SPKVOL1, 0, 0x74, 1, tlv_tas_driver_gain), 1076 + SOC_SINGLE_TLV("Speaker Amplifier Playback Volume", 1077 + TAS2505_SPKVOL2, 4, 5, 0, tlv_amp_vol), 1093 1078 1094 1079 SOC_SINGLE("Auto-mute Switch", AIC32X4_DACMUTE, 4, 7, 0), 1095 - 1096 - SOC_SINGLE_RANGE_TLV("Speaker Driver Playback Volume", TAS2505_SPKVOL1, 1097 - 0, 0, 117, 1, tlv_spk_vol), 1098 - SOC_SINGLE_TLV("Speaker Amplifier Playback Volume", TAS2505_SPKVOL2, 1099 - 4, 5, 0, tlv_amp_vol), 1100 1080 }; 1101 1081 1102 1082 static const struct snd_kcontrol_new hp_output_mixer_controls[] = {
+9 -9
sound/soc/codecs/wcd938x.c
··· 4076 4076 (WCD938X_DIGITAL_INTR_LEVEL_0 + i), 0); 4077 4077 } 4078 4078 4079 - ret = wcd938x_irq_init(wcd938x, component->dev); 4080 - if (ret) { 4081 - dev_err(component->dev, "%s: IRQ init failed: %d\n", 4082 - __func__, ret); 4083 - return ret; 4084 - } 4085 - 4086 4079 wcd938x->hphr_pdm_wd_int = regmap_irq_get_virq(wcd938x->irq_chip, 4087 4080 WCD938X_IRQ_HPHR_PDM_WD_INT); 4088 4081 wcd938x->hphl_pdm_wd_int = regmap_irq_get_virq(wcd938x->irq_chip, ··· 4335 4342 } 4336 4343 wcd938x->sdw_priv[AIF1_PB] = dev_get_drvdata(wcd938x->rxdev); 4337 4344 wcd938x->sdw_priv[AIF1_PB]->wcd938x = wcd938x; 4338 - wcd938x->sdw_priv[AIF1_PB]->slave_irq = wcd938x->virq; 4339 4345 4340 4346 wcd938x->txdev = wcd938x_sdw_device_get(wcd938x->txnode); 4341 4347 if (!wcd938x->txdev) { ··· 4343 4351 } 4344 4352 wcd938x->sdw_priv[AIF1_CAP] = dev_get_drvdata(wcd938x->txdev); 4345 4353 wcd938x->sdw_priv[AIF1_CAP]->wcd938x = wcd938x; 4346 - wcd938x->sdw_priv[AIF1_CAP]->slave_irq = wcd938x->virq; 4347 4354 wcd938x->tx_sdw_dev = dev_to_sdw_dev(wcd938x->txdev); 4348 4355 if (!wcd938x->tx_sdw_dev) { 4349 4356 dev_err(dev, "could not get txslave with matching of dev\n"); ··· 4374 4383 dev_err(dev, "%s: tx csr regmap not found\n", __func__); 4375 4384 return PTR_ERR(wcd938x->regmap); 4376 4385 } 4386 + 4387 + ret = wcd938x_irq_init(wcd938x, dev); 4388 + if (ret) { 4389 + dev_err(dev, "%s: IRQ init failed: %d\n", __func__, ret); 4390 + return ret; 4391 + } 4392 + 4393 + wcd938x->sdw_priv[AIF1_PB]->slave_irq = wcd938x->virq; 4394 + wcd938x->sdw_priv[AIF1_CAP]->slave_irq = wcd938x->virq; 4377 4395 4378 4396 ret = wcd938x_set_micbias_data(wcd938x); 4379 4397 if (ret < 0) {
-1
sound/soc/codecs/wm_adsp.c
··· 747 747 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp) 748 748 { 749 749 wm_adsp_debugfs_clear(dsp); 750 - debugfs_remove_recursive(dsp->debugfs_root); 751 750 } 752 751 #else 753 752 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
+1 -2
sound/soc/intel/atom/sst-mfld-platform-pcm.c
··· 127 127 snd_pcm_uframes_t period_size; 128 128 ssize_t periodbytes; 129 129 ssize_t buffer_bytes = snd_pcm_lib_buffer_bytes(substream); 130 - u32 buffer_addr = virt_to_phys(substream->dma_buffer.area); 130 + u32 buffer_addr = substream->runtime->dma_addr; 131 131 132 132 channels = substream->runtime->channels; 133 133 period_size = substream->runtime->period_size; ··· 233 233 /* set codec params and inform SST driver the same */ 234 234 sst_fill_pcm_params(substream, &param); 235 235 sst_fill_alloc_params(substream, &alloc_params); 236 - substream->runtime->dma_area = substream->dma_buffer.area; 237 236 str_params.sparams = param; 238 237 str_params.aparams = alloc_params; 239 238 str_params.codec = SST_CODEC_TYPE_PCM;
+1 -1
sound/soc/intel/boards/sof_da7219_max98373.c
··· 404 404 return -ENOMEM; 405 405 406 406 /* By default dais[0] is configured for max98373 */ 407 - if (!strcmp(pdev->name, "sof_da7219_max98360a")) { 407 + if (!strcmp(pdev->name, "sof_da7219_mx98360a")) { 408 408 dais[0] = (struct snd_soc_dai_link) { 409 409 .name = "SSP1-Codec", 410 410 .id = 0,
+18 -8
sound/soc/kirkwood/kirkwood-dma.c
··· 104 104 int err; 105 105 struct snd_pcm_runtime *runtime = substream->runtime; 106 106 struct kirkwood_dma_data *priv = kirkwood_priv(substream); 107 - const struct mbus_dram_target_info *dram; 108 - unsigned long addr; 109 107 110 108 snd_soc_set_runtime_hwparams(substream, &kirkwood_dma_snd_hw); 111 109 ··· 140 142 writel((unsigned int)-1, priv->io + KIRKWOOD_ERR_MASK); 141 143 } 142 144 143 - dram = mv_mbus_dram_info(); 144 - addr = substream->dma_buffer.addr; 145 145 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 146 146 if (priv->substream_play) 147 147 return -EBUSY; 148 148 priv->substream_play = substream; 149 - kirkwood_dma_conf_mbus_windows(priv->io, 150 - KIRKWOOD_PLAYBACK_WIN, addr, dram); 151 149 } else { 152 150 if (priv->substream_rec) 153 151 return -EBUSY; 154 152 priv->substream_rec = substream; 155 - kirkwood_dma_conf_mbus_windows(priv->io, 156 - KIRKWOOD_RECORD_WIN, addr, dram); 157 153 } 158 154 159 155 return 0; ··· 171 179 free_irq(priv->irq, priv); 172 180 } 173 181 182 + return 0; 183 + } 184 + 185 + static int kirkwood_dma_hw_params(struct snd_soc_component *component, 186 + struct snd_pcm_substream *substream, 187 + struct snd_pcm_hw_params *params) 188 + { 189 + struct kirkwood_dma_data *priv = kirkwood_priv(substream); 190 + const struct mbus_dram_target_info *dram = mv_mbus_dram_info(); 191 + unsigned long addr = substream->runtime->dma_addr; 192 + 193 + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 194 + kirkwood_dma_conf_mbus_windows(priv->io, 195 + KIRKWOOD_PLAYBACK_WIN, addr, dram); 196 + else 197 + kirkwood_dma_conf_mbus_windows(priv->io, 198 + KIRKWOOD_RECORD_WIN, addr, dram); 174 199 return 0; 175 200 } 176 201 ··· 255 246 .name = DRV_NAME, 256 247 .open = kirkwood_dma_open, 257 248 .close = kirkwood_dma_close, 249 + .hw_params = kirkwood_dma_hw_params, 258 250 .prepare = kirkwood_dma_prepare, 259 251 .pointer = kirkwood_dma_pointer, 260 252 .pcm_construct = kirkwood_dma_new,
+27 -36
sound/soc/soc-component.c
··· 148 148 return soc_component_ret(component, ret); 149 149 } 150 150 151 - static int soc_component_pin(struct snd_soc_component *component, 152 - const char *pin, 153 - int (*pin_func)(struct snd_soc_dapm_context *dapm, 154 - const char *pin)) 155 - { 156 - struct snd_soc_dapm_context *dapm = 157 - snd_soc_component_get_dapm(component); 158 - char *full_name; 159 - int ret; 160 - 161 - if (!component->name_prefix) { 162 - ret = pin_func(dapm, pin); 163 - goto end; 164 - } 165 - 166 - full_name = kasprintf(GFP_KERNEL, "%s %s", component->name_prefix, pin); 167 - if (!full_name) { 168 - ret = -ENOMEM; 169 - goto end; 170 - } 171 - 172 - ret = pin_func(dapm, full_name); 173 - kfree(full_name); 174 - end: 175 - return soc_component_ret(component, ret); 176 - } 177 - 178 151 int snd_soc_component_enable_pin(struct snd_soc_component *component, 179 152 const char *pin) 180 153 { 181 - return soc_component_pin(component, pin, snd_soc_dapm_enable_pin); 154 + struct snd_soc_dapm_context *dapm = 155 + snd_soc_component_get_dapm(component); 156 + return snd_soc_dapm_enable_pin(dapm, pin); 182 157 } 183 158 EXPORT_SYMBOL_GPL(snd_soc_component_enable_pin); 184 159 185 160 int snd_soc_component_enable_pin_unlocked(struct snd_soc_component *component, 186 161 const char *pin) 187 162 { 188 - return soc_component_pin(component, pin, snd_soc_dapm_enable_pin_unlocked); 163 + struct snd_soc_dapm_context *dapm = 164 + snd_soc_component_get_dapm(component); 165 + return snd_soc_dapm_enable_pin_unlocked(dapm, pin); 189 166 } 190 167 EXPORT_SYMBOL_GPL(snd_soc_component_enable_pin_unlocked); 191 168 192 169 int snd_soc_component_disable_pin(struct snd_soc_component *component, 193 170 const char *pin) 194 171 { 195 - return soc_component_pin(component, pin, snd_soc_dapm_disable_pin); 172 + struct snd_soc_dapm_context *dapm = 173 + snd_soc_component_get_dapm(component); 174 + return snd_soc_dapm_disable_pin(dapm, pin); 196 175 } 197 176 EXPORT_SYMBOL_GPL(snd_soc_component_disable_pin); 198 177 199 178 int snd_soc_component_disable_pin_unlocked(struct snd_soc_component *component, 200 179 const char *pin) 201 180 { 202 - return soc_component_pin(component, pin, snd_soc_dapm_disable_pin_unlocked); 181 + struct snd_soc_dapm_context *dapm = 182 + snd_soc_component_get_dapm(component); 183 + return snd_soc_dapm_disable_pin_unlocked(dapm, pin); 203 184 } 204 185 EXPORT_SYMBOL_GPL(snd_soc_component_disable_pin_unlocked); 205 186 206 187 int snd_soc_component_nc_pin(struct snd_soc_component *component, 207 188 const char *pin) 208 189 { 209 - return soc_component_pin(component, pin, snd_soc_dapm_nc_pin); 190 + struct snd_soc_dapm_context *dapm = 191 + snd_soc_component_get_dapm(component); 192 + return snd_soc_dapm_nc_pin(dapm, pin); 210 193 } 211 194 EXPORT_SYMBOL_GPL(snd_soc_component_nc_pin); 212 195 213 196 int snd_soc_component_nc_pin_unlocked(struct snd_soc_component *component, 214 197 const char *pin) 215 198 { 216 - return soc_component_pin(component, pin, snd_soc_dapm_nc_pin_unlocked); 199 + struct snd_soc_dapm_context *dapm = 200 + snd_soc_component_get_dapm(component); 201 + return snd_soc_dapm_nc_pin_unlocked(dapm, pin); 217 202 } 218 203 EXPORT_SYMBOL_GPL(snd_soc_component_nc_pin_unlocked); 219 204 220 205 int snd_soc_component_get_pin_status(struct snd_soc_component *component, 221 206 const char *pin) 222 207 { 223 - return soc_component_pin(component, pin, snd_soc_dapm_get_pin_status); 208 + struct snd_soc_dapm_context *dapm = 209 + snd_soc_component_get_dapm(component); 210 + return snd_soc_dapm_get_pin_status(dapm, pin); 224 211 } 225 212 EXPORT_SYMBOL_GPL(snd_soc_component_get_pin_status); 226 213 227 214 int snd_soc_component_force_enable_pin(struct snd_soc_component *component, 228 215 const char *pin) 229 216 { 230 - return soc_component_pin(component, pin, snd_soc_dapm_force_enable_pin); 217 + struct snd_soc_dapm_context *dapm = 218 + snd_soc_component_get_dapm(component); 219 + return snd_soc_dapm_force_enable_pin(dapm, pin); 231 220 } 232 221 EXPORT_SYMBOL_GPL(snd_soc_component_force_enable_pin); 233 222 ··· 224 235 struct snd_soc_component *component, 225 236 const char *pin) 226 237 { 227 - return soc_component_pin(component, pin, snd_soc_dapm_force_enable_pin_unlocked); 238 + struct snd_soc_dapm_context *dapm = 239 + snd_soc_component_get_dapm(component); 240 + return snd_soc_dapm_force_enable_pin_unlocked(dapm, pin); 228 241 } 229 242 EXPORT_SYMBOL_GPL(snd_soc_component_force_enable_pin_unlocked); 230 243
+16 -6
sound/soc/soc-pcm.c
··· 1014 1014 1015 1015 static int soc_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 1016 1016 { 1017 + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 1017 1018 int ret = -EINVAL, _ret = 0; 1018 1019 int rollback = 0; 1019 1020 ··· 1055 1054 case SNDRV_PCM_TRIGGER_STOP: 1056 1055 case SNDRV_PCM_TRIGGER_SUSPEND: 1057 1056 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 1058 - ret = snd_soc_pcm_dai_trigger(substream, cmd, rollback); 1059 - if (ret < 0) 1060 - break; 1057 + if (rtd->dai_link->stop_dma_first) { 1058 + ret = snd_soc_pcm_component_trigger(substream, cmd, rollback); 1059 + if (ret < 0) 1060 + break; 1061 1061 1062 - ret = snd_soc_pcm_component_trigger(substream, cmd, rollback); 1063 - if (ret < 0) 1064 - break; 1062 + ret = snd_soc_pcm_dai_trigger(substream, cmd, rollback); 1063 + if (ret < 0) 1064 + break; 1065 + } else { 1066 + ret = snd_soc_pcm_dai_trigger(substream, cmd, rollback); 1067 + if (ret < 0) 1068 + break; 1065 1069 1070 + ret = snd_soc_pcm_component_trigger(substream, cmd, rollback); 1071 + if (ret < 0) 1072 + break; 1073 + } 1066 1074 ret = snd_soc_link_trigger(substream, cmd, rollback); 1067 1075 break; 1068 1076 }
+2 -2
sound/soc/sof/intel/Kconfig
··· 278 278 279 279 config SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE 280 280 tristate 281 + select SOUNDWIRE_INTEL if SND_SOC_SOF_INTEL_SOUNDWIRE 282 + select SND_INTEL_SOUNDWIRE_ACPI if SND_SOC_SOF_INTEL_SOUNDWIRE 281 283 282 284 config SND_SOC_SOF_INTEL_SOUNDWIRE 283 285 tristate "SOF support for SoundWire" ··· 287 285 depends on SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE 288 286 depends on ACPI && SOUNDWIRE 289 287 depends on !(SOUNDWIRE=m && SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE=y) 290 - select SOUNDWIRE_INTEL 291 - select SND_INTEL_SOUNDWIRE_ACPI 292 288 help 293 289 This adds support for SoundWire with Sound Open Firmware 294 290 for Intel(R) platforms.
+2 -2
sound/soc/sof/intel/hda-ipc.c
··· 107 107 } else { 108 108 /* reply correct size ? */ 109 109 if (reply.hdr.size != msg->reply_size && 110 - /* getter payload is never known upfront */ 111 - !(reply.hdr.cmd & SOF_IPC_GLB_PROBE)) { 110 + /* getter payload is never known upfront */ 111 + ((reply.hdr.cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_PROBE)) { 112 112 dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n", 113 113 msg->reply_size, reply.hdr.size); 114 114 ret = -EINVAL;
+12
sound/soc/sof/intel/hda.c
··· 200 200 int hda_sdw_startup(struct snd_sof_dev *sdev) 201 201 { 202 202 struct sof_intel_hda_dev *hdev; 203 + struct snd_sof_pdata *pdata = sdev->pdata; 203 204 204 205 hdev = sdev->pdata->hw_pdata; 205 206 206 207 if (!hdev->sdw) 208 + return 0; 209 + 210 + if (pdata->machine && !pdata->machine->mach_params.link_mask) 207 211 return 0; 208 212 209 213 return sdw_intel_startup(hdev->sdw); ··· 1019 1015 hda_mach->mach_params.dmic_num = dmic_num; 1020 1016 pdata->machine = hda_mach; 1021 1017 pdata->tplg_filename = tplg_filename; 1018 + 1019 + if (codec_num == 2) { 1020 + /* 1021 + * Prevent SoundWire links from starting when an external 1022 + * HDaudio codec is used 1023 + */ 1024 + hda_mach->mach_params.link_mask = 0; 1025 + } 1022 1026 } 1023 1027 } 1024 1028
+1
sound/soc/sof/intel/pci-tgl.c
··· 89 89 static const struct sof_dev_desc adl_desc = { 90 90 .machines = snd_soc_acpi_intel_adl_machines, 91 91 .alt_machines = snd_soc_acpi_intel_adl_sdw_machines, 92 + .use_acpi_target_states = true, 92 93 .resindex_lpe_base = 0, 93 94 .resindex_pcicfg_base = -1, 94 95 .resindex_imr_base = -1,
+18 -12
sound/soc/tegra/tegra_pcm.c
··· 213 213 } 214 214 EXPORT_SYMBOL_GPL(tegra_pcm_pointer); 215 215 216 - static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream, 216 + static int tegra_pcm_preallocate_dma_buffer(struct device *dev, struct snd_pcm *pcm, int stream, 217 217 size_t size) 218 218 { 219 219 struct snd_pcm_substream *substream = pcm->streams[stream].substream; 220 220 struct snd_dma_buffer *buf = &substream->dma_buffer; 221 221 222 - buf->area = dma_alloc_wc(pcm->card->dev, size, &buf->addr, GFP_KERNEL); 222 + buf->area = dma_alloc_wc(dev, size, &buf->addr, GFP_KERNEL); 223 223 if (!buf->area) 224 224 return -ENOMEM; 225 225 226 226 buf->private_data = NULL; 227 227 buf->dev.type = SNDRV_DMA_TYPE_DEV; 228 - buf->dev.dev = pcm->card->dev; 228 + buf->dev.dev = dev; 229 229 buf->bytes = size; 230 230 231 231 return 0; ··· 244 244 if (!buf->area) 245 245 return; 246 246 247 - dma_free_wc(pcm->card->dev, buf->bytes, buf->area, buf->addr); 247 + dma_free_wc(buf->dev.dev, buf->bytes, buf->area, buf->addr); 248 248 buf->area = NULL; 249 249 } 250 250 251 - static int tegra_pcm_dma_allocate(struct snd_soc_pcm_runtime *rtd, 251 + static int tegra_pcm_dma_allocate(struct device *dev, struct snd_soc_pcm_runtime *rtd, 252 252 size_t size) 253 253 { 254 - struct snd_card *card = rtd->card->snd_card; 255 254 struct snd_pcm *pcm = rtd->pcm; 256 255 int ret; 257 256 258 - ret = dma_set_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); 257 + ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); 259 258 if (ret < 0) 260 259 return ret; 261 260 262 261 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { 263 - ret = tegra_pcm_preallocate_dma_buffer(pcm, 264 - SNDRV_PCM_STREAM_PLAYBACK, size); 262 + ret = tegra_pcm_preallocate_dma_buffer(dev, pcm, SNDRV_PCM_STREAM_PLAYBACK, size); 265 263 if (ret) 266 264 goto err; 267 265 } 268 266 269 267 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { 270 - ret = tegra_pcm_preallocate_dma_buffer(pcm, 271 - SNDRV_PCM_STREAM_CAPTURE, size); 268 + ret = tegra_pcm_preallocate_dma_buffer(dev, pcm, SNDRV_PCM_STREAM_CAPTURE, size); 272 269 if (ret) 273 270 goto err_free_play; 274 271 } ··· 281 284 int tegra_pcm_construct(struct snd_soc_component *component, 282 285 struct snd_soc_pcm_runtime *rtd) 283 286 { 284 - return tegra_pcm_dma_allocate(rtd, tegra_pcm_hardware.buffer_bytes_max); 287 + struct device *dev = component->dev; 288 + 289 + /* 290 + * Fallback for backwards-compatibility with older device trees that 291 + * have the iommus property in the virtual, top-level "sound" node. 292 + */ 293 + if (!of_get_property(dev->of_node, "iommus", NULL)) 294 + dev = rtd->card->snd_card->dev; 295 + 296 + return tegra_pcm_dma_allocate(dev, rtd, tegra_pcm_hardware.buffer_bytes_max); 285 297 } 286 298 EXPORT_SYMBOL_GPL(tegra_pcm_construct); 287 299
+12 -6
sound/soc/ti/j721e-evm.c
··· 200 200 return ret; 201 201 } 202 202 203 - if (priv->hsdiv_rates[domain->parent_clk_id] != scki) { 203 + if (domain->parent_clk_id == -1 || priv->hsdiv_rates[domain->parent_clk_id] != scki) { 204 204 dev_dbg(priv->dev, 205 205 "domain%u configuration for %u Hz: %s, %dxFS (SCKI: %u Hz)\n", 206 206 audio_domain, rate, ··· 281 281 j721e_rule_rate, &priv->rate_range, 282 282 SNDRV_PCM_HW_PARAM_RATE, -1); 283 283 284 - mutex_unlock(&priv->mutex); 285 284 286 285 if (ret) 287 - return ret; 286 + goto out; 288 287 289 288 /* Reset TDM slots to 32 */ 290 289 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0x3, 0x3, 2, 32); 291 290 if (ret && ret != -ENOTSUPP) 292 - return ret; 291 + goto out; 293 292 294 293 for_each_rtd_codec_dais(rtd, i, codec_dai) { 295 294 ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x3, 0x3, 2, 32); 296 295 if (ret && ret != -ENOTSUPP) 297 - return ret; 296 + goto out; 298 297 } 299 298 300 - return 0; 299 + if (ret == -ENOTSUPP) 300 + ret = 0; 301 + out: 302 + if (ret) 303 + domain->active--; 304 + mutex_unlock(&priv->mutex); 305 + 306 + return ret; 301 307 } 302 308 303 309 static int j721e_audio_hw_params(struct snd_pcm_substream *substream,
+1 -1
sound/soc/uniphier/aio-dma.c
··· 198 198 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 199 199 200 200 return remap_pfn_range(vma, vma->vm_start, 201 - substream->dma_buffer.addr >> PAGE_SHIFT, 201 + substream->runtime->dma_addr >> PAGE_SHIFT, 202 202 vma->vm_end - vma->vm_start, vma->vm_page_prot); 203 203 } 204 204
+2 -2
sound/soc/xilinx/xlnx_formatter_pcm.c
··· 452 452 453 453 stream_data->buffer_size = size; 454 454 455 - low = lower_32_bits(substream->dma_buffer.addr); 456 - high = upper_32_bits(substream->dma_buffer.addr); 455 + low = lower_32_bits(runtime->dma_addr); 456 + high = upper_32_bits(runtime->dma_addr); 457 457 writel(low, stream_data->mmio + XLNX_AUD_BUFF_ADDR_LSB); 458 458 writel(high, stream_data->mmio + XLNX_AUD_BUFF_ADDR_MSB); 459 459