Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

USB: ohci whitespace/comment fixups

This is an OHCI cleanup patch ... it removes a lot of erroneous whitespace
(space before tab, at end of line) as well as the obsolete inline changelog.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

authored by

David Brownell and committed by
Greg Kroah-Hartman
dd9048af 23d8c90e

+169 -226
+1 -1
drivers/usb/host/ohci-at91.c
··· 221 221 */ 222 222 .start = ohci_at91_start, 223 223 .stop = ohci_stop, 224 - .shutdown = ohci_shutdown, 224 + .shutdown = ohci_shutdown, 225 225 226 226 /* 227 227 * managing i/o requests and associated device resources
+2 -2
drivers/usb/host/ohci-au1xxx.c
··· 269 269 */ 270 270 .start = ohci_au1xxx_start, 271 271 .stop = ohci_stop, 272 - .shutdown = ohci_shutdown, 272 + .shutdown = ohci_shutdown, 273 273 274 274 /* 275 275 * managing i/o requests and associated device resources ··· 336 336 static struct platform_driver ohci_hcd_au1xxx_driver = { 337 337 .probe = ohci_hcd_au1xxx_drv_probe, 338 338 .remove = ohci_hcd_au1xxx_drv_remove, 339 - .shutdown = usb_hcd_platform_shutdown, 339 + .shutdown = usb_hcd_platform_shutdown, 340 340 /*.suspend = ohci_hcd_au1xxx_drv_suspend, */ 341 341 /*.resume = ohci_hcd_au1xxx_drv_resume, */ 342 342 .driver = {
+4 -4
drivers/usb/host/ohci-dbg.c
··· 16 16 case PIPE_CONTROL: temp = "ctrl"; break; \ 17 17 case PIPE_BULK: temp = "bulk"; break; \ 18 18 case PIPE_INTERRUPT: temp = "intr"; break; \ 19 - default: temp = "isoc"; break; \ 19 + default: temp = "isoc"; break; \ 20 20 }; temp;}) 21 21 #define pipestring(pipe) edstring(usb_pipetype(pipe)) 22 22 ··· 205 205 (temp & RH_PS_PSSC) ? " PSSC" : "", \ 206 206 (temp & RH_PS_PESC) ? " PESC" : "", \ 207 207 (temp & RH_PS_CSC) ? " CSC" : "", \ 208 - \ 208 + \ 209 209 (temp & RH_PS_LSDA) ? " LSDA" : "", \ 210 210 (temp & RH_PS_PPS) ? " PPS" : "", \ 211 211 (temp & RH_PS_PRS) ? " PRS" : "", \ 212 212 (temp & RH_PS_POCI) ? " POCI" : "", \ 213 213 (temp & RH_PS_PSS) ? " PSS" : "", \ 214 - \ 214 + \ 215 215 (temp & RH_PS_PES) ? " PES" : "", \ 216 216 (temp & RH_PS_CCS) ? " CCS" : "" \ 217 217 ); ··· 563 563 (info & ED_SKIP) ? " K" : "", 564 564 (ed->hwHeadP & 565 565 cpu_to_hc32(ohci, ED_H)) ? 566 - " H" : ""); 566 + " H" : ""); 567 567 size -= temp; 568 568 next += temp; 569 569
+1 -1
drivers/usb/host/ohci-ep93xx.c
··· 204 204 static struct platform_driver ohci_hcd_ep93xx_driver = { 205 205 .probe = ohci_hcd_ep93xx_drv_probe, 206 206 .remove = ohci_hcd_ep93xx_drv_remove, 207 - .shutdown = usb_hcd_platform_shutdown, 207 + .shutdown = usb_hcd_platform_shutdown, 208 208 #ifdef CONFIG_PM 209 209 .suspend = ohci_hcd_ep93xx_drv_suspend, 210 210 .resume = ohci_hcd_ep93xx_drv_resume,
+25 -81
drivers/usb/host/ohci-hcd.c
··· 3 3 * 4 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net> 6 - * 6 + * 7 7 * [ Initialisation is based on Linus' ] 8 8 * [ uhci code and gregs ohci fragments ] 9 9 * [ (C) Copyright 1999 Linus Torvalds ] 10 10 * [ (C) Copyright 1999 Gregory P. Smith] 11 - * 12 - * 11 + * 12 + * 13 13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller 14 14 * interfaces (though some non-x86 Intel chips use it). It supports 15 15 * smarter hardware than UHCI. A download link for the spec available 16 16 * through the http://www.usb.org website. 17 17 * 18 - * History: 19 - * 20 - * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer) 21 - * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net) 22 - * 2003/02/24 show registers in sysfs (Kevin Brosius) 23 - * 24 - * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and 25 - * bandwidth accounting; if debugging, show schedules in driverfs 26 - * 2002/07/19 fixes to management of ED and schedule state. 27 - * 2002/06/09 SA-1111 support (Christopher Hoover) 28 - * 2002/06/01 remember frame when HC won't see EDs any more; use that info 29 - * to fix urb unlink races caused by interrupt latency assumptions; 30 - * minor ED field and function naming updates 31 - * 2002/01/18 package as a patch for 2.5.3; this should match the 32 - * 2.4.17 kernel modulo some bugs being fixed. 33 - * 34 - * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes 35 - * from post-2.4.5 patches. 36 - * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning 37 - * 2001/09/07 match PCI PM changes, errnos from Linus' tree 38 - * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify; 39 - * pbook pci quirks gone (please fix pbook pci sw!) (db) 40 - * 41 - * 2001/04/08 Identify version on module load (gb) 42 - * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam); 43 - pci_map_single (db) 44 - * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db) 45 - * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam) 46 - * 47 - * 2000/09/26 fixed races in removing the private portion of the urb 48 - * 2000/09/07 disable bulk and control lists when unlinking the last 49 - * endpoint descriptor in order to avoid unrecoverable errors on 50 - * the Lucent chips. (rwc@sgi) 51 - * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some 52 - * urb unlink probs, indentation fixes 53 - * 2000/08/11 various oops fixes mostly affecting iso and cleanup from 54 - * device unplugs. 55 - * 2000/06/28 use PCI hotplug framework, for better power management 56 - * and for Cardbus support (David Brownell) 57 - * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling 58 - * when the controller loses power; handle UE; cleanup; ... 59 - * 60 - * v5.2 1999/12/07 URB 3rd preview, 61 - * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi) 62 - * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume 63 - * i386: HUB, Keyboard, Mouse, Printer 64 - * 65 - * v4.3 1999/10/27 multiple HCs, bulk_request 66 - * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes 67 - * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl. 68 - * v4.0 1999/08/18 69 - * v3.0 1999/06/25 70 - * v2.1 1999/05/09 code clean up 71 - * v2.0 1999/05/04 72 - * v1.0 1999/04/27 initial release 73 - * 74 18 * This file is licenced under the GPL. 75 19 */ 76 - 20 + 77 21 #include <linux/module.h> 78 22 #include <linux/moduleparam.h> 79 23 #include <linux/pci.h> ··· 33 89 #include <linux/list.h> 34 90 #include <linux/usb.h> 35 91 #include <linux/usb/otg.h> 36 - #include <linux/dma-mapping.h> 92 + #include <linux/dma-mapping.h> 37 93 #include <linux/dmapool.h> 38 94 #include <linux/reboot.h> 39 95 ··· 127 183 int i, size = 0; 128 184 unsigned long flags; 129 185 int retval = 0; 130 - 186 + 131 187 #ifdef OHCI_VERBOSE_DEBUG 132 188 urb_print (urb, "SUB", usb_pipein (pipe)); 133 189 #endif 134 - 190 + 135 191 /* every endpoint has a ed, locate and maybe (re)initialize it */ 136 192 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval))) 137 193 return -ENOMEM; ··· 176 232 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *)); 177 233 INIT_LIST_HEAD (&urb_priv->pending); 178 234 urb_priv->length = size; 179 - urb_priv->ed = ed; 235 + urb_priv->ed = ed; 180 236 181 237 /* allocate the TDs (deferring hash chain updates) */ 182 238 for (i = 0; i < size; i++) { ··· 186 242 urb_free_priv (ohci, urb_priv); 187 243 return -ENOMEM; 188 244 } 189 - } 245 + } 190 246 191 247 spin_lock_irqsave (&ohci->lock, flags); 192 248 ··· 257 313 { 258 314 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 259 315 unsigned long flags; 260 - 316 + 261 317 #ifdef OHCI_VERBOSE_DEBUG 262 318 urb_print (urb, "UNLINK", 1); 263 - #endif 319 + #endif 264 320 265 321 spin_lock_irqsave (&ohci->lock, flags); 266 - if (HC_IS_RUNNING(hcd->state)) { 322 + if (HC_IS_RUNNING(hcd->state)) { 267 323 urb_priv_t *urb_priv; 268 324 269 325 /* Unless an IRQ completed the unlink while it was being ··· 456 512 457 513 /* Start an OHCI controller, set the BUS operational 458 514 * resets USB and controller 459 - * enable interrupts 515 + * enable interrupts 460 516 */ 461 517 static int ohci_run (struct ohci_hcd *ohci) 462 518 { 463 - u32 mask, temp; 519 + u32 mask, temp; 464 520 int first = ohci->fminterval == 0; 465 521 struct usb_hcd *hcd = ohci_to_hcd(ohci); 466 522 ··· 478 534 /* also: power/overcurrent flags in roothub.a */ 479 535 } 480 536 481 - /* Reset USB nearly "by the book". RemoteWakeupConnected was 537 + /* Reset USB nearly "by the book". RemoteWakeupConnected was 482 538 * saved if boot firmware (BIOS/SMM/...) told us it's connected, 483 539 * or if bus glue did the same (e.g. for PCI add-in cards with 484 540 * PCI PM support). ··· 709 765 dl_done_list (ohci); 710 766 spin_unlock (&ohci->lock); 711 767 if (HC_IS_RUNNING(hcd->state)) 712 - ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable); 768 + ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable); 713 769 } 714 - 770 + 715 771 /* could track INTR_SO to reduce available PCI/... bandwidth */ 716 772 717 773 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled ··· 722 778 finish_unlinks (ohci, ohci_frame_no(ohci)); 723 779 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list 724 780 && HC_IS_RUNNING(hcd->state)) 725 - ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable); 781 + ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable); 726 782 spin_unlock (&ohci->lock); 727 783 728 784 if (HC_IS_RUNNING(hcd->state)) { 729 785 ohci_writel (ohci, ints, &regs->intrstatus); 730 - ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable); 786 + ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable); 731 787 // flush those writes 732 788 (void) ohci_readl (ohci, &ohci->regs->control); 733 789 } ··· 738 794 /*-------------------------------------------------------------------------*/ 739 795 740 796 static void ohci_stop (struct usb_hcd *hcd) 741 - { 797 + { 742 798 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 743 799 744 800 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n", ··· 756 812 remove_debug_files (ohci); 757 813 ohci_mem_cleanup (ohci); 758 814 if (ohci->hcca) { 759 - dma_free_coherent (hcd->self.controller, 760 - sizeof *ohci->hcca, 815 + dma_free_coherent (hcd->self.controller, 816 + sizeof *ohci->hcca, 761 817 ohci->hcca, ohci->hcca_dma); 762 818 ohci->hcca = NULL; 763 819 ohci->hcca_dma = 0; ··· 780 836 * recycle any "live" eds/tds (and urbs) right away. 781 837 * later, khubd disconnect processing will recycle the other state, 782 838 * (either as disconnect/reconnect, or maybe someday as a reset). 783 - */ 839 + */ 784 840 spin_lock_irq(&ohci->lock); 785 841 disable (ohci); 786 842 usb_root_hub_lost_power(ohci_to_hcd(ohci)->self.root_hub); ··· 819 875 /* empty the interrupt branches */ 820 876 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0; 821 877 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0; 822 - 878 + 823 879 /* no EDs to remove */ 824 880 ohci->ed_rm_list = NULL; 825 881 826 - /* empty control and bulk lists */ 882 + /* empty control and bulk lists */ 827 883 ohci->ed_controltail = NULL; 828 884 ohci->ed_bulktail = NULL; 829 885
+6 -6
drivers/usb/host/ohci-hub.c
··· 1 1 /* 2 2 * OHCI HCD (Host Controller Driver) for USB. 3 - * 3 + * 4 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net> 6 - * 6 + * 7 7 * This file is licenced under GPL 8 8 */ 9 9 ··· 23 23 (temp & RH_PS_PSSC) ? " PSSC" : "", \ 24 24 (temp & RH_PS_PESC) ? " PESC" : "", \ 25 25 (temp & RH_PS_CSC) ? " CSC" : "", \ 26 - \ 26 + \ 27 27 (temp & RH_PS_LSDA) ? " LSDA" : "", \ 28 28 (temp & RH_PS_PPS) ? " PPS" : "", \ 29 29 (temp & RH_PS_PRS) ? " PRS" : "", \ 30 30 (temp & RH_PS_POCI) ? " POCI" : "", \ 31 31 (temp & RH_PS_PSS) ? " PSS" : "", \ 32 - \ 32 + \ 33 33 (temp & RH_PS_PES) ? " PES" : "", \ 34 34 (temp & RH_PS_CCS) ? " CCS" : "" \ 35 35 ); ··· 484 484 temp = 0; 485 485 if (rh & RH_A_NPS) /* no power switching? */ 486 486 temp |= 0x0002; 487 - if (rh & RH_A_PSM) /* per-port power switching? */ 487 + if (rh & RH_A_PSM) /* per-port power switching? */ 488 488 temp |= 0x0001; 489 489 if (rh & RH_A_NOCP) /* no overcurrent reporting? */ 490 490 temp |= 0x0010; ··· 573 573 if (!(temp & RH_PS_PRS)) 574 574 break; 575 575 udelay (500); 576 - } 576 + } 577 577 578 578 if (!(temp & RH_PS_CCS)) 579 579 break;
+4 -4
drivers/usb/host/ohci-lh7a404.c
··· 38 38 CSC_PWRCNT |= CSC_PWRCNT_USBH_EN; /* Enable clock */ 39 39 udelay(1000); 40 40 USBH_CMDSTATUS = OHCI_HCR; 41 - 41 + 42 42 printk(KERN_DEBUG __FILE__ 43 43 ": Clock to USB host has been enabled \n"); 44 44 } ··· 89 89 retval = -EBUSY; 90 90 goto err1; 91 91 } 92 - 92 + 93 93 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); 94 94 if (!hcd->regs) { 95 95 pr_debug("ioremap failed"); ··· 174 174 */ 175 175 .start = ohci_lh7a404_start, 176 176 .stop = ohci_stop, 177 - .shutdown = ohci_shutdown, 177 + .shutdown = ohci_shutdown, 178 178 179 179 /* 180 180 * managing i/o requests and associated device resources ··· 242 242 static struct platform_driver ohci_hcd_lh7a404_driver = { 243 243 .probe = ohci_hcd_lh7a404_drv_probe, 244 244 .remove = ohci_hcd_lh7a404_drv_remove, 245 - .shutdown = usb_hcd_platform_shutdown, 245 + .shutdown = usb_hcd_platform_shutdown, 246 246 /*.suspend = ohci_hcd_lh7a404_drv_suspend, */ 247 247 /*.resume = ohci_hcd_lh7a404_drv_resume, */ 248 248 .driver = {
+5 -5
drivers/usb/host/ohci-mem.c
··· 1 1 /* 2 2 * OHCI HCD (Host Controller Driver) for USB. 3 - * 3 + * 4 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 - * 6 + * 7 7 * This file is licenced under the GPL. 8 8 */ 9 9 10 10 /*-------------------------------------------------------------------------*/ 11 11 12 12 /* 13 - * There's basically three types of memory: 13 + * OHCI deals with three types of memory: 14 14 * - data used only by the HCD ... kmalloc is fine 15 15 * - async and periodic schedules, shared by HC and HCD ... these 16 16 * need to use dma_pool or dma_alloc_coherent 17 17 * - driver buffers, read/written by HC ... the hcd glue or the 18 18 * device driver provides us with dma addresses 19 19 * 20 - * There's also PCI "register" data, which is memory mapped. 21 - * No memory seen by this driver is pagable. 20 + * There's also "register" data, which is memory mapped. 21 + * No memory seen by this driver (or any HCD) may be paged out. 22 22 */ 23 23 24 24 /*-------------------------------------------------------------------------*/
+2 -2
drivers/usb/host/ohci-omap.c
··· 447 447 .reset = ohci_omap_init, 448 448 .start = ohci_omap_start, 449 449 .stop = ohci_omap_stop, 450 - .shutdown = ohci_shutdown, 450 + .shutdown = ohci_shutdown, 451 451 452 452 /* 453 453 * managing i/o requests and associated device resources ··· 533 533 static struct platform_driver ohci_hcd_omap_driver = { 534 534 .probe = ohci_hcd_omap_drv_probe, 535 535 .remove = ohci_hcd_omap_drv_remove, 536 - .shutdown = usb_hcd_platform_shutdown, 536 + .shutdown = usb_hcd_platform_shutdown, 537 537 #ifdef CONFIG_PM 538 538 .suspend = ohci_omap_suspend, 539 539 .resume = ohci_omap_resume,
+8 -8
drivers/usb/host/ohci-pci.c
··· 3 3 * 4 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 - * 6 + * 7 7 * [ Initialisation is based on Linus' ] 8 8 * [ uhci code and gregs ohci fragments ] 9 9 * [ (C) Copyright 1999 Linus Torvalds ] 10 10 * [ (C) Copyright 1999 Gregory P. Smith] 11 - * 11 + * 12 12 * PCI Bus Glue 13 13 * 14 14 * This file is licenced under the GPL. 15 15 */ 16 - 16 + 17 17 #ifndef CONFIG_PCI 18 18 #error "This file is PCI bus glue. CONFIG_PCI must be defined." 19 19 #endif ··· 83 83 pci_dev_put(b); 84 84 } 85 85 86 - /* Check for Compaq's ZFMicro chipset, which needs short 86 + /* Check for Compaq's ZFMicro chipset, which needs short 87 87 * delays before control or bulk queues get re-activated 88 88 * in finish_unlinks() 89 89 */ ··· 238 238 .shutdown = usb_hcd_pci_shutdown, 239 239 }; 240 240 241 - 242 - static int __init ohci_hcd_pci_init (void) 241 + 242 + static int __init ohci_hcd_pci_init (void) 243 243 { 244 244 printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name); 245 245 if (usb_disabled()) ··· 253 253 254 254 /*-------------------------------------------------------------------------*/ 255 255 256 - static void __exit ohci_hcd_pci_cleanup (void) 257 - { 256 + static void __exit ohci_hcd_pci_cleanup (void) 257 + { 258 258 pci_unregister_driver (&ohci_pci_driver); 259 259 } 260 260 module_exit (ohci_hcd_pci_cleanup);
+2 -2
drivers/usb/host/ohci-pnx4008.c
··· 4 4 * driver for Philips PNX4008 USB Host 5 5 * 6 6 * Authors: Dmitry Chigirev <source@mvista.com> 7 - * Vitaly Wool <vitalywool@gmail.com> 7 + * Vitaly Wool <vitalywool@gmail.com> 8 8 * 9 9 * register initialization is based on code examples provided by Philips 10 10 * Copyright (c) 2005 Koninklijke Philips Electronics N.V. ··· 29 29 #include <asm/arch/irqs.h> 30 30 #include <asm/arch/gpio.h> 31 31 32 - #define USB_CTRL IO_ADDRESS(PNX4008_PWRMAN_BASE + 0x64) 32 + #define USB_CTRL IO_ADDRESS(PNX4008_PWRMAN_BASE + 0x64) 33 33 34 34 /* USB_CTRL bit defines */ 35 35 #define USB_SLAVE_HCLK_EN (1 << 24)
+4 -4
drivers/usb/host/ohci-ppc-soc.c
··· 5 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 6 * (C) Copyright 2002 Hewlett-Packard Company 7 7 * (C) Copyright 2003-2005 MontaVista Software Inc. 8 - * 8 + * 9 9 * Bus Glue for PPC On-Chip OHCI driver 10 10 * Tested on Freescale MPC5200 and IBM STB04xxx 11 11 * ··· 85 85 err2: 86 86 release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 87 87 err1: 88 - usb_put_hcd(hcd); 88 + usb_put_hcd(hcd); 89 89 return retval; 90 90 } 91 91 ··· 148 148 */ 149 149 .start = ohci_ppc_soc_start, 150 150 .stop = ohci_stop, 151 - .shutdown = ohci_shutdown, 151 + .shutdown = ohci_shutdown, 152 152 153 153 /* 154 154 * managing i/o requests and associated device resources ··· 197 197 static struct platform_driver ohci_hcd_ppc_soc_driver = { 198 198 .probe = ohci_hcd_ppc_soc_drv_probe, 199 199 .remove = ohci_hcd_ppc_soc_drv_remove, 200 - .shutdown = usb_hcd_platform_shutdown, 200 + .shutdown = usb_hcd_platform_shutdown, 201 201 #ifdef CONFIG_PM 202 202 /*.suspend = ohci_hcd_ppc_soc_drv_suspend,*/ 203 203 /*.resume = ohci_hcd_ppc_soc_drv_resume,*/
+5 -5
drivers/usb/host/ohci-pxa27x.c
··· 47 47 switch ( mode ) { 48 48 case PMM_NPS_MODE: 49 49 UHCRHDA |= RH_A_NPS; 50 - break; 50 + break; 51 51 case PMM_GLOBAL_MODE: 52 52 UHCRHDA &= ~(RH_A_NPS & RH_A_PSM); 53 53 break; ··· 60 60 break; 61 61 default: 62 62 printk( KERN_ERR 63 - "Invalid mode %d, set to non-power switch mode.\n", 63 + "Invalid mode %d, set to non-power switch mode.\n", 64 64 mode ); 65 65 66 66 UHCRHDA |= RH_A_NPS; ··· 270 270 */ 271 271 .start = ohci_pxa27x_start, 272 272 .stop = ohci_stop, 273 - .shutdown = ohci_shutdown, 273 + .shutdown = ohci_shutdown, 274 274 275 275 /* 276 276 * managing i/o requests and associated device resources ··· 359 359 static struct platform_driver ohci_hcd_pxa27x_driver = { 360 360 .probe = ohci_hcd_pxa27x_drv_probe, 361 361 .remove = ohci_hcd_pxa27x_drv_remove, 362 - .shutdown = usb_hcd_platform_shutdown, 362 + .shutdown = usb_hcd_platform_shutdown, 363 363 #ifdef CONFIG_PM 364 - .suspend = ohci_hcd_pxa27x_drv_suspend, 364 + .suspend = ohci_hcd_pxa27x_drv_suspend, 365 365 .resume = ohci_hcd_pxa27x_drv_resume, 366 366 #endif 367 367 .driver = {
+51 -52
drivers/usb/host/ohci-q.c
··· 1 1 /* 2 2 * OHCI HCD (Host Controller Driver) for USB. 3 - * 3 + * 4 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 - * 6 + * 7 7 * This file is licenced under the GPL. 8 8 */ 9 9 ··· 89 89 90 90 /*-------------------------------------------------------------------------* 91 91 * ED handling functions 92 - *-------------------------------------------------------------------------*/ 92 + *-------------------------------------------------------------------------*/ 93 93 94 94 /* search for the right schedule branch to use for a periodic ed. 95 95 * does some load balancing; returns the branch, or negative errno. ··· 107 107 */ 108 108 for (i = 0; i < interval ; i++) { 109 109 if (branch < 0 || ohci->load [branch] > ohci->load [i]) { 110 - #if 1 /* CONFIG_USB_BANDWIDTH */ 111 110 int j; 112 111 113 112 /* usb 1.1 says 90% of one frame */ ··· 116 117 } 117 118 if (j < NUM_INTS) 118 119 continue; 119 - #endif 120 - branch = i; 120 + branch = i; 121 121 } 122 122 } 123 123 return branch; ··· 169 171 /* link an ed into one of the HC chains */ 170 172 171 173 static int ed_schedule (struct ohci_hcd *ohci, struct ed *ed) 172 - { 174 + { 173 175 int branch; 174 176 175 177 if (ohci_to_hcd(ohci)->state == HC_STATE_QUIESCING) ··· 246 248 } 247 249 ed->branch = branch; 248 250 periodic_link (ohci, ed); 249 - } 251 + } 250 252 251 253 /* the HC may not see the schedule updates yet, but if it does 252 254 * then they'll be properly ordered. ··· 275 277 *prev = ed->ed_next; 276 278 } 277 279 ohci->load [i] -= ed->load; 278 - } 280 + } 279 281 ohci_to_hcd(ohci)->self.bandwidth_allocated -= ed->load / ed->interval; 280 282 281 283 ohci_vdbg (ohci, "unlink %sed %p branch %d [%dus.], interval %d\n", ··· 283 285 ed, ed->branch, ed->load, ed->interval); 284 286 } 285 287 286 - /* unlink an ed from one of the HC chains. 288 + /* unlink an ed from one of the HC chains. 287 289 * just the link to the ed is unlinked. 288 290 * the link from the ed still points to another operational ed or 0 289 291 * so the HC can eventually finish the processing of the unlinked ed ··· 305 307 * When finish_unlinks() runs later, after SOF interrupt, it will often 306 308 * complete one or more URB unlinks before making that state change. 307 309 */ 308 - static void ed_deschedule (struct ohci_hcd *ohci, struct ed *ed) 310 + static void ed_deschedule (struct ohci_hcd *ohci, struct ed *ed) 309 311 { 310 312 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP); 311 313 wmb (); ··· 395 397 unsigned int pipe, 396 398 int interval 397 399 ) { 398 - struct ed *ed; 400 + struct ed *ed; 399 401 unsigned long flags; 400 402 401 403 spin_lock_irqsave (&ohci->lock, flags); ··· 411 413 goto done; 412 414 } 413 415 414 - /* dummy td; end of td list for ed */ 416 + /* dummy td; end of td list for ed */ 415 417 td = td_alloc (ohci, GFP_ATOMIC); 416 - if (!td) { 418 + if (!td) { 417 419 /* out of memory */ 418 420 ed_free (ohci, ed); 419 421 ed = NULL; ··· 460 462 461 463 done: 462 464 spin_unlock_irqrestore (&ohci->lock, flags); 463 - return ed; 465 + return ed; 464 466 } 465 467 466 468 /*-------------------------------------------------------------------------*/ ··· 472 474 * and that ed->state is ED_OPER 473 475 */ 474 476 static void start_ed_unlink (struct ohci_hcd *ohci, struct ed *ed) 475 - { 477 + { 476 478 ed->hwINFO |= cpu_to_hc32 (ohci, ED_DEQUEUE); 477 479 ed_deschedule (ohci, ed); 478 480 ··· 539 541 td->ed = urb_priv->ed; 540 542 td->next_dl_td = NULL; 541 543 td->index = index; 542 - td->urb = urb; 544 + td->urb = urb; 543 545 td->data_dma = data; 544 546 if (!len) 545 547 data = 0; ··· 551 553 (data & 0x0FFF) | 0xE000); 552 554 td->ed->last_iso = info & 0xffff; 553 555 } else { 554 - td->hwCBP = cpu_to_hc32 (ohci, data); 555 - } 556 + td->hwCBP = cpu_to_hc32 (ohci, data); 557 + } 556 558 if (data) 557 559 td->hwBE = cpu_to_hc32 (ohci, data + len - 1); 558 560 else ··· 595 597 * use the device toggle bits for resetting, and rely on the fact 596 598 * that resetting toggle is meaningless if the endpoint is active. 597 599 */ 598 - if (!usb_gettoggle (urb->dev, usb_pipeendpoint (urb->pipe), is_out)) { 600 + if (!usb_gettoggle (urb->dev, usb_pipeendpoint (urb->pipe), is_out)) { 599 601 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), 600 602 is_out, 1); 601 603 urb_priv->ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_C); ··· 719 721 list_del (&td->td_list); 720 722 721 723 /* ISO ... drivers see per-TD length/status */ 722 - if (tdINFO & TD_ISO) { 723 - u16 tdPSW = ohci_hwPSW (ohci, td, 0); 724 + if (tdINFO & TD_ISO) { 725 + u16 tdPSW = ohci_hwPSW (ohci, td, 0); 724 726 int dlen = 0; 725 727 726 728 /* NOTE: assumes FC in tdINFO == 0, and that 727 729 * only the first of 0..MAXPSW psws is used. 728 730 */ 729 731 730 - cc = (tdPSW >> 12) & 0xF; 731 - if (tdINFO & TD_CC) /* hc didn't touch? */ 732 + cc = (tdPSW >> 12) & 0xF; 733 + if (tdINFO & TD_CC) /* hc didn't touch? */ 732 734 return; 733 735 734 736 if (usb_pipeout (urb->pipe)) ··· 756 758 int type = usb_pipetype (urb->pipe); 757 759 u32 tdBE = hc32_to_cpup (ohci, &td->hwBE); 758 760 759 - cc = TD_CC_GET (tdINFO); 761 + cc = TD_CC_GET (tdINFO); 760 762 761 763 /* update packet status if needed (short is normally ok) */ 762 764 if (cc == TD_DATAUNDERRUN ··· 785 787 urb, td, 1 + td->index, cc, 786 788 urb->actual_length, 787 789 urb->transfer_buffer_length); 788 - } 790 + } 789 791 } 790 792 791 793 /*-------------------------------------------------------------------------*/ ··· 793 795 static inline struct td * 794 796 ed_halted (struct ohci_hcd *ohci, struct td *td, int cc, struct td *rev) 795 797 { 796 - struct urb *urb = td->urb; 798 + struct urb *urb = td->urb; 797 799 struct ed *ed = td->ed; 798 800 struct list_head *tmp = td->td_list.next; 799 801 __hc32 toggle = ed->hwHeadP & cpu_to_hc32 (ohci, ED_C); ··· 803 805 */ 804 806 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP); 805 807 wmb (); 806 - ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_H); 808 + ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_H); 807 809 808 810 /* put any later tds from this urb onto the donelist, after 'td', 809 811 * order won't matter here: no errors, and nothing was transferred. ··· 831 833 info &= ~cpu_to_hc32 (ohci, TD_CC); 832 834 next->hwINFO = info; 833 835 834 - next->next_dl_td = rev; 836 + next->next_dl_td = rev; 835 837 rev = next; 836 838 837 839 ed->hwHeadP = next->hwNextTD | toggle; ··· 879 881 /* get TD from hc's singly linked list, and 880 882 * prepend to ours. ed->td_list changes later. 881 883 */ 882 - while (td_dma) { 883 - int cc; 884 + while (td_dma) { 885 + int cc; 884 886 885 887 td = dma_to_td (ohci, td_dma); 886 888 if (!td) { ··· 899 901 && (td->ed->hwHeadP & cpu_to_hc32 (ohci, ED_H))) 900 902 td_rev = ed_halted (ohci, td, cc, td_rev); 901 903 902 - td->next_dl_td = td_rev; 904 + td->next_dl_td = td_rev; 903 905 td_rev = td; 904 906 td_dma = hc32_to_cpup (ohci, &td->hwNextTD); 905 - } 907 + } 906 908 return td_rev; 907 909 } 908 910 ··· 1011 1013 1012 1014 if (modified) 1013 1015 goto rescan_all; 1014 - } 1016 + } 1015 1017 1016 - /* maybe reenable control and bulk lists */ 1018 + /* maybe reenable control and bulk lists */ 1017 1019 if (HC_IS_RUNNING(ohci_to_hcd(ohci)->state) 1018 1020 && ohci_to_hcd(ohci)->state != HC_STATE_QUIESCING 1019 1021 && !ohci->ed_rm_list) { ··· 1039 1041 &ohci->regs->ed_bulkcurrent); 1040 1042 } 1041 1043 } 1042 - 1044 + 1043 1045 /* CLE/BLE to enable, CLF/BLF to (maybe) kickstart */ 1044 1046 if (control) { 1045 1047 ohci->hc_control |= control; 1046 1048 if (ohci->flags & OHCI_QUIRK_ZFMICRO) 1047 1049 mdelay(1); 1048 - ohci_writel (ohci, ohci->hc_control, 1049 - &ohci->regs->control); 1050 - } 1050 + ohci_writel (ohci, ohci->hc_control, 1051 + &ohci->regs->control); 1052 + } 1051 1053 if (command) { 1052 1054 if (ohci->flags & OHCI_QUIRK_ZFMICRO) 1053 1055 mdelay(1); 1054 - ohci_writel (ohci, command, &ohci->regs->cmdstatus); 1055 - } 1056 + ohci_writel (ohci, command, &ohci->regs->cmdstatus); 1057 + } 1056 1058 } 1057 1059 } 1058 1060 ··· 1072 1074 { 1073 1075 struct td *td = dl_reverse_done_list (ohci); 1074 1076 1075 - while (td) { 1077 + while (td) { 1076 1078 struct td *td_next = td->next_dl_td; 1077 1079 struct urb *urb = td->urb; 1078 1080 urb_priv_t *urb_priv = urb->hcpriv; 1079 1081 struct ed *ed = td->ed; 1080 1082 1081 1083 /* update URB's length and status from TD */ 1082 - td_done (ohci, urb, td); 1083 - urb_priv->td_cnt++; 1084 + td_done (ohci, urb, td); 1085 + urb_priv->td_cnt++; 1084 1086 1085 1087 /* If all this urb's TDs are done, call complete() */ 1086 - if (urb_priv->td_cnt == urb_priv->length) 1087 - finish_urb (ohci, urb); 1088 + if (urb_priv->td_cnt == urb_priv->length) 1089 + finish_urb (ohci, urb); 1088 1090 1089 1091 /* clean schedule: unlink EDs that are no longer busy */ 1090 1092 if (list_empty (&ed->td_list)) { ··· 1092 1094 start_ed_unlink (ohci, ed); 1093 1095 1094 1096 /* ... reenabling halted EDs only after fault cleanup */ 1095 - } else if ((ed->hwINFO & cpu_to_hc32 (ohci, ED_SKIP | ED_DEQUEUE)) 1097 + } else if ((ed->hwINFO & cpu_to_hc32 (ohci, 1098 + ED_SKIP | ED_DEQUEUE)) 1096 1099 == cpu_to_hc32 (ohci, ED_SKIP)) { 1097 1100 td = list_entry (ed->td_list.next, struct td, td_list); 1098 - if (!(td->hwINFO & cpu_to_hc32 (ohci, TD_DONE))) { 1101 + if (!(td->hwINFO & cpu_to_hc32 (ohci, TD_DONE))) { 1099 1102 ed->hwINFO &= ~cpu_to_hc32 (ohci, ED_SKIP); 1100 1103 /* ... hc may need waking-up */ 1101 1104 switch (ed->type) { 1102 1105 case PIPE_CONTROL: 1103 1106 ohci_writel (ohci, OHCI_CLF, 1104 - &ohci->regs->cmdstatus); 1107 + &ohci->regs->cmdstatus); 1105 1108 break; 1106 1109 case PIPE_BULK: 1107 1110 ohci_writel (ohci, OHCI_BLF, 1108 - &ohci->regs->cmdstatus); 1111 + &ohci->regs->cmdstatus); 1109 1112 break; 1110 1113 } 1111 1114 } 1112 1115 } 1113 1116 1114 - td = td_next; 1115 - } 1117 + td = td_next; 1118 + } 1116 1119 }
+2 -2
drivers/usb/host/ohci-s3c2410.c
··· 447 447 */ 448 448 .start = ohci_s3c2410_start, 449 449 .stop = ohci_stop, 450 - .shutdown = ohci_shutdown, 450 + .shutdown = ohci_shutdown, 451 451 452 452 /* 453 453 * managing i/o requests and associated device resources ··· 492 492 static struct platform_driver ohci_hcd_s3c2410_driver = { 493 493 .probe = ohci_hcd_s3c2410_drv_probe, 494 494 .remove = ohci_hcd_s3c2410_drv_remove, 495 - .shutdown = usb_hcd_platform_shutdown, 495 + .shutdown = usb_hcd_platform_shutdown, 496 496 /*.suspend = ohci_hcd_s3c2410_drv_suspend, */ 497 497 /*.resume = ohci_hcd_s3c2410_drv_resume, */ 498 498 .driver = {
+4 -4
drivers/usb/host/ohci-sa1111.c
··· 4 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 6 * (C) Copyright 2002 Hewlett-Packard Company 7 - * 7 + * 8 8 * SA1111 Bus Glue 9 9 * 10 10 * Written by Christopher Hoover <ch@hpl.hp.com> ··· 12 12 * 13 13 * This file is licenced under the GPL. 14 14 */ 15 - 15 + 16 16 #include <asm/hardware.h> 17 17 #include <asm/mach-types.h> 18 18 #include <asm/arch/assabet.h> ··· 31 31 { 32 32 unsigned int usb_rst = 0; 33 33 34 - printk(KERN_DEBUG __FILE__ 34 + printk(KERN_DEBUG __FILE__ 35 35 ": starting SA-1111 OHCI USB Controller\n"); 36 36 37 37 #ifdef CONFIG_SA1100_BADGE4 ··· 65 65 static void sa1111_stop_hc(struct sa1111_dev *dev) 66 66 { 67 67 unsigned int usb_rst; 68 - printk(KERN_DEBUG __FILE__ 68 + printk(KERN_DEBUG __FILE__ 69 69 ": stopping SA-1111 OHCI USB Controller\n"); 70 70 71 71 /*
+43 -43
drivers/usb/host/ohci.h
··· 1 1 /* 2 2 * OHCI HCD (Host Controller Driver) for USB. 3 - * 3 + * 4 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 - * 6 + * 7 7 * This file is licenced under the GPL. 8 8 */ 9 9 ··· 14 14 */ 15 15 typedef __u32 __bitwise __hc32; 16 16 typedef __u16 __bitwise __hc16; 17 - 17 + 18 18 /* 19 19 * OHCI Endpoint Descriptor (ED) ... holds TD queue 20 20 * See OHCI spec, section 4.2 ··· 24 24 */ 25 25 struct ed { 26 26 /* first fields are hardware-specified */ 27 - __hc32 hwINFO; /* endpoint config bitmap */ 27 + __hc32 hwINFO; /* endpoint config bitmap */ 28 28 /* info bits defined by hcd */ 29 29 #define ED_DEQUEUE (1 << 27) 30 30 /* info bits defined by the hardware */ ··· 52 52 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ... 53 53 */ 54 54 u8 state; /* ED_{IDLE,UNLINK,OPER} */ 55 - #define ED_IDLE 0x00 /* NOT linked to HC */ 56 - #define ED_UNLINK 0x01 /* being unlinked from hc */ 55 + #define ED_IDLE 0x00 /* NOT linked to HC */ 56 + #define ED_UNLINK 0x01 /* being unlinked from hc */ 57 57 #define ED_OPER 0x02 /* IS linked to hc */ 58 58 59 - u8 type; /* PIPE_{BULK,...} */ 59 + u8 type; /* PIPE_{BULK,...} */ 60 60 61 61 /* periodic scheduling params (for intr and iso) */ 62 62 u8 branch; ··· 70 70 71 71 #define ED_MASK ((u32)~0x0f) /* strip hw status in low addr bits */ 72 72 73 - 73 + 74 74 /* 75 75 * OHCI Transfer Descriptor (TD) ... one per transfer segment 76 76 * See OHCI spec, sections 4.3.1 (general = control/bulk/interrupt) ··· 107 107 108 108 /* (no hwINFO #defines yet for iso tds) */ 109 109 110 - __hc32 hwCBP; /* Current Buffer Pointer (or 0) */ 111 - __hc32 hwNextTD; /* Next TD Pointer */ 112 - __hc32 hwBE; /* Memory Buffer End Pointer */ 110 + __hc32 hwCBP; /* Current Buffer Pointer (or 0) */ 111 + __hc32 hwNextTD; /* Next TD Pointer */ 112 + __hc32 hwBE; /* Memory Buffer End Pointer */ 113 113 114 114 /* PSW is only for ISO. Only 1 PSW entry is used, but on 115 115 * big-endian PPC hardware that's the second entry. 116 116 */ 117 117 #define MAXPSW 2 118 - __hc16 hwPSW [MAXPSW]; 118 + __hc16 hwPSW [MAXPSW]; 119 119 120 120 /* rest are purely for the driver's use */ 121 - __u8 index; 122 - struct ed *ed; 123 - struct td *td_hash; /* dma-->td hashtable */ 124 - struct td *next_dl_td; 125 - struct urb *urb; 121 + __u8 index; 122 + struct ed *ed; 123 + struct td *td_hash; /* dma-->td hashtable */ 124 + struct td *next_dl_td; 125 + struct urb *urb; 126 126 127 127 dma_addr_t td_dma; /* addr of this TD */ 128 128 dma_addr_t data_dma; /* addr of data it points to */ ··· 152 152 #define TD_NOTACCESSED 0x0F 153 153 154 154 155 - /* map OHCI TD status codes (CC) to errno values */ 156 - static const int cc_to_error [16] = { 155 + /* map OHCI TD status codes (CC) to errno values */ 156 + static const int cc_to_error [16] = { 157 157 /* No Error */ 0, 158 158 /* CRC Error */ -EILSEQ, 159 159 /* Bit Stuff */ -EPROTO, ··· 169 169 /* BufferOver */ -ECOMM, 170 170 /* BuffUnder */ -ENOSR, 171 171 /* (for HCD) */ -EALREADY, 172 - /* (for HCD) */ -EALREADY 172 + /* (for HCD) */ -EALREADY 173 173 }; 174 174 175 175 ··· 182 182 #define NUM_INTS 32 183 183 __hc32 int_table [NUM_INTS]; /* periodic schedule */ 184 184 185 - /* 185 + /* 186 186 * OHCI defines u16 frame_no, followed by u16 zero pad. 187 187 * Since some processors can't do 16 bit bus accesses, 188 188 * portable access must be a 32 bits wide. ··· 262 262 * HcCommandStatus (cmdstatus) register masks 263 263 */ 264 264 #define OHCI_HCR (1 << 0) /* host controller reset */ 265 - #define OHCI_CLF (1 << 1) /* control list filled */ 266 - #define OHCI_BLF (1 << 2) /* bulk list filled */ 267 - #define OHCI_OCR (1 << 3) /* ownership change request */ 268 - #define OHCI_SOC (3 << 16) /* scheduling overrun count */ 265 + #define OHCI_CLF (1 << 1) /* control list filled */ 266 + #define OHCI_BLF (1 << 2) /* bulk list filled */ 267 + #define OHCI_OCR (1 << 3) /* ownership change request */ 268 + #define OHCI_SOC (3 << 16) /* scheduling overrun count */ 269 269 270 270 /* 271 271 * masks used with interrupt registers: ··· 285 285 286 286 287 287 /* OHCI ROOT HUB REGISTER MASKS */ 288 - 288 + 289 289 /* roothub.portstatus [i] bits */ 290 - #define RH_PS_CCS 0x00000001 /* current connect status */ 291 - #define RH_PS_PES 0x00000002 /* port enable status*/ 292 - #define RH_PS_PSS 0x00000004 /* port suspend status */ 293 - #define RH_PS_POCI 0x00000008 /* port over current indicator */ 294 - #define RH_PS_PRS 0x00000010 /* port reset status */ 295 - #define RH_PS_PPS 0x00000100 /* port power status */ 296 - #define RH_PS_LSDA 0x00000200 /* low speed device attached */ 297 - #define RH_PS_CSC 0x00010000 /* connect status change */ 298 - #define RH_PS_PESC 0x00020000 /* port enable status change */ 299 - #define RH_PS_PSSC 0x00040000 /* port suspend status change */ 300 - #define RH_PS_OCIC 0x00080000 /* over current indicator change */ 301 - #define RH_PS_PRSC 0x00100000 /* port reset status change */ 290 + #define RH_PS_CCS 0x00000001 /* current connect status */ 291 + #define RH_PS_PES 0x00000002 /* port enable status*/ 292 + #define RH_PS_PSS 0x00000004 /* port suspend status */ 293 + #define RH_PS_POCI 0x00000008 /* port over current indicator */ 294 + #define RH_PS_PRS 0x00000010 /* port reset status */ 295 + #define RH_PS_PPS 0x00000100 /* port power status */ 296 + #define RH_PS_LSDA 0x00000200 /* low speed device attached */ 297 + #define RH_PS_CSC 0x00010000 /* connect status change */ 298 + #define RH_PS_PESC 0x00020000 /* port enable status change */ 299 + #define RH_PS_PSSC 0x00040000 /* port suspend status change */ 300 + #define RH_PS_OCIC 0x00080000 /* over current indicator change */ 301 + #define RH_PS_PRSC 0x00100000 /* port reset status change */ 302 302 303 303 /* roothub.status bits */ 304 304 #define RH_HS_LPS 0x00000001 /* local power status */ ··· 333 333 } urb_priv_t; 334 334 335 335 #define TD_HASH_SIZE 64 /* power'o'two */ 336 - // sizeof (struct td) ~= 64 == 2^6 ... 336 + // sizeof (struct td) ~= 64 == 2^6 ... 337 337 #define TD_HASH_FUNC(td_dma) ((td_dma ^ (td_dma >> 6)) % TD_HASH_SIZE) 338 338 339 339 ··· 364 364 365 365 struct ed *ed_bulktail; /* last in bulk list */ 366 366 struct ed *ed_controltail; /* last in ctrl list */ 367 - struct ed *periodic [NUM_INTS]; /* shadow int_table */ 367 + struct ed *periodic [NUM_INTS]; /* shadow int_table */ 368 368 369 369 /* 370 370 * OTG controllers and transceivers need software interaction; 371 - * other external transceivers should be software-transparent 371 + * other external transceivers should be software-transparent 372 372 */ 373 373 struct otg_transceiver *transceiver; 374 374 ··· 385 385 */ 386 386 int num_ports; 387 387 int load [NUM_INTS]; 388 - u32 hc_control; /* copy of hc control reg */ 388 + u32 hc_control; /* copy of hc control reg */ 389 389 unsigned long next_statechange; /* suspend/resume */ 390 390 u32 fminterval; /* saved register */ 391 391 unsigned autostop:1; /* rh auto stopping/stopped */ ··· 598 598 } 599 599 600 600 #define FI 0x2edf /* 12000 bits per frame (-1) */ 601 - #define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7)) 601 + #define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7)) 602 602 #define FIT (1 << 31) 603 603 #define LSTHRESH 0x628 /* lowspeed bit threshold */ 604 604