pata_sis: Fix and clean up some timing setups

- Rename sis_port_base to sis_old_port_base() so nobody uses it for new
generation controllers in error.
- Use byte size operations where it is cleaner for mode setup
- Fix a couple of masking errors on certai chip revs when setting speeds

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

authored by Alan Cox and committed by Jeff Garzik dd668d15 824cf333

+23 -23
+23 -23
drivers/ata/pata_sis.c
··· 73 73 } 74 74 75 75 /** 76 - * sis_port_base - return PCI configuration base for dev 76 + * sis_old_port_base - return PCI configuration base for dev 77 77 * @adev: device 78 78 * 79 79 * Returns the base of the PCI configuration registers for this port 80 80 * number. 81 81 */ 82 82 83 - static int sis_port_base(struct ata_device *adev) 83 + static int sis_old_port_base(struct ata_device *adev) 84 84 { 85 85 return 0x40 + (4 * adev->ap->port_no) + (2 * adev->devno); 86 86 } ··· 211 211 static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) 212 212 { 213 213 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 214 - int port = sis_port_base(adev); 214 + int port = sis_old_port_base(adev); 215 215 u8 t1, t2; 216 216 int speed = adev->pio_mode - XFER_PIO_0; 217 217 ··· 248 248 static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) 249 249 { 250 250 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 251 - int port = sis_port_base(adev); 251 + int port = sis_old_port_base(adev); 252 252 int speed = adev->pio_mode - XFER_PIO_0; 253 253 254 254 const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; ··· 328 328 { 329 329 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 330 330 int speed = adev->dma_mode - XFER_MW_DMA_0; 331 - int drive_pci = sis_port_base(adev); 331 + int drive_pci = sis_old_port_base(adev); 332 332 u16 timing; 333 333 334 334 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; ··· 367 367 { 368 368 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 369 369 int speed = adev->dma_mode - XFER_MW_DMA_0; 370 - int drive_pci = sis_port_base(adev); 370 + int drive_pci = sis_old_port_base(adev); 371 371 u16 timing; 372 372 373 373 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; ··· 378 378 if (adev->dma_mode < XFER_UDMA_0) { 379 379 /* bits 3-0 hold recovery timing bits 8-10 active timing and 380 380 the higer bits are dependant on the device, bit 15 udma */ 381 - timing &= ~ 0x870F; 381 + timing &= ~0x870F; 382 382 timing |= mwdma_bits[speed]; 383 383 } else { 384 384 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 385 385 speed = adev->dma_mode - XFER_UDMA_0; 386 - timing &= ~0x6000; 386 + timing &= ~0xF000; 387 387 timing |= udma_bits[speed]; 388 388 } 389 389 pci_write_config_word(pdev, drive_pci, timing); ··· 405 405 { 406 406 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 407 407 int speed = adev->dma_mode - XFER_MW_DMA_0; 408 - int drive_pci = sis_port_base(adev); 409 - u16 timing; 408 + int drive_pci = sis_old_port_base(adev); 409 + u8 timing; 410 410 411 - const u16 udma_bits[] = { 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; 411 + const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81}; 412 412 413 - pci_read_config_word(pdev, drive_pci, &timing); 413 + pci_read_config_byte(pdev, drive_pci + 1, &timing); 414 414 415 415 if (adev->dma_mode < XFER_UDMA_0) { 416 416 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 417 417 } else { 418 - /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 418 + /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 419 419 speed = adev->dma_mode - XFER_UDMA_0; 420 - timing &= ~0x0F00; 420 + timing &= ~0x8F; 421 421 timing |= udma_bits[speed]; 422 422 } 423 - pci_write_config_word(pdev, drive_pci, timing); 423 + pci_write_config_byte(pdev, drive_pci + 1, timing); 424 424 } 425 425 426 426 /** ··· 440 440 { 441 441 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 442 442 int speed = adev->dma_mode - XFER_MW_DMA_0; 443 - int drive_pci = sis_port_base(adev); 444 - u16 timing; 443 + int drive_pci = sis_old_port_base(adev); 444 + u8 timing; 445 + /* Low 4 bits are timing */ 446 + static const u8 udma_bits[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81}; 445 447 446 - static const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; 447 - 448 - pci_read_config_word(pdev, drive_pci, &timing); 448 + pci_read_config_byte(pdev, drive_pci + 1, &timing); 449 449 450 450 if (adev->dma_mode < XFER_UDMA_0) { 451 451 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 452 452 } else { 453 - /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 453 + /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 454 454 speed = adev->dma_mode - XFER_UDMA_0; 455 - timing &= ~0x0F00; 455 + timing &= ~0x8F; 456 456 timing |= udma_bits[speed]; 457 457 } 458 - pci_write_config_word(pdev, drive_pci, timing); 458 + pci_write_config_byte(pdev, drive_pci + 1, timing); 459 459 } 460 460 461 461 /**