Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma

Pull rdma fixes from Doug Ledford:
"Second round of -rc fixes for 4.10.

This -rc cycle has been slow for the rdma subsystem. I had already
sent you the first batch before the Holiday break. After that, we kept
only getting a few here or there. Up until this week, when I got a
drop of 13 to one driver (qedr). So, here's the -rc patches I have. I
currently have none held in reserve, so unless something new comes in,
this is it until the next merge window opens.

Summary:

- series of iw_cxgb4 fixes to make it work with the drain cq API

- one or two patches each to: srp, iser, cxgb3, vmw_pvrdma, umem,
rxe, and ipoib

- one big series (13 patches) for the new qedr driver"

* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma: (27 commits)
RDMA/cma: Fix unknown symbol when CONFIG_IPV6 is not enabled
IB/rxe: Prevent from completer to operate on non valid QP
IB/rxe: Fix rxe dev insertion to rxe_dev_list
IB/umem: Release pid in error and ODP flow
RDMA/qedr: Dispatch port active event from qedr_add
RDMA/qedr: Fix and simplify memory leak in PD alloc
RDMA/qedr: Fix RDMA CM loopback
RDMA/qedr: Fix formatting
RDMA/qedr: Mark three functions as static
RDMA/qedr: Don't reset QP when queues aren't flushed
RDMA/qedr: Don't spam dmesg if QP is in error state
RDMA/qedr: Remove CQ spinlock from CM completion handlers
RDMA/qedr: Return max inline data in QP query result
RDMA/qedr: Return success when not changing QP state
RDMA/qedr: Add uapi header qedr-abi.h
RDMA/qedr: Fix MTU returned from QP query
RDMA/core: Add the function ib_mtu_int_to_enum
IB/vmw_pvrdma: Fix incorrect cleanup on pvrdma_pci_probe error path
IB/vmw_pvrdma: Don't leak info from alloc_ucontext
IB/cxgb3: fix misspelling in header guard
...

+269 -189
+2 -1
drivers/infiniband/core/cma.c
··· 2811 2811 if (!src_addr || !src_addr->sa_family) { 2812 2812 src_addr = (struct sockaddr *) &id->route.addr.src_addr; 2813 2813 src_addr->sa_family = dst_addr->sa_family; 2814 - if (dst_addr->sa_family == AF_INET6) { 2814 + if (IS_ENABLED(CONFIG_IPV6) && 2815 + dst_addr->sa_family == AF_INET6) { 2815 2816 struct sockaddr_in6 *src_addr6 = (struct sockaddr_in6 *) src_addr; 2816 2817 struct sockaddr_in6 *dst_addr6 = (struct sockaddr_in6 *) dst_addr; 2817 2818 src_addr6->sin6_scope_id = dst_addr6->sin6_scope_id;
+2
drivers/infiniband/core/umem.c
··· 134 134 IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_MW_BIND)); 135 135 136 136 if (access & IB_ACCESS_ON_DEMAND) { 137 + put_pid(umem->pid); 137 138 ret = ib_umem_odp_get(context, umem); 138 139 if (ret) { 139 140 kfree(umem); ··· 150 149 151 150 page_list = (struct page **) __get_free_page(GFP_KERNEL); 152 151 if (!page_list) { 152 + put_pid(umem->pid); 153 153 kfree(umem); 154 154 return ERR_PTR(-ENOMEM); 155 155 }
+1 -10
drivers/infiniband/hw/cxgb3/iwch_provider.c
··· 1135 1135 1136 1136 memset(props, 0, sizeof(struct ib_port_attr)); 1137 1137 props->max_mtu = IB_MTU_4096; 1138 - if (netdev->mtu >= 4096) 1139 - props->active_mtu = IB_MTU_4096; 1140 - else if (netdev->mtu >= 2048) 1141 - props->active_mtu = IB_MTU_2048; 1142 - else if (netdev->mtu >= 1024) 1143 - props->active_mtu = IB_MTU_1024; 1144 - else if (netdev->mtu >= 512) 1145 - props->active_mtu = IB_MTU_512; 1146 - else 1147 - props->active_mtu = IB_MTU_256; 1138 + props->active_mtu = ib_mtu_int_to_enum(netdev->mtu); 1148 1139 1149 1140 if (!netif_carrier_ok(netdev)) 1150 1141 props->state = IB_PORT_DOWN;
+4 -3
drivers/infiniband/hw/cxgb4/cm.c
··· 1804 1804 skb_trim(skb, dlen); 1805 1805 mutex_lock(&ep->com.mutex); 1806 1806 1807 - /* update RX credits */ 1808 - update_rx_credits(ep, dlen); 1809 - 1810 1807 switch (ep->com.state) { 1811 1808 case MPA_REQ_SENT: 1809 + update_rx_credits(ep, dlen); 1812 1810 ep->rcv_seq += dlen; 1813 1811 disconnect = process_mpa_reply(ep, skb); 1814 1812 break; 1815 1813 case MPA_REQ_WAIT: 1814 + update_rx_credits(ep, dlen); 1816 1815 ep->rcv_seq += dlen; 1817 1816 disconnect = process_mpa_request(ep, skb); 1818 1817 break; 1819 1818 case FPDU_MODE: { 1820 1819 struct c4iw_qp_attributes attrs; 1820 + 1821 + update_rx_credits(ep, dlen); 1821 1822 BUG_ON(!ep->com.qp); 1822 1823 if (status) 1823 1824 pr_err("%s Unexpected streaming data." \
+13 -8
drivers/infiniband/hw/cxgb4/cq.c
··· 505 505 } 506 506 507 507 /* 508 + * Special cqe for drain WR completions... 509 + */ 510 + if (CQE_OPCODE(hw_cqe) == C4IW_DRAIN_OPCODE) { 511 + *cookie = CQE_DRAIN_COOKIE(hw_cqe); 512 + *cqe = *hw_cqe; 513 + goto skip_cqe; 514 + } 515 + 516 + /* 508 517 * Gotta tweak READ completions: 509 518 * 1) the cqe doesn't contain the sq_wptr from the wr. 510 519 * 2) opcode not reflected from the wr. ··· 762 753 c4iw_invalidate_mr(qhp->rhp, 763 754 CQE_WRID_FR_STAG(&cqe)); 764 755 break; 756 + case C4IW_DRAIN_OPCODE: 757 + wc->opcode = IB_WC_SEND; 758 + break; 765 759 default: 766 760 printk(KERN_ERR MOD "Unexpected opcode %d " 767 761 "in the CQE received for QPID=0x%0x\n", ··· 829 817 } 830 818 } 831 819 out: 832 - if (wq) { 833 - if (unlikely(qhp->attr.state != C4IW_QP_STATE_RTS)) { 834 - if (t4_sq_empty(wq)) 835 - complete(&qhp->sq_drained); 836 - if (t4_rq_empty(wq)) 837 - complete(&qhp->rq_drained); 838 - } 820 + if (wq) 839 821 spin_unlock(&qhp->lock); 840 - } 841 822 return ret; 842 823 } 843 824
+9
drivers/infiniband/hw/cxgb4/device.c
··· 846 846 } 847 847 } 848 848 849 + rdev->free_workq = create_singlethread_workqueue("iw_cxgb4_free"); 850 + if (!rdev->free_workq) { 851 + err = -ENOMEM; 852 + goto err_free_status_page; 853 + } 854 + 849 855 rdev->status_page->db_off = 0; 850 856 851 857 return 0; 858 + err_free_status_page: 859 + free_page((unsigned long)rdev->status_page); 852 860 destroy_ocqp_pool: 853 861 c4iw_ocqp_pool_destroy(rdev); 854 862 destroy_rqtpool: ··· 870 862 871 863 static void c4iw_rdev_close(struct c4iw_rdev *rdev) 872 864 { 865 + destroy_workqueue(rdev->free_workq); 873 866 kfree(rdev->wr_log); 874 867 free_page((unsigned long)rdev->status_page); 875 868 c4iw_pblpool_destroy(rdev);
+20 -4
drivers/infiniband/hw/cxgb4/iw_cxgb4.h
··· 45 45 #include <linux/kref.h> 46 46 #include <linux/timer.h> 47 47 #include <linux/io.h> 48 + #include <linux/workqueue.h> 48 49 49 50 #include <asm/byteorder.h> 50 51 ··· 108 107 struct list_head qpids; 109 108 struct list_head cqids; 110 109 struct mutex lock; 110 + struct kref kref; 111 111 }; 112 112 113 113 enum c4iw_rdev_flags { ··· 185 183 atomic_t wr_log_idx; 186 184 struct wr_log_entry *wr_log; 187 185 int wr_log_size; 186 + struct workqueue_struct *free_workq; 188 187 }; 189 188 190 189 static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) ··· 483 480 wait_queue_head_t wait; 484 481 struct timer_list timer; 485 482 int sq_sig_all; 486 - struct completion rq_drained; 487 - struct completion sq_drained; 483 + struct work_struct free_work; 484 + struct c4iw_ucontext *ucontext; 488 485 }; 489 486 490 487 static inline struct c4iw_qp *to_c4iw_qp(struct ib_qp *ibqp) ··· 498 495 u32 key; 499 496 spinlock_t mmap_lock; 500 497 struct list_head mmaps; 498 + struct kref kref; 501 499 }; 502 500 503 501 static inline struct c4iw_ucontext *to_c4iw_ucontext(struct ib_ucontext *c) 504 502 { 505 503 return container_of(c, struct c4iw_ucontext, ibucontext); 504 + } 505 + 506 + void _c4iw_free_ucontext(struct kref *kref); 507 + 508 + static inline void c4iw_put_ucontext(struct c4iw_ucontext *ucontext) 509 + { 510 + kref_put(&ucontext->kref, _c4iw_free_ucontext); 511 + } 512 + 513 + static inline void c4iw_get_ucontext(struct c4iw_ucontext *ucontext) 514 + { 515 + kref_get(&ucontext->kref); 506 516 } 507 517 508 518 struct c4iw_mm_entry { ··· 630 614 } 631 615 return IB_QPS_ERR; 632 616 } 617 + 618 + #define C4IW_DRAIN_OPCODE FW_RI_SGE_EC_CR_RETURN 633 619 634 620 static inline u32 c4iw_ib_to_tpt_access(int a) 635 621 { ··· 1015 997 extern int db_fc_threshold; 1016 998 extern int db_coalescing_threshold; 1017 999 extern int use_dsgl; 1018 - void c4iw_drain_rq(struct ib_qp *qp); 1019 - void c4iw_drain_sq(struct ib_qp *qp); 1020 1000 void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey); 1021 1001 1022 1002 #endif
+17 -16
drivers/infiniband/hw/cxgb4/provider.c
··· 93 93 return -ENOSYS; 94 94 } 95 95 96 - static int c4iw_dealloc_ucontext(struct ib_ucontext *context) 96 + void _c4iw_free_ucontext(struct kref *kref) 97 97 { 98 - struct c4iw_dev *rhp = to_c4iw_dev(context->device); 99 - struct c4iw_ucontext *ucontext = to_c4iw_ucontext(context); 98 + struct c4iw_ucontext *ucontext; 99 + struct c4iw_dev *rhp; 100 100 struct c4iw_mm_entry *mm, *tmp; 101 101 102 - PDBG("%s context %p\n", __func__, context); 102 + ucontext = container_of(kref, struct c4iw_ucontext, kref); 103 + rhp = to_c4iw_dev(ucontext->ibucontext.device); 104 + 105 + PDBG("%s ucontext %p\n", __func__, ucontext); 103 106 list_for_each_entry_safe(mm, tmp, &ucontext->mmaps, entry) 104 107 kfree(mm); 105 108 c4iw_release_dev_ucontext(&rhp->rdev, &ucontext->uctx); 106 109 kfree(ucontext); 110 + } 111 + 112 + static int c4iw_dealloc_ucontext(struct ib_ucontext *context) 113 + { 114 + struct c4iw_ucontext *ucontext = to_c4iw_ucontext(context); 115 + 116 + PDBG("%s context %p\n", __func__, context); 117 + c4iw_put_ucontext(ucontext); 107 118 return 0; 108 119 } 109 120 ··· 138 127 c4iw_init_dev_ucontext(&rhp->rdev, &context->uctx); 139 128 INIT_LIST_HEAD(&context->mmaps); 140 129 spin_lock_init(&context->mmap_lock); 130 + kref_init(&context->kref); 141 131 142 132 if (udata->outlen < sizeof(uresp) - sizeof(uresp.reserved)) { 143 133 if (!warned++) ··· 373 361 374 362 memset(props, 0, sizeof(struct ib_port_attr)); 375 363 props->max_mtu = IB_MTU_4096; 376 - if (netdev->mtu >= 4096) 377 - props->active_mtu = IB_MTU_4096; 378 - else if (netdev->mtu >= 2048) 379 - props->active_mtu = IB_MTU_2048; 380 - else if (netdev->mtu >= 1024) 381 - props->active_mtu = IB_MTU_1024; 382 - else if (netdev->mtu >= 512) 383 - props->active_mtu = IB_MTU_512; 384 - else 385 - props->active_mtu = IB_MTU_256; 364 + props->active_mtu = ib_mtu_int_to_enum(netdev->mtu); 386 365 387 366 if (!netif_carrier_ok(netdev)) 388 367 props->state = IB_PORT_DOWN; ··· 610 607 dev->ibdev.uverbs_abi_ver = C4IW_UVERBS_ABI_VERSION; 611 608 dev->ibdev.get_port_immutable = c4iw_port_immutable; 612 609 dev->ibdev.get_dev_fw_str = get_dev_fw_str; 613 - dev->ibdev.drain_sq = c4iw_drain_sq; 614 - dev->ibdev.drain_rq = c4iw_drain_rq; 615 610 616 611 dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL); 617 612 if (!dev->ibdev.iwcm)
+94 -53
drivers/infiniband/hw/cxgb4/qp.c
··· 715 715 return 0; 716 716 } 717 717 718 - static void _free_qp(struct kref *kref) 718 + static void free_qp_work(struct work_struct *work) 719 + { 720 + struct c4iw_ucontext *ucontext; 721 + struct c4iw_qp *qhp; 722 + struct c4iw_dev *rhp; 723 + 724 + qhp = container_of(work, struct c4iw_qp, free_work); 725 + ucontext = qhp->ucontext; 726 + rhp = qhp->rhp; 727 + 728 + PDBG("%s qhp %p ucontext %p\n", __func__, qhp, ucontext); 729 + destroy_qp(&rhp->rdev, &qhp->wq, 730 + ucontext ? &ucontext->uctx : &rhp->rdev.uctx); 731 + 732 + if (ucontext) 733 + c4iw_put_ucontext(ucontext); 734 + kfree(qhp); 735 + } 736 + 737 + static void queue_qp_free(struct kref *kref) 719 738 { 720 739 struct c4iw_qp *qhp; 721 740 722 741 qhp = container_of(kref, struct c4iw_qp, kref); 723 742 PDBG("%s qhp %p\n", __func__, qhp); 724 - kfree(qhp); 743 + queue_work(qhp->rhp->rdev.free_workq, &qhp->free_work); 725 744 } 726 745 727 746 void c4iw_qp_add_ref(struct ib_qp *qp) ··· 752 733 void c4iw_qp_rem_ref(struct ib_qp *qp) 753 734 { 754 735 PDBG("%s ib_qp %p\n", __func__, qp); 755 - kref_put(&to_c4iw_qp(qp)->kref, _free_qp); 736 + kref_put(&to_c4iw_qp(qp)->kref, queue_qp_free); 756 737 } 757 738 758 739 static void add_to_fc_list(struct list_head *head, struct list_head *entry) ··· 795 776 return 0; 796 777 } 797 778 779 + static void complete_sq_drain_wr(struct c4iw_qp *qhp, struct ib_send_wr *wr) 780 + { 781 + struct t4_cqe cqe = {}; 782 + struct c4iw_cq *schp; 783 + unsigned long flag; 784 + struct t4_cq *cq; 785 + 786 + schp = to_c4iw_cq(qhp->ibqp.send_cq); 787 + cq = &schp->cq; 788 + 789 + cqe.u.drain_cookie = wr->wr_id; 790 + cqe.header = cpu_to_be32(CQE_STATUS_V(T4_ERR_SWFLUSH) | 791 + CQE_OPCODE_V(C4IW_DRAIN_OPCODE) | 792 + CQE_TYPE_V(1) | 793 + CQE_SWCQE_V(1) | 794 + CQE_QPID_V(qhp->wq.sq.qid)); 795 + 796 + spin_lock_irqsave(&schp->lock, flag); 797 + cqe.bits_type_ts = cpu_to_be64(CQE_GENBIT_V((u64)cq->gen)); 798 + cq->sw_queue[cq->sw_pidx] = cqe; 799 + t4_swcq_produce(cq); 800 + spin_unlock_irqrestore(&schp->lock, flag); 801 + 802 + spin_lock_irqsave(&schp->comp_handler_lock, flag); 803 + (*schp->ibcq.comp_handler)(&schp->ibcq, 804 + schp->ibcq.cq_context); 805 + spin_unlock_irqrestore(&schp->comp_handler_lock, flag); 806 + } 807 + 808 + static void complete_rq_drain_wr(struct c4iw_qp *qhp, struct ib_recv_wr *wr) 809 + { 810 + struct t4_cqe cqe = {}; 811 + struct c4iw_cq *rchp; 812 + unsigned long flag; 813 + struct t4_cq *cq; 814 + 815 + rchp = to_c4iw_cq(qhp->ibqp.recv_cq); 816 + cq = &rchp->cq; 817 + 818 + cqe.u.drain_cookie = wr->wr_id; 819 + cqe.header = cpu_to_be32(CQE_STATUS_V(T4_ERR_SWFLUSH) | 820 + CQE_OPCODE_V(C4IW_DRAIN_OPCODE) | 821 + CQE_TYPE_V(0) | 822 + CQE_SWCQE_V(1) | 823 + CQE_QPID_V(qhp->wq.sq.qid)); 824 + 825 + spin_lock_irqsave(&rchp->lock, flag); 826 + cqe.bits_type_ts = cpu_to_be64(CQE_GENBIT_V((u64)cq->gen)); 827 + cq->sw_queue[cq->sw_pidx] = cqe; 828 + t4_swcq_produce(cq); 829 + spin_unlock_irqrestore(&rchp->lock, flag); 830 + 831 + spin_lock_irqsave(&rchp->comp_handler_lock, flag); 832 + (*rchp->ibcq.comp_handler)(&rchp->ibcq, 833 + rchp->ibcq.cq_context); 834 + spin_unlock_irqrestore(&rchp->comp_handler_lock, flag); 835 + } 836 + 798 837 int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 799 838 struct ib_send_wr **bad_wr) 800 839 { ··· 871 794 spin_lock_irqsave(&qhp->lock, flag); 872 795 if (t4_wq_in_error(&qhp->wq)) { 873 796 spin_unlock_irqrestore(&qhp->lock, flag); 874 - *bad_wr = wr; 875 - return -EINVAL; 797 + complete_sq_drain_wr(qhp, wr); 798 + return err; 876 799 } 877 800 num_wrs = t4_sq_avail(&qhp->wq); 878 801 if (num_wrs == 0) { ··· 1014 937 spin_lock_irqsave(&qhp->lock, flag); 1015 938 if (t4_wq_in_error(&qhp->wq)) { 1016 939 spin_unlock_irqrestore(&qhp->lock, flag); 1017 - *bad_wr = wr; 1018 - return -EINVAL; 940 + complete_rq_drain_wr(qhp, wr); 941 + return err; 1019 942 } 1020 943 num_wrs = t4_rq_avail(&qhp->wq); 1021 944 if (num_wrs == 0) { ··· 1627 1550 } 1628 1551 break; 1629 1552 case C4IW_QP_STATE_CLOSING: 1630 - if (!internal) { 1553 + 1554 + /* 1555 + * Allow kernel users to move to ERROR for qp draining. 1556 + */ 1557 + if (!internal && (qhp->ibqp.uobject || attrs->next_state != 1558 + C4IW_QP_STATE_ERROR)) { 1631 1559 ret = -EINVAL; 1632 1560 goto out; 1633 1561 } ··· 1725 1643 struct c4iw_dev *rhp; 1726 1644 struct c4iw_qp *qhp; 1727 1645 struct c4iw_qp_attributes attrs; 1728 - struct c4iw_ucontext *ucontext; 1729 1646 1730 1647 qhp = to_c4iw_qp(ib_qp); 1731 1648 rhp = qhp->rhp; ··· 1743 1662 list_del_init(&qhp->db_fc_entry); 1744 1663 spin_unlock_irq(&rhp->lock); 1745 1664 free_ird(rhp, qhp->attr.max_ird); 1746 - 1747 - ucontext = ib_qp->uobject ? 1748 - to_c4iw_ucontext(ib_qp->uobject->context) : NULL; 1749 - destroy_qp(&rhp->rdev, &qhp->wq, 1750 - ucontext ? &ucontext->uctx : &rhp->rdev.uctx); 1751 1665 1752 1666 c4iw_qp_rem_ref(ib_qp); 1753 1667 ··· 1839 1763 qhp->attr.max_ird = 0; 1840 1764 qhp->sq_sig_all = attrs->sq_sig_type == IB_SIGNAL_ALL_WR; 1841 1765 spin_lock_init(&qhp->lock); 1842 - init_completion(&qhp->sq_drained); 1843 - init_completion(&qhp->rq_drained); 1844 1766 mutex_init(&qhp->mutex); 1845 1767 init_waitqueue_head(&qhp->wait); 1846 1768 kref_init(&qhp->kref); 1769 + INIT_WORK(&qhp->free_work, free_qp_work); 1847 1770 1848 1771 ret = insert_handle(rhp, &rhp->qpidr, qhp, qhp->wq.sq.qid); 1849 1772 if (ret) ··· 1929 1854 ma_sync_key_mm->len = PAGE_SIZE; 1930 1855 insert_mmap(ucontext, ma_sync_key_mm); 1931 1856 } 1857 + 1858 + c4iw_get_ucontext(ucontext); 1859 + qhp->ucontext = ucontext; 1932 1860 } 1933 1861 qhp->ibqp.qp_num = qhp->wq.sq.qid; 1934 1862 init_timer(&(qhp->timer)); ··· 2035 1957 init_attr->cap.max_inline_data = T4_MAX_SEND_INLINE; 2036 1958 init_attr->sq_sig_type = qhp->sq_sig_all ? IB_SIGNAL_ALL_WR : 0; 2037 1959 return 0; 2038 - } 2039 - 2040 - static void move_qp_to_err(struct c4iw_qp *qp) 2041 - { 2042 - struct c4iw_qp_attributes attrs = { .next_state = C4IW_QP_STATE_ERROR }; 2043 - 2044 - (void)c4iw_modify_qp(qp->rhp, qp, C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); 2045 - } 2046 - 2047 - void c4iw_drain_sq(struct ib_qp *ibqp) 2048 - { 2049 - struct c4iw_qp *qp = to_c4iw_qp(ibqp); 2050 - unsigned long flag; 2051 - bool need_to_wait; 2052 - 2053 - move_qp_to_err(qp); 2054 - spin_lock_irqsave(&qp->lock, flag); 2055 - need_to_wait = !t4_sq_empty(&qp->wq); 2056 - spin_unlock_irqrestore(&qp->lock, flag); 2057 - 2058 - if (need_to_wait) 2059 - wait_for_completion(&qp->sq_drained); 2060 - } 2061 - 2062 - void c4iw_drain_rq(struct ib_qp *ibqp) 2063 - { 2064 - struct c4iw_qp *qp = to_c4iw_qp(ibqp); 2065 - unsigned long flag; 2066 - bool need_to_wait; 2067 - 2068 - move_qp_to_err(qp); 2069 - spin_lock_irqsave(&qp->lock, flag); 2070 - need_to_wait = !t4_rq_empty(&qp->wq); 2071 - spin_unlock_irqrestore(&qp->lock, flag); 2072 - 2073 - if (need_to_wait) 2074 - wait_for_completion(&qp->rq_drained); 2075 1960 }
+2
drivers/infiniband/hw/cxgb4/t4.h
··· 179 179 __be32 wrid_hi; 180 180 __be32 wrid_low; 181 181 } gen; 182 + u64 drain_cookie; 182 183 } u; 183 184 __be64 reserved; 184 185 __be64 bits_type_ts; ··· 239 238 /* generic accessor macros */ 240 239 #define CQE_WRID_HI(x) (be32_to_cpu((x)->u.gen.wrid_hi)) 241 240 #define CQE_WRID_LOW(x) (be32_to_cpu((x)->u.gen.wrid_low)) 241 + #define CQE_DRAIN_COOKIE(x) ((x)->u.drain_cookie) 242 242 243 243 /* macros for flit 3 of the cqe */ 244 244 #define CQE_GENBIT_S 63
+1 -10
drivers/infiniband/hw/i40iw/i40iw_verbs.c
··· 100 100 memset(props, 0, sizeof(*props)); 101 101 102 102 props->max_mtu = IB_MTU_4096; 103 - if (netdev->mtu >= 4096) 104 - props->active_mtu = IB_MTU_4096; 105 - else if (netdev->mtu >= 2048) 106 - props->active_mtu = IB_MTU_2048; 107 - else if (netdev->mtu >= 1024) 108 - props->active_mtu = IB_MTU_1024; 109 - else if (netdev->mtu >= 512) 110 - props->active_mtu = IB_MTU_512; 111 - else 112 - props->active_mtu = IB_MTU_256; 103 + props->active_mtu = ib_mtu_int_to_enum(netdev->mtu); 113 104 114 105 props->lid = 1; 115 106 if (netif_carrier_ok(iwdev->netdev))
+1 -11
drivers/infiniband/hw/nes/nes_verbs.c
··· 478 478 memset(props, 0, sizeof(*props)); 479 479 480 480 props->max_mtu = IB_MTU_4096; 481 - 482 - if (netdev->mtu >= 4096) 483 - props->active_mtu = IB_MTU_4096; 484 - else if (netdev->mtu >= 2048) 485 - props->active_mtu = IB_MTU_2048; 486 - else if (netdev->mtu >= 1024) 487 - props->active_mtu = IB_MTU_1024; 488 - else if (netdev->mtu >= 512) 489 - props->active_mtu = IB_MTU_512; 490 - else 491 - props->active_mtu = IB_MTU_256; 481 + props->active_mtu = ib_mtu_int_to_enum(netdev->mtu); 492 482 493 483 props->lid = 1; 494 484 props->lmc = 0;
+15 -8
drivers/infiniband/hw/qedr/main.c
··· 576 576 return 0; 577 577 } 578 578 579 - void qedr_unaffiliated_event(void *context, 580 - u8 event_code) 579 + void qedr_unaffiliated_event(void *context, u8 event_code) 581 580 { 582 581 pr_err("unaffiliated event not implemented yet\n"); 583 582 } ··· 791 792 if (device_create_file(&dev->ibdev.dev, qedr_attributes[i])) 792 793 goto sysfs_err; 793 794 795 + if (!test_and_set_bit(QEDR_ENET_STATE_BIT, &dev->enet_state)) 796 + qedr_ib_dispatch_event(dev, QEDR_PORT, IB_EVENT_PORT_ACTIVE); 797 + 794 798 DP_DEBUG(dev, QEDR_MSG_INIT, "qedr driver loaded successfully\n"); 795 799 return dev; 796 800 ··· 826 824 ib_dealloc_device(&dev->ibdev); 827 825 } 828 826 829 - static int qedr_close(struct qedr_dev *dev) 827 + static void qedr_close(struct qedr_dev *dev) 830 828 { 831 - qedr_ib_dispatch_event(dev, 1, IB_EVENT_PORT_ERR); 832 - 833 - return 0; 829 + if (test_and_clear_bit(QEDR_ENET_STATE_BIT, &dev->enet_state)) 830 + qedr_ib_dispatch_event(dev, QEDR_PORT, IB_EVENT_PORT_ERR); 834 831 } 835 832 836 833 static void qedr_shutdown(struct qedr_dev *dev) 837 834 { 838 835 qedr_close(dev); 839 836 qedr_remove(dev); 837 + } 838 + 839 + static void qedr_open(struct qedr_dev *dev) 840 + { 841 + if (!test_and_set_bit(QEDR_ENET_STATE_BIT, &dev->enet_state)) 842 + qedr_ib_dispatch_event(dev, QEDR_PORT, IB_EVENT_PORT_ACTIVE); 840 843 } 841 844 842 845 static void qedr_mac_address_change(struct qedr_dev *dev) ··· 870 863 871 864 ether_addr_copy(dev->gsi_ll2_mac_address, dev->ndev->dev_addr); 872 865 873 - qedr_ib_dispatch_event(dev, 1, IB_EVENT_GID_CHANGE); 866 + qedr_ib_dispatch_event(dev, QEDR_PORT, IB_EVENT_GID_CHANGE); 874 867 875 868 if (rc) 876 869 DP_ERR(dev, "Error updating mac filter\n"); ··· 884 877 { 885 878 switch (event) { 886 879 case QEDE_UP: 887 - qedr_ib_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE); 880 + qedr_open(dev); 888 881 break; 889 882 case QEDE_DOWN: 890 883 qedr_close(dev);
+5 -3
drivers/infiniband/hw/qedr/qedr.h
··· 113 113 struct qed_rdma_events events; 114 114 }; 115 115 116 + #define QEDR_ENET_STATE_BIT (0) 117 + 116 118 struct qedr_dev { 117 119 struct ib_device ibdev; 118 120 struct qed_dev *cdev; ··· 155 153 struct qedr_cq *gsi_sqcq; 156 154 struct qedr_cq *gsi_rqcq; 157 155 struct qedr_qp *gsi_qp; 156 + 157 + unsigned long enet_state; 158 158 }; 159 159 160 160 #define QEDR_MAX_SQ_PBL (0x8000) ··· 192 188 #define QEDR_ROCE_MAX_CNQ_SIZE (0x4000) 193 189 194 190 #define QEDR_MAX_PORT (1) 191 + #define QEDR_PORT (1) 195 192 196 193 #define QEDR_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME) 197 194 ··· 255 250 u32 sig; 256 251 257 252 u16 icid; 258 - 259 - /* Lock to protect completion handler */ 260 - spinlock_t comp_handler_lock; 261 253 262 254 /* Lock to protect multiplem CQ's */ 263 255 spinlock_t cq_lock;
+4 -10
drivers/infiniband/hw/qedr/qedr_cm.c
··· 87 87 qedr_inc_sw_gsi_cons(&qp->sq); 88 88 spin_unlock_irqrestore(&qp->q_lock, flags); 89 89 90 - if (cq->ibcq.comp_handler) { 91 - spin_lock_irqsave(&cq->comp_handler_lock, flags); 90 + if (cq->ibcq.comp_handler) 92 91 (*cq->ibcq.comp_handler) (&cq->ibcq, cq->ibcq.cq_context); 93 - spin_unlock_irqrestore(&cq->comp_handler_lock, flags); 94 - } 95 92 } 96 93 97 94 void qedr_ll2_rx_cb(void *_dev, struct qed_roce_ll2_packet *pkt, ··· 110 113 111 114 spin_unlock_irqrestore(&qp->q_lock, flags); 112 115 113 - if (cq->ibcq.comp_handler) { 114 - spin_lock_irqsave(&cq->comp_handler_lock, flags); 116 + if (cq->ibcq.comp_handler) 115 117 (*cq->ibcq.comp_handler) (&cq->ibcq, cq->ibcq.cq_context); 116 - spin_unlock_irqrestore(&cq->comp_handler_lock, flags); 117 - } 118 118 } 119 119 120 120 static void qedr_destroy_gsi_cq(struct qedr_dev *dev, ··· 398 404 } 399 405 400 406 if (ether_addr_equal(udh.eth.smac_h, udh.eth.dmac_h)) 401 - packet->tx_dest = QED_ROCE_LL2_TX_DEST_NW; 402 - else 403 407 packet->tx_dest = QED_ROCE_LL2_TX_DEST_LB; 408 + else 409 + packet->tx_dest = QED_ROCE_LL2_TX_DEST_NW; 404 410 405 411 packet->roce_mode = roce_mode; 406 412 memcpy(packet->header.vaddr, ud_header_buffer, header_size);
+41 -21
drivers/infiniband/hw/qedr/verbs.c
··· 471 471 struct ib_ucontext *context, struct ib_udata *udata) 472 472 { 473 473 struct qedr_dev *dev = get_qedr_dev(ibdev); 474 - struct qedr_ucontext *uctx = NULL; 475 - struct qedr_alloc_pd_uresp uresp; 476 474 struct qedr_pd *pd; 477 475 u16 pd_id; 478 476 int rc; ··· 487 489 if (!pd) 488 490 return ERR_PTR(-ENOMEM); 489 491 490 - dev->ops->rdma_alloc_pd(dev->rdma_ctx, &pd_id); 492 + rc = dev->ops->rdma_alloc_pd(dev->rdma_ctx, &pd_id); 493 + if (rc) 494 + goto err; 491 495 492 - uresp.pd_id = pd_id; 493 496 pd->pd_id = pd_id; 494 497 495 498 if (udata && context) { 499 + struct qedr_alloc_pd_uresp uresp; 500 + 501 + uresp.pd_id = pd_id; 502 + 496 503 rc = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); 497 - if (rc) 504 + if (rc) { 498 505 DP_ERR(dev, "copy error pd_id=0x%x.\n", pd_id); 499 - uctx = get_qedr_ucontext(context); 500 - uctx->pd = pd; 501 - pd->uctx = uctx; 506 + dev->ops->rdma_dealloc_pd(dev->rdma_ctx, pd_id); 507 + goto err; 508 + } 509 + 510 + pd->uctx = get_qedr_ucontext(context); 511 + pd->uctx->pd = pd; 502 512 } 503 513 504 514 return &pd->ibpd; 515 + 516 + err: 517 + kfree(pd); 518 + return ERR_PTR(rc); 505 519 } 506 520 507 521 int qedr_dealloc_pd(struct ib_pd *ibpd) ··· 1610 1600 return ERR_PTR(-EFAULT); 1611 1601 } 1612 1602 1613 - enum ib_qp_state qedr_get_ibqp_state(enum qed_roce_qp_state qp_state) 1603 + static enum ib_qp_state qedr_get_ibqp_state(enum qed_roce_qp_state qp_state) 1614 1604 { 1615 1605 switch (qp_state) { 1616 1606 case QED_ROCE_QP_STATE_RESET: ··· 1631 1621 return IB_QPS_ERR; 1632 1622 } 1633 1623 1634 - enum qed_roce_qp_state qedr_get_state_from_ibqp(enum ib_qp_state qp_state) 1624 + static enum qed_roce_qp_state qedr_get_state_from_ibqp( 1625 + enum ib_qp_state qp_state) 1635 1626 { 1636 1627 switch (qp_state) { 1637 1628 case IB_QPS_RESET: ··· 1668 1657 int status = 0; 1669 1658 1670 1659 if (new_state == qp->state) 1671 - return 1; 1660 + return 0; 1672 1661 1673 1662 switch (qp->state) { 1674 1663 case QED_ROCE_QP_STATE_RESET: ··· 1744 1733 /* ERR->XXX */ 1745 1734 switch (new_state) { 1746 1735 case QED_ROCE_QP_STATE_RESET: 1736 + if ((qp->rq.prod != qp->rq.cons) || 1737 + (qp->sq.prod != qp->sq.cons)) { 1738 + DP_NOTICE(dev, 1739 + "Error->Reset with rq/sq not empty rq.prod=%x rq.cons=%x sq.prod=%x sq.cons=%x\n", 1740 + qp->rq.prod, qp->rq.cons, qp->sq.prod, 1741 + qp->sq.cons); 1742 + status = -EINVAL; 1743 + } 1747 1744 break; 1748 1745 default: 1749 1746 status = -EINVAL; ··· 1884 1865 qp_params.sgid.dwords[2], qp_params.sgid.dwords[3]); 1885 1866 DP_DEBUG(dev, QEDR_MSG_QP, "remote_mac=[%pM]\n", 1886 1867 qp_params.remote_mac_addr); 1887 - ; 1888 1868 1889 1869 qp_params.mtu = qp->mtu; 1890 1870 qp_params.lb_indication = false; ··· 2034 2016 2035 2017 qp_attr->qp_state = qedr_get_ibqp_state(params.state); 2036 2018 qp_attr->cur_qp_state = qedr_get_ibqp_state(params.state); 2037 - qp_attr->path_mtu = iboe_get_mtu(params.mtu); 2019 + qp_attr->path_mtu = ib_mtu_int_to_enum(params.mtu); 2038 2020 qp_attr->path_mig_state = IB_MIG_MIGRATED; 2039 2021 qp_attr->rq_psn = params.rq_psn; 2040 2022 qp_attr->sq_psn = params.sq_psn; ··· 2046 2028 qp_attr->cap.max_recv_wr = qp->rq.max_wr; 2047 2029 qp_attr->cap.max_send_sge = qp->sq.max_sges; 2048 2030 qp_attr->cap.max_recv_sge = qp->rq.max_sges; 2049 - qp_attr->cap.max_inline_data = qp->max_inline_data; 2031 + qp_attr->cap.max_inline_data = ROCE_REQ_MAX_INLINE_DATA_SIZE; 2050 2032 qp_init_attr->cap = qp_attr->cap; 2051 2033 2052 2034 memcpy(&qp_attr->ah_attr.grh.dgid.raw[0], &params.dgid.bytes[0], ··· 2320 2302 return rc; 2321 2303 } 2322 2304 2323 - struct qedr_mr *__qedr_alloc_mr(struct ib_pd *ibpd, int max_page_list_len) 2305 + static struct qedr_mr *__qedr_alloc_mr(struct ib_pd *ibpd, 2306 + int max_page_list_len) 2324 2307 { 2325 2308 struct qedr_pd *pd = get_qedr_pd(ibpd); 2326 2309 struct qedr_dev *dev = get_qedr_dev(ibpd->device); ··· 2723 2704 return 0; 2724 2705 } 2725 2706 2726 - enum ib_wc_opcode qedr_ib_to_wc_opcode(enum ib_wr_opcode opcode) 2707 + static enum ib_wc_opcode qedr_ib_to_wc_opcode(enum ib_wr_opcode opcode) 2727 2708 { 2728 2709 switch (opcode) { 2729 2710 case IB_WR_RDMA_WRITE: ··· 2748 2729 } 2749 2730 } 2750 2731 2751 - inline bool qedr_can_post_send(struct qedr_qp *qp, struct ib_send_wr *wr) 2732 + static inline bool qedr_can_post_send(struct qedr_qp *qp, struct ib_send_wr *wr) 2752 2733 { 2753 2734 int wq_is_full, err_wr, pbl_is_full; 2754 2735 struct qedr_dev *dev = qp->dev; ··· 2785 2766 return true; 2786 2767 } 2787 2768 2788 - int __qedr_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 2769 + static int __qedr_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 2789 2770 struct ib_send_wr **bad_wr) 2790 2771 { 2791 2772 struct qedr_dev *dev = get_qedr_dev(ibqp->device); ··· 3253 3234 IB_WC_SUCCESS, 0); 3254 3235 break; 3255 3236 case RDMA_CQE_REQ_STS_WORK_REQUEST_FLUSHED_ERR: 3256 - DP_ERR(dev, 3257 - "Error: POLL CQ with RDMA_CQE_REQ_STS_WORK_REQUEST_FLUSHED_ERR. CQ icid=0x%x, QP icid=0x%x\n", 3258 - cq->icid, qp->icid); 3237 + if (qp->state != QED_ROCE_QP_STATE_ERR) 3238 + DP_ERR(dev, 3239 + "Error: POLL CQ with RDMA_CQE_REQ_STS_WORK_REQUEST_FLUSHED_ERR. CQ icid=0x%x, QP icid=0x%x\n", 3240 + cq->icid, qp->icid); 3259 3241 cnt = process_req(dev, qp, cq, num_entries, wc, req->sq_cons, 3260 3242 IB_WC_WR_FLUSH_ERR, 1); 3261 3243 break;
+1 -3
drivers/infiniband/hw/vmw_pvrdma/pvrdma_main.c
··· 1029 1029 if (ret) { 1030 1030 dev_err(&pdev->dev, "failed to allocate interrupts\n"); 1031 1031 ret = -ENOMEM; 1032 - goto err_netdevice; 1032 + goto err_free_cq_ring; 1033 1033 } 1034 1034 1035 1035 /* Allocate UAR table. */ ··· 1092 1092 err_free_intrs: 1093 1093 pvrdma_free_irq(dev); 1094 1094 pvrdma_disable_msi_all(dev); 1095 - err_netdevice: 1096 - unregister_netdevice_notifier(&dev->nb_netdev); 1097 1095 err_free_cq_ring: 1098 1096 pvrdma_page_dir_cleanup(dev, &dev->cq_pdir); 1099 1097 err_free_async_ring:
+1 -1
drivers/infiniband/hw/vmw_pvrdma/pvrdma_verbs.c
··· 306 306 union pvrdma_cmd_resp rsp; 307 307 struct pvrdma_cmd_create_uc *cmd = &req.create_uc; 308 308 struct pvrdma_cmd_create_uc_resp *resp = &rsp.create_uc_resp; 309 - struct pvrdma_alloc_ucontext_resp uresp; 309 + struct pvrdma_alloc_ucontext_resp uresp = {0}; 310 310 int ret; 311 311 void *ptr; 312 312
+1 -1
drivers/infiniband/sw/rxe/rxe_net.c
··· 555 555 } 556 556 557 557 spin_lock_bh(&dev_list_lock); 558 - list_add_tail(&rxe_dev_list, &rxe->list); 558 + list_add_tail(&rxe->list, &rxe_dev_list); 559 559 spin_unlock_bh(&dev_list_lock); 560 560 return rxe; 561 561 }
+1 -2
drivers/infiniband/sw/rxe/rxe_qp.c
··· 813 813 del_timer_sync(&qp->rnr_nak_timer); 814 814 815 815 rxe_cleanup_task(&qp->req.task); 816 - if (qp_type(qp) == IB_QPT_RC) 817 - rxe_cleanup_task(&qp->comp.task); 816 + rxe_cleanup_task(&qp->comp.task); 818 817 819 818 /* flush out any receive wr's or pending requests */ 820 819 __rxe_do_task(&qp->req.task);
+4 -7
drivers/infiniband/ulp/iser/iscsi_iser.c
··· 651 651 SHOST_DIX_GUARD_CRC); 652 652 } 653 653 654 - /* 655 - * Limit the sg_tablesize and max_sectors based on the device 656 - * max fastreg page list length. 657 - */ 658 - shost->sg_tablesize = min_t(unsigned short, shost->sg_tablesize, 659 - ib_conn->device->ib_device->attrs.max_fast_reg_page_list_len); 660 - 661 654 if (iscsi_host_add(shost, 662 655 ib_conn->device->ib_device->dma_device)) { 663 656 mutex_unlock(&iser_conn->state_mutex); ··· 671 678 */ 672 679 max_fr_sectors = ((shost->sg_tablesize - 1) * PAGE_SIZE) >> 9; 673 680 shost->max_sectors = min(iser_max_sectors, max_fr_sectors); 681 + 682 + iser_dbg("iser_conn %p, sg_tablesize %u, max_sectors %u\n", 683 + iser_conn, shost->sg_tablesize, 684 + shost->max_sectors); 674 685 675 686 if (cmds_max > max_cmds) { 676 687 iser_info("cmds_max changed from %u to %u\n",
-2
drivers/infiniband/ulp/iser/iscsi_iser.h
··· 496 496 * @rx_descs: rx buffers array (cyclic buffer) 497 497 * @num_rx_descs: number of rx descriptors 498 498 * @scsi_sg_tablesize: scsi host sg_tablesize 499 - * @scsi_max_sectors: scsi host max sectors 500 499 */ 501 500 struct iser_conn { 502 501 struct ib_conn ib_conn; ··· 518 519 struct iser_rx_desc *rx_descs; 519 520 u32 num_rx_descs; 520 521 unsigned short scsi_sg_tablesize; 521 - unsigned int scsi_max_sectors; 522 522 bool snd_w_inv; 523 523 }; 524 524
+1 -12
drivers/infiniband/ulp/iser/iser_verbs.c
··· 707 707 sup_sg_tablesize = min_t(unsigned, ISCSI_ISER_MAX_SG_TABLESIZE, 708 708 device->ib_device->attrs.max_fast_reg_page_list_len); 709 709 710 - if (sg_tablesize > sup_sg_tablesize) { 711 - sg_tablesize = sup_sg_tablesize; 712 - iser_conn->scsi_max_sectors = sg_tablesize * SIZE_4K / 512; 713 - } else { 714 - iser_conn->scsi_max_sectors = max_sectors; 715 - } 716 - 717 - iser_conn->scsi_sg_tablesize = sg_tablesize; 718 - 719 - iser_dbg("iser_conn %p, sg_tablesize %u, max_sectors %u\n", 720 - iser_conn, iser_conn->scsi_sg_tablesize, 721 - iser_conn->scsi_max_sectors); 710 + iser_conn->scsi_sg_tablesize = min(sg_tablesize, sup_sg_tablesize); 722 711 } 723 712 724 713 /**
+13 -2
drivers/infiniband/ulp/srp/ib_srp.c
··· 371 371 struct srp_fr_desc *d; 372 372 struct ib_mr *mr; 373 373 int i, ret = -EINVAL; 374 + enum ib_mr_type mr_type; 374 375 375 376 if (pool_size <= 0) 376 377 goto err; ··· 385 384 spin_lock_init(&pool->lock); 386 385 INIT_LIST_HEAD(&pool->free_list); 387 386 387 + if (device->attrs.device_cap_flags & IB_DEVICE_SG_GAPS_REG) 388 + mr_type = IB_MR_TYPE_SG_GAPS; 389 + else 390 + mr_type = IB_MR_TYPE_MEM_REG; 391 + 388 392 for (i = 0, d = &pool->desc[0]; i < pool->size; i++, d++) { 389 - mr = ib_alloc_mr(pd, IB_MR_TYPE_MEM_REG, 390 - max_page_list_len); 393 + mr = ib_alloc_mr(pd, mr_type, max_page_list_len); 391 394 if (IS_ERR(mr)) { 392 395 ret = PTR_ERR(mr); 393 396 if (ret == -ENOMEM) ··· 3697 3692 pr_warn("Bumping up indirect_sg_entries to match cmd_sg_entries (%u)\n", 3698 3693 cmd_sg_entries); 3699 3694 indirect_sg_entries = cmd_sg_entries; 3695 + } 3696 + 3697 + if (indirect_sg_entries > SG_MAX_SEGMENTS) { 3698 + pr_warn("Clamping indirect_sg_entries to %u\n", 3699 + SG_MAX_SEGMENTS); 3700 + indirect_sg_entries = SG_MAX_SEGMENTS; 3700 3701 } 3701 3702 3702 3703 srp_remove_wq = create_workqueue("srp_remove");
+14
include/rdma/ib_verbs.h
··· 352 352 } 353 353 } 354 354 355 + static inline enum ib_mtu ib_mtu_int_to_enum(int mtu) 356 + { 357 + if (mtu >= 4096) 358 + return IB_MTU_4096; 359 + else if (mtu >= 2048) 360 + return IB_MTU_2048; 361 + else if (mtu >= 1024) 362 + return IB_MTU_1024; 363 + else if (mtu >= 512) 364 + return IB_MTU_512; 365 + else 366 + return IB_MTU_256; 367 + } 368 + 355 369 enum ib_port_state { 356 370 IB_PORT_NOP = 0, 357 371 IB_PORT_DOWN = 1,
+1
include/uapi/rdma/Kbuild
··· 16 16 header-y += ocrdma-abi.h 17 17 header-y += hns-abi.h 18 18 header-y += vmw_pvrdma-abi.h 19 + header-y += qedr-abi.h
+1 -1
include/uapi/rdma/cxgb3-abi.h
··· 30 30 * SOFTWARE. 31 31 */ 32 32 #ifndef CXGB3_ABI_USER_H 33 - #define CXBG3_ABI_USER_H 33 + #define CXGB3_ABI_USER_H 34 34 35 35 #include <linux/types.h> 36 36