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Documentation: dt: net: fix spelling mistakes

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Eric Engestrom and committed by
Rob Herring dd346f27 c7292b47

+4 -4
+1 -1
Documentation/devicetree/bindings/net/hisilicon-hns-nic.txt
··· 8 8 specifies a reference to the associating hardware driver node. 9 9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt 10 10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can 11 - connect to 8 PHYs. Port 0 to 1 are both used for adminstration purpose. They 11 + connect to 8 PHYs. Port 0 to 1 are both used for administration purpose. They 12 12 are called debug ports. 13 13 14 14 The remaining 6 PHYs are taken according to the mode of DSAF.
+2 -2
Documentation/devicetree/bindings/net/stmmac.txt
··· 51 51 AXI register inside the DMA module: 52 52 - snps,lpi_en: enable Low Power Interface 53 53 - snps,xit_frm: unlock on WoL 54 - - snps,wr_osr_lmt: max write oustanding req. limit 55 - - snps,rd_osr_lmt: max read oustanding req. limit 54 + - snps,wr_osr_lmt: max write outstanding req. limit 55 + - snps,rd_osr_lmt: max read outstanding req. limit 56 56 - snps,kbbe: do not cross 1KiB boundary. 57 57 - snps,axi_all: align address 58 58 - snps,blen: this is a vector of supported burst length.
+1 -1
Documentation/devicetree/bindings/net/ti,dp83867.txt
··· 2 2 3 3 Required properties: 4 4 - reg - The ID number for the phy, usually a small integer 5 - - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h 5 + - ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h 6 6 for applicable values 7 7 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h 8 8 for applicable values