Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'spi-fix-v5.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
"Quite a lot of fixes here for no single reason.

There's a collection of the usual sort of device specific fixes and
also a bunch of people have been working on spidev and the userspace
test program spidev_test so they've got an unusually large collection
of small fixes"

* tag 'spi-fix-v5.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: spidev: fix a potential use-after-free in spidev_release()
spi: spidev: fix a race between spidev_release and spidev_remove
spi: stm32-qspi: Fix error path in case of -EPROBE_DEFER
spi: uapi: spidev: Use TABs for alignment
spi: spi-fsl-dspi: Free DMA memory with matching function
spi: tools: Add macro definitions to fix build errors
spi: tools: Make default_tx/rx and input_tx static
spi: dt-bindings: amlogic, meson-gx-spicc: Fix schema for meson-g12a
spi: rspi: Use requested instead of maximum bit rate
spi: spidev_test: Use %u to format unsigned numbers
spi: sprd: switch the sequence of setting WDG_LOAD_LOW and _HIGH

+90 -58
+17 -9
Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
··· 34 34 maxItems: 1 35 35 36 36 clocks: 37 - maxItems: 1 37 + minItems: 1 38 + maxItems: 2 39 + items: 40 + - description: controller register bus clock 41 + - description: baud rate generator and delay control clock 38 42 39 43 clock-names: 40 - description: input clock for the baud rate generator 41 - items: 42 - - const: core 44 + minItems: 1 45 + maxItems: 2 43 46 44 47 if: 45 48 properties: ··· 54 51 then: 55 52 properties: 56 53 clocks: 57 - contains: 58 - items: 59 - - description: controller register bus clock 60 - - description: baud rate generator and delay control clock 54 + minItems: 2 61 55 62 56 clock-names: 63 - minItems: 2 64 57 items: 65 58 - const: core 66 59 - const: pclk 60 + 61 + else: 62 + properties: 63 + clocks: 64 + maxItems: 1 65 + 66 + clock-names: 67 + items: 68 + - const: core 67 69 68 70 required: 69 71 - compatible
+4 -4
drivers/spi/spi-fsl-dspi.c
··· 588 588 return; 589 589 590 590 if (dma->chan_tx) { 591 - dma_unmap_single(dma->chan_tx->device->dev, dma->tx_dma_phys, 592 - dma_bufsize, DMA_TO_DEVICE); 591 + dma_free_coherent(dma->chan_tx->device->dev, dma_bufsize, 592 + dma->tx_dma_buf, dma->tx_dma_phys); 593 593 dma_release_channel(dma->chan_tx); 594 594 } 595 595 596 596 if (dma->chan_rx) { 597 - dma_unmap_single(dma->chan_rx->device->dev, dma->rx_dma_phys, 598 - dma_bufsize, DMA_FROM_DEVICE); 597 + dma_free_coherent(dma->chan_rx->device->dev, dma_bufsize, 598 + dma->rx_dma_buf, dma->rx_dma_phys); 599 599 dma_release_channel(dma->chan_rx); 600 600 } 601 601 }
+21 -7
drivers/spi/spi-rspi.c
··· 179 179 180 180 struct rspi_data { 181 181 void __iomem *addr; 182 - u32 max_speed_hz; 182 + u32 speed_hz; 183 183 struct spi_controller *ctlr; 184 184 struct platform_device *pdev; 185 185 wait_queue_head_t wait; ··· 258 258 rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR); 259 259 260 260 /* Sets transfer bit rate */ 261 - spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 262 - 2 * rspi->max_speed_hz) - 1; 261 + spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz) - 1; 263 262 rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); 264 263 265 264 /* Disable dummy transmission, set 16-bit word access, 1 frame */ ··· 298 299 299 300 clksrc = clk_get_rate(rspi->clk); 300 301 while (div < 3) { 301 - if (rspi->max_speed_hz >= clksrc/4) /* 4=(CLK/2)/2 */ 302 + if (rspi->speed_hz >= clksrc/4) /* 4=(CLK/2)/2 */ 302 303 break; 303 304 div++; 304 305 clksrc /= 2; 305 306 } 306 307 307 308 /* Sets transfer bit rate */ 308 - spbr = DIV_ROUND_UP(clksrc, 2 * rspi->max_speed_hz) - 1; 309 + spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz) - 1; 309 310 rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); 310 311 rspi->spcmd |= div << 2; 311 312 ··· 340 341 rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR); 341 342 342 343 /* Sets transfer bit rate */ 343 - spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->max_speed_hz); 344 + spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz); 344 345 rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); 345 346 346 347 /* Disable dummy transmission, set byte access */ ··· 948 949 { 949 950 struct rspi_data *rspi = spi_controller_get_devdata(ctlr); 950 951 struct spi_device *spi = msg->spi; 952 + const struct spi_transfer *xfer; 951 953 int ret; 952 954 953 - rspi->max_speed_hz = spi->max_speed_hz; 955 + /* 956 + * As the Bit Rate Register must not be changed while the device is 957 + * active, all transfers in a message must use the same bit rate. 958 + * In theory, the sequencer could be enabled, and each Command Register 959 + * could divide the base bit rate by a different value. 960 + * However, most RSPI variants do not have Transfer Data Length 961 + * Multiplier Setting Registers, so each sequence step would be limited 962 + * to a single word, making this feature unsuitable for large 963 + * transfers, which would gain most from it. 964 + */ 965 + rspi->speed_hz = spi->max_speed_hz; 966 + list_for_each_entry(xfer, &msg->transfers, transfer_list) { 967 + if (xfer->speed_hz < rspi->speed_hz) 968 + rspi->speed_hz = xfer->speed_hz; 969 + } 954 970 955 971 rspi->spcmd = SPCMD_SSLKP; 956 972 if (spi->mode & SPI_CPOL)
+1 -1
drivers/spi/spi-sprd-adi.c
··· 389 389 sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_CTRL, val); 390 390 391 391 /* Load the watchdog timeout value, 50ms is always enough. */ 392 + sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0); 392 393 sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_LOW, 393 394 WDG_LOAD_VAL & WDG_LOAD_MASK); 394 - sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0); 395 395 396 396 /* Start the watchdog to reset system */ 397 397 sprd_adi_read(sadi, sadi->slave_pbase + REG_WDG_CTRL, &val);
+26 -20
drivers/spi/spi-stm32-qspi.c
··· 553 553 .exec_op = stm32_qspi_exec_op, 554 554 }; 555 555 556 - static void stm32_qspi_release(struct stm32_qspi *qspi) 557 - { 558 - pm_runtime_get_sync(qspi->dev); 559 - /* disable qspi */ 560 - writel_relaxed(0, qspi->io_base + QSPI_CR); 561 - stm32_qspi_dma_free(qspi); 562 - mutex_destroy(&qspi->lock); 563 - pm_runtime_put_noidle(qspi->dev); 564 - pm_runtime_disable(qspi->dev); 565 - pm_runtime_set_suspended(qspi->dev); 566 - pm_runtime_dont_use_autosuspend(qspi->dev); 567 - clk_disable_unprepare(qspi->clk); 568 - } 569 - 570 556 static int stm32_qspi_probe(struct platform_device *pdev) 571 557 { 572 558 struct device *dev = &pdev->dev; ··· 628 642 if (IS_ERR(rstc)) { 629 643 ret = PTR_ERR(rstc); 630 644 if (ret == -EPROBE_DEFER) 631 - goto err_qspi_release; 645 + goto err_clk_disable; 632 646 } else { 633 647 reset_control_assert(rstc); 634 648 udelay(2); ··· 639 653 platform_set_drvdata(pdev, qspi); 640 654 ret = stm32_qspi_dma_setup(qspi); 641 655 if (ret) 642 - goto err_qspi_release; 656 + goto err_dma_free; 643 657 644 658 mutex_init(&qspi->lock); 645 659 ··· 659 673 660 674 ret = devm_spi_register_master(dev, ctrl); 661 675 if (ret) 662 - goto err_qspi_release; 676 + goto err_pm_runtime_free; 663 677 664 678 pm_runtime_mark_last_busy(dev); 665 679 pm_runtime_put_autosuspend(dev); 666 680 667 681 return 0; 668 682 669 - err_qspi_release: 670 - stm32_qspi_release(qspi); 683 + err_pm_runtime_free: 684 + pm_runtime_get_sync(qspi->dev); 685 + /* disable qspi */ 686 + writel_relaxed(0, qspi->io_base + QSPI_CR); 687 + mutex_destroy(&qspi->lock); 688 + pm_runtime_put_noidle(qspi->dev); 689 + pm_runtime_disable(qspi->dev); 690 + pm_runtime_set_suspended(qspi->dev); 691 + pm_runtime_dont_use_autosuspend(qspi->dev); 692 + err_dma_free: 693 + stm32_qspi_dma_free(qspi); 694 + err_clk_disable: 695 + clk_disable_unprepare(qspi->clk); 671 696 err_master_put: 672 697 spi_master_put(qspi->ctrl); 673 698 ··· 689 692 { 690 693 struct stm32_qspi *qspi = platform_get_drvdata(pdev); 691 694 692 - stm32_qspi_release(qspi); 695 + pm_runtime_get_sync(qspi->dev); 696 + /* disable qspi */ 697 + writel_relaxed(0, qspi->io_base + QSPI_CR); 698 + stm32_qspi_dma_free(qspi); 699 + mutex_destroy(&qspi->lock); 700 + pm_runtime_put_noidle(qspi->dev); 701 + pm_runtime_disable(qspi->dev); 702 + pm_runtime_set_suspended(qspi->dev); 703 + pm_runtime_dont_use_autosuspend(qspi->dev); 704 + clk_disable_unprepare(qspi->clk); 693 705 694 706 return 0; 695 707 }
+12 -12
drivers/spi/spidev.c
··· 609 609 static int spidev_release(struct inode *inode, struct file *filp) 610 610 { 611 611 struct spidev_data *spidev; 612 + int dofree; 612 613 613 614 mutex_lock(&device_list_lock); 614 615 spidev = filp->private_data; 615 616 filp->private_data = NULL; 616 617 618 + spin_lock_irq(&spidev->spi_lock); 619 + /* ... after we unbound from the underlying device? */ 620 + dofree = (spidev->spi == NULL); 621 + spin_unlock_irq(&spidev->spi_lock); 622 + 617 623 /* last close? */ 618 624 spidev->users--; 619 625 if (!spidev->users) { 620 - int dofree; 621 626 622 627 kfree(spidev->tx_buffer); 623 628 spidev->tx_buffer = NULL; ··· 630 625 kfree(spidev->rx_buffer); 631 626 spidev->rx_buffer = NULL; 632 627 633 - spin_lock_irq(&spidev->spi_lock); 634 - if (spidev->spi) 635 - spidev->speed_hz = spidev->spi->max_speed_hz; 636 - 637 - /* ... after we unbound from the underlying device? */ 638 - dofree = (spidev->spi == NULL); 639 - spin_unlock_irq(&spidev->spi_lock); 640 - 641 628 if (dofree) 642 629 kfree(spidev); 630 + else 631 + spidev->speed_hz = spidev->spi->max_speed_hz; 643 632 } 644 633 #ifdef CONFIG_SPI_SLAVE 645 - spi_slave_abort(spidev->spi); 634 + if (!dofree) 635 + spi_slave_abort(spidev->spi); 646 636 #endif 647 637 mutex_unlock(&device_list_lock); 648 638 ··· 787 787 { 788 788 struct spidev_data *spidev = spi_get_drvdata(spi); 789 789 790 + /* prevent new opens */ 791 + mutex_lock(&device_list_lock); 790 792 /* make sure ops on existing fds can abort cleanly */ 791 793 spin_lock_irq(&spidev->spi_lock); 792 794 spidev->spi = NULL; 793 795 spin_unlock_irq(&spidev->spi_lock); 794 796 795 - /* prevent new opens */ 796 - mutex_lock(&device_list_lock); 797 797 list_del(&spidev->device_entry); 798 798 device_destroy(spidev_class, spidev->devt); 799 799 clear_bit(MINOR(spidev->devt), minors);
+4
include/uapi/linux/spi/spidev.h
··· 48 48 #define SPI_TX_QUAD 0x200 49 49 #define SPI_RX_DUAL 0x400 50 50 #define SPI_RX_QUAD 0x800 51 + #define SPI_CS_WORD 0x1000 52 + #define SPI_TX_OCTAL 0x2000 53 + #define SPI_RX_OCTAL 0x4000 54 + #define SPI_3WIRE_HIZ 0x8000 51 55 52 56 /*---------------------------------------------------------------------------*/ 53 57
+5 -5
tools/spi/spidev_test.c
··· 47 47 static int iterations; 48 48 static int interval = 5; /* interval in seconds for showing transfer rate */ 49 49 50 - uint8_t default_tx[] = { 50 + static uint8_t default_tx[] = { 51 51 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 52 52 0x40, 0x00, 0x00, 0x00, 0x00, 0x95, 53 53 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, ··· 56 56 0xF0, 0x0D, 57 57 }; 58 58 59 - uint8_t default_rx[ARRAY_SIZE(default_tx)] = {0, }; 60 - char *input_tx; 59 + static uint8_t default_rx[ARRAY_SIZE(default_tx)] = {0, }; 60 + static char *input_tx; 61 61 62 62 static void hex_dump(const void *src, size_t length, size_t line_size, 63 63 char *prefix) ··· 461 461 pabort("can't get max speed hz"); 462 462 463 463 printf("spi mode: 0x%x\n", mode); 464 - printf("bits per word: %d\n", bits); 465 - printf("max speed: %d Hz (%d KHz)\n", speed, speed/1000); 464 + printf("bits per word: %u\n", bits); 465 + printf("max speed: %u Hz (%u kHz)\n", speed, speed/1000); 466 466 467 467 if (input_tx) 468 468 transfer_escaped_string(fd, input_tx);