drivers: Final irq namespace conversion

Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

+70 -69
+1 -1
drivers/ata/pata_ixp4xx_cf.c
··· 167 168 irq = platform_get_irq(pdev, 0); 169 if (irq) 170 - set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 171 172 /* Setup expansion bus chip selects */ 173 *data->cs0_cfg = data->cs0_bits;
··· 167 168 irq = platform_get_irq(pdev, 0); 169 if (irq) 170 + irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 171 172 /* Setup expansion bus chip selects */ 173 *data->cs0_cfg = data->cs0_bits;
+2 -2
drivers/ata/pata_rb532_cf.c
··· 60 struct rb532_cf_info *info = ah->private_data; 61 62 if (gpio_get_value(info->gpio_line)) { 63 - set_irq_type(info->irq, IRQ_TYPE_LEVEL_LOW); 64 ata_sff_interrupt(info->irq, dev_instance); 65 } else { 66 - set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); 67 } 68 69 return IRQ_HANDLED;
··· 60 struct rb532_cf_info *info = ah->private_data; 61 62 if (gpio_get_value(info->gpio_line)) { 63 + irq_set_irq_type(info->irq, IRQ_TYPE_LEVEL_LOW); 64 ata_sff_interrupt(info->irq, dev_instance); 65 } else { 66 + irq_set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); 67 } 68 69 return IRQ_HANDLED;
+1 -1
drivers/hwmon/gpio-fan.c
··· 116 return 0; 117 118 INIT_WORK(&fan_data->alarm_work, fan_alarm_notify); 119 - set_irq_type(alarm_irq, IRQ_TYPE_EDGE_BOTH); 120 err = request_irq(alarm_irq, fan_alarm_irq_handler, IRQF_SHARED, 121 "GPIO fan alarm", fan_data); 122 if (err)
··· 116 return 0; 117 118 INIT_WORK(&fan_data->alarm_work, fan_alarm_notify); 119 + irq_set_irq_type(alarm_irq, IRQ_TYPE_EDGE_BOTH); 120 err = request_irq(alarm_irq, fan_alarm_irq_handler, IRQF_SHARED, 121 "GPIO fan alarm", fan_data); 122 if (err)
+2 -2
drivers/input/keyboard/lm8323.c
··· 809 struct lm8323_chip *lm = i2c_get_clientdata(client); 810 int i; 811 812 - set_irq_wake(client->irq, 0); 813 disable_irq(client->irq); 814 815 mutex_lock(&lm->lock); ··· 838 led_classdev_resume(&lm->pwm[i].cdev); 839 840 enable_irq(client->irq); 841 - set_irq_wake(client->irq, 1); 842 843 return 0; 844 }
··· 809 struct lm8323_chip *lm = i2c_get_clientdata(client); 810 int i; 811 812 + irq_set_irq_wake(client->irq, 0); 813 disable_irq(client->irq); 814 815 mutex_lock(&lm->lock); ··· 838 led_classdev_resume(&lm->pwm[i].cdev); 839 840 enable_irq(client->irq); 841 + irq_set_irq_wake(client->irq, 1); 842 843 return 0; 844 }
+1 -1
drivers/input/serio/ams_delta_serio.c
··· 149 * at FIQ level, switch back from edge to simple interrupt handler 150 * to avoid bad interaction. 151 */ 152 - set_irq_handler(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 153 handle_simple_irq); 154 155 serio_register_port(ams_delta_serio);
··· 149 * at FIQ level, switch back from edge to simple interrupt handler 150 * to avoid bad interaction. 151 */ 152 + irq_set_handler(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 153 handle_simple_irq); 154 155 serio_register_port(ams_delta_serio);
+1 -1
drivers/input/touchscreen/mainstone-wm97xx.c
··· 219 } 220 221 wm->pen_irq = gpio_to_irq(irq); 222 - set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH); 223 } else /* pen irq not supported */ 224 pen_int = 0; 225
··· 219 } 220 221 wm->pen_irq = gpio_to_irq(irq); 222 + irq_set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH); 223 } else /* pen irq not supported */ 224 pen_int = 0; 225
+1 -1
drivers/input/touchscreen/zylonite-wm97xx.c
··· 193 gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26); 194 195 wm->pen_irq = IRQ_GPIO(gpio_touch_irq); 196 - set_irq_type(IRQ_GPIO(gpio_touch_irq), IRQ_TYPE_EDGE_BOTH); 197 198 wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, 199 WM97XX_GPIO_POL_HIGH,
··· 193 gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26); 194 195 wm->pen_irq = IRQ_GPIO(gpio_touch_irq); 196 + irq_set_irq_type(IRQ_GPIO(gpio_touch_irq), IRQ_TYPE_EDGE_BOTH); 197 198 wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, 199 WM97XX_GPIO_POL_HIGH,
+1 -1
drivers/misc/sgi-gru/grufile.c
··· 373 374 if (gru_irq_count[chiplet] == 0) { 375 gru_chip[chiplet].name = irq_name; 376 - ret = set_irq_chip(irq, &gru_chip[chiplet]); 377 if (ret) { 378 printk(KERN_ERR "%s: set_irq_chip failed, errno=%d\n", 379 GRU_DRIVER_ID_STR, -ret);
··· 373 374 if (gru_irq_count[chiplet] == 0) { 375 gru_chip[chiplet].name = irq_name; 376 + ret = irq_set_chip(irq, &gru_chip[chiplet]); 377 if (ret) { 378 printk(KERN_ERR "%s: set_irq_chip failed, errno=%d\n", 379 GRU_DRIVER_ID_STR, -ret);
+1 -1
drivers/mmc/host/sdhci-spear.c
··· 50 /* val == 1 -> card removed, val == 0 -> card inserted */ 51 /* if card removed - set irq for low level, else vice versa */ 52 gpio_irq_type = val ? IRQF_TRIGGER_LOW : IRQF_TRIGGER_HIGH; 53 - set_irq_type(irq, gpio_irq_type); 54 55 if (sdhci->data->card_power_gpio >= 0) { 56 if (!sdhci->data->power_always_enb) {
··· 50 /* val == 1 -> card removed, val == 0 -> card inserted */ 51 /* if card removed - set irq for low level, else vice versa */ 52 gpio_irq_type = val ? IRQF_TRIGGER_LOW : IRQF_TRIGGER_HIGH; 53 + irq_set_irq_type(irq, gpio_irq_type); 54 55 if (sdhci->data->card_power_gpio >= 0) { 56 if (!sdhci->data->power_always_enb) {
+4 -4
drivers/net/dm9000.c
··· 621 /* change in wol state, update IRQ state */ 622 623 if (!dm->wake_state) 624 - set_irq_wake(dm->irq_wake, 1); 625 else if (dm->wake_state & !opts) 626 - set_irq_wake(dm->irq_wake, 0); 627 } 628 629 dm->wake_state = opts; ··· 1424 } else { 1425 1426 /* test to see if irq is really wakeup capable */ 1427 - ret = set_irq_wake(db->irq_wake, 1); 1428 if (ret) { 1429 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n", 1430 db->irq_wake, ret); 1431 ret = 0; 1432 } else { 1433 - set_irq_wake(db->irq_wake, 0); 1434 db->wake_supported = 1; 1435 } 1436 }
··· 621 /* change in wol state, update IRQ state */ 622 623 if (!dm->wake_state) 624 + irq_set_irq_wake(dm->irq_wake, 1); 625 else if (dm->wake_state & !opts) 626 + irq_set_irq_wake(dm->irq_wake, 0); 627 } 628 629 dm->wake_state = opts; ··· 1424 } else { 1425 1426 /* test to see if irq is really wakeup capable */ 1427 + ret = irq_set_irq_wake(db->irq_wake, 1); 1428 if (ret) { 1429 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n", 1430 db->irq_wake, ret); 1431 ret = 0; 1432 } else { 1433 + irq_set_irq_wake(db->irq_wake, 0); 1434 db->wake_supported = 1; 1435 } 1436 }
+1 -2
drivers/net/wireless/p54/p54spi.c
··· 649 goto err_free_common; 650 } 651 652 - set_irq_type(gpio_to_irq(p54spi_gpio_irq), 653 - IRQ_TYPE_EDGE_RISING); 654 655 disable_irq(gpio_to_irq(p54spi_gpio_irq)); 656
··· 649 goto err_free_common; 650 } 651 652 + irq_set_irq_type(gpio_to_irq(p54spi_gpio_irq), IRQ_TYPE_EDGE_RISING); 653 654 disable_irq(gpio_to_irq(p54spi_gpio_irq)); 655
+1 -1
drivers/net/wireless/wl1251/sdio.c
··· 265 goto disable; 266 } 267 268 - set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); 269 disable_irq(wl->irq); 270 271 wl1251_sdio_ops.enable_irq = wl1251_enable_line_irq;
··· 265 goto disable; 266 } 267 268 + irq_set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); 269 disable_irq(wl->irq); 270 271 wl1251_sdio_ops.enable_irq = wl1251_enable_line_irq;
+1 -1
drivers/net/wireless/wl1251/spi.c
··· 286 goto out_free; 287 } 288 289 - set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); 290 291 disable_irq(wl->irq); 292
··· 286 goto out_free; 287 } 288 289 + irq_set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); 290 291 disable_irq(wl->irq); 292
+6 -6
drivers/pci/dmar.c
··· 1226 1227 void dmar_msi_unmask(struct irq_data *data) 1228 { 1229 - struct intel_iommu *iommu = irq_data_get_irq_data(data); 1230 unsigned long flag; 1231 1232 /* unmask it */ ··· 1240 void dmar_msi_mask(struct irq_data *data) 1241 { 1242 unsigned long flag; 1243 - struct intel_iommu *iommu = irq_data_get_irq_data(data); 1244 1245 /* mask it */ 1246 spin_lock_irqsave(&iommu->register_lock, flag); ··· 1252 1253 void dmar_msi_write(int irq, struct msi_msg *msg) 1254 { 1255 - struct intel_iommu *iommu = get_irq_data(irq); 1256 unsigned long flag; 1257 1258 spin_lock_irqsave(&iommu->register_lock, flag); ··· 1264 1265 void dmar_msi_read(int irq, struct msi_msg *msg) 1266 { 1267 - struct intel_iommu *iommu = get_irq_data(irq); 1268 unsigned long flag; 1269 1270 spin_lock_irqsave(&iommu->register_lock, flag); ··· 1382 return -EINVAL; 1383 } 1384 1385 - set_irq_data(irq, iommu); 1386 iommu->irq = irq; 1387 1388 ret = arch_setup_dmar_msi(irq); 1389 if (ret) { 1390 - set_irq_data(irq, NULL); 1391 iommu->irq = 0; 1392 destroy_irq(irq); 1393 return ret;
··· 1226 1227 void dmar_msi_unmask(struct irq_data *data) 1228 { 1229 + struct intel_iommu *iommu = irq_data_get_irq_handler_data(data); 1230 unsigned long flag; 1231 1232 /* unmask it */ ··· 1240 void dmar_msi_mask(struct irq_data *data) 1241 { 1242 unsigned long flag; 1243 + struct intel_iommu *iommu = irq_data_get_irq_handler_data(data); 1244 1245 /* mask it */ 1246 spin_lock_irqsave(&iommu->register_lock, flag); ··· 1252 1253 void dmar_msi_write(int irq, struct msi_msg *msg) 1254 { 1255 + struct intel_iommu *iommu = irq_get_handler_data(irq); 1256 unsigned long flag; 1257 1258 spin_lock_irqsave(&iommu->register_lock, flag); ··· 1264 1265 void dmar_msi_read(int irq, struct msi_msg *msg) 1266 { 1267 + struct intel_iommu *iommu = irq_get_handler_data(irq); 1268 unsigned long flag; 1269 1270 spin_lock_irqsave(&iommu->register_lock, flag); ··· 1382 return -EINVAL; 1383 } 1384 1385 + irq_set_handler_data(irq, iommu); 1386 iommu->irq = irq; 1387 1388 ret = arch_setup_dmar_msi(irq); 1389 if (ret) { 1390 + irq_set_handler_data(irq, NULL); 1391 iommu->irq = 0; 1392 destroy_irq(irq); 1393 return ret;
+8 -8
drivers/pci/htirq.c
··· 34 35 void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) 36 { 37 - struct ht_irq_cfg *cfg = get_irq_data(irq); 38 unsigned long flags; 39 spin_lock_irqsave(&ht_irq_lock, flags); 40 if (cfg->msg.address_lo != msg->address_lo) { ··· 53 54 void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) 55 { 56 - struct ht_irq_cfg *cfg = get_irq_data(irq); 57 *msg = cfg->msg; 58 } 59 60 void mask_ht_irq(struct irq_data *data) 61 { 62 - struct ht_irq_cfg *cfg = irq_data_get_irq_data(data); 63 struct ht_irq_msg msg = cfg->msg; 64 65 msg.address_lo |= 1; ··· 68 69 void unmask_ht_irq(struct irq_data *data) 70 { 71 - struct ht_irq_cfg *cfg = irq_data_get_irq_data(data); 72 struct ht_irq_msg msg = cfg->msg; 73 74 msg.address_lo &= ~1; ··· 126 kfree(cfg); 127 return -EBUSY; 128 } 129 - set_irq_data(irq, cfg); 130 131 if (arch_setup_ht_irq(irq, dev) < 0) { 132 ht_destroy_irq(irq); ··· 162 { 163 struct ht_irq_cfg *cfg; 164 165 - cfg = get_irq_data(irq); 166 - set_irq_chip(irq, NULL); 167 - set_irq_data(irq, NULL); 168 destroy_irq(irq); 169 170 kfree(cfg);
··· 34 35 void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) 36 { 37 + struct ht_irq_cfg *cfg = irq_get_handler_data(irq); 38 unsigned long flags; 39 spin_lock_irqsave(&ht_irq_lock, flags); 40 if (cfg->msg.address_lo != msg->address_lo) { ··· 53 54 void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) 55 { 56 + struct ht_irq_cfg *cfg = irq_get_handler_data(irq); 57 *msg = cfg->msg; 58 } 59 60 void mask_ht_irq(struct irq_data *data) 61 { 62 + struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data); 63 struct ht_irq_msg msg = cfg->msg; 64 65 msg.address_lo |= 1; ··· 68 69 void unmask_ht_irq(struct irq_data *data) 70 { 71 + struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data); 72 struct ht_irq_msg msg = cfg->msg; 73 74 msg.address_lo &= ~1; ··· 126 kfree(cfg); 127 return -EBUSY; 128 } 129 + irq_set_handler_data(irq, cfg); 130 131 if (arch_setup_ht_irq(irq, dev) < 0) { 132 ht_destroy_irq(irq); ··· 162 { 163 struct ht_irq_cfg *cfg; 164 165 + cfg = irq_get_handler_data(irq); 166 + irq_set_chip(irq, NULL); 167 + irq_set_handler_data(irq, NULL); 168 destroy_irq(irq); 169 170 kfree(cfg);
+1 -1
drivers/pci/intel-iommu.c
··· 1206 iommu_disable_translation(iommu); 1207 1208 if (iommu->irq) { 1209 - set_irq_data(iommu->irq, NULL); 1210 /* This will mask the irq */ 1211 free_irq(iommu->irq, iommu); 1212 destroy_irq(iommu->irq);
··· 1206 iommu_disable_translation(iommu); 1207 1208 if (iommu->irq) { 1209 + irq_set_handler_data(iommu->irq, NULL); 1210 /* This will mask the irq */ 1211 free_irq(iommu->irq, iommu); 1212 destroy_irq(iommu->irq);
+1 -1
drivers/pci/intr_remapping.c
··· 50 51 static struct irq_2_iommu *irq_2_iommu(unsigned int irq) 52 { 53 - struct irq_cfg *cfg = get_irq_chip_data(irq); 54 return cfg ? &cfg->irq_2_iommu : NULL; 55 } 56
··· 50 51 static struct irq_2_iommu *irq_2_iommu(unsigned int irq) 52 { 53 + struct irq_cfg *cfg = irq_get_chip_data(irq); 54 return cfg ? &cfg->irq_2_iommu : NULL; 55 } 56
+5 -5
drivers/pci/msi.c
··· 236 237 void read_msi_msg(unsigned int irq, struct msi_msg *msg) 238 { 239 - struct msi_desc *entry = get_irq_msi(irq); 240 241 __read_msi_msg(entry, msg); 242 } ··· 253 254 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) 255 { 256 - struct msi_desc *entry = get_irq_msi(irq); 257 258 __get_cached_msi_msg(entry, msg); 259 } ··· 297 298 void write_msi_msg(unsigned int irq, struct msi_msg *msg) 299 { 300 - struct msi_desc *entry = get_irq_msi(irq); 301 302 __write_msi_msg(entry, msg); 303 } ··· 354 if (!dev->msi_enabled) 355 return; 356 357 - entry = get_irq_msi(dev->irq); 358 pos = entry->msi_attrib.pos; 359 360 pci_intx_for_msi(dev, 0); ··· 519 PCI_MSIX_ENTRY_VECTOR_CTRL; 520 521 entries[i].vector = entry->irq; 522 - set_irq_msi(entry->irq, entry); 523 entry->masked = readl(entry->mask_base + offset); 524 msix_mask_irq(entry, 1); 525 i++;
··· 236 237 void read_msi_msg(unsigned int irq, struct msi_msg *msg) 238 { 239 + struct msi_desc *entry = irq_get_msi_desc(irq); 240 241 __read_msi_msg(entry, msg); 242 } ··· 253 254 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) 255 { 256 + struct msi_desc *entry = irq_get_msi_desc(irq); 257 258 __get_cached_msi_msg(entry, msg); 259 } ··· 297 298 void write_msi_msg(unsigned int irq, struct msi_msg *msg) 299 { 300 + struct msi_desc *entry = irq_get_msi_desc(irq); 301 302 __write_msi_msg(entry, msg); 303 } ··· 354 if (!dev->msi_enabled) 355 return; 356 357 + entry = irq_get_msi_desc(dev->irq); 358 pos = entry->msi_attrib.pos; 359 360 pci_intx_for_msi(dev, 0); ··· 519 PCI_MSIX_ENTRY_VECTOR_CTRL; 520 521 entries[i].vector = entry->irq; 522 + irq_set_msi_desc(entry->irq, entry); 523 entry->masked = readl(entry->mask_base + offset); 524 msix_mask_irq(entry, 1); 525 i++;
+1 -1
drivers/pcmcia/bfin_cf_pcmcia.c
··· 235 cf->irq = irq; 236 cf->socket.pci_irq = irq; 237 238 - set_irq_type(irq, IRQF_TRIGGER_LOW); 239 240 io_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 241 attr_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
··· 235 cf->irq = irq; 236 cf->socket.pci_irq = irq; 237 238 + irq_set_irq_type(irq, IRQF_TRIGGER_LOW); 239 240 io_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 241 attr_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+1 -1
drivers/pcmcia/db1xxx_ss.c
··· 181 /* all other (older) Db1x00 boards use a GPIO to show 182 * card detection status: use both-edge triggers. 183 */ 184 - set_irq_type(sock->insert_irq, IRQ_TYPE_EDGE_BOTH); 185 ret = request_irq(sock->insert_irq, db1000_pcmcia_cdirq, 186 0, "pcmcia_carddetect", sock); 187
··· 181 /* all other (older) Db1x00 boards use a GPIO to show 182 * card detection status: use both-edge triggers. 183 */ 184 + irq_set_irq_type(sock->insert_irq, IRQ_TYPE_EDGE_BOTH); 185 ret = request_irq(sock->insert_irq, db1000_pcmcia_cdirq, 186 0, "pcmcia_carddetect", sock); 187
+1 -1
drivers/pcmcia/sa1100_nanoengine.c
··· 86 GPDR &= ~nano_skts[i].input_pins; 87 GPDR |= nano_skts[i].output_pins; 88 GPCR = nano_skts[i].clear_outputs; 89 - set_irq_type(nano_skts[i].transition_pins, IRQ_TYPE_EDGE_BOTH); 90 skt->socket.pci_irq = nano_skts[i].pci_irq; 91 92 return soc_pcmcia_request_irqs(skt,
··· 86 GPDR &= ~nano_skts[i].input_pins; 87 GPDR |= nano_skts[i].output_pins; 88 GPCR = nano_skts[i].clear_outputs; 89 + irq_set_irq_type(nano_skts[i].transition_pins, IRQ_TYPE_EDGE_BOTH); 90 skt->socket.pci_irq = nano_skts[i].pci_irq; 91 92 return soc_pcmcia_request_irqs(skt,
+7 -7
drivers/pcmcia/soc_common.c
··· 155 */ 156 if (skt->irq_state != 1 && state->io_irq) { 157 skt->irq_state = 1; 158 - set_irq_type(skt->socket.pci_irq, 159 - IRQ_TYPE_EDGE_FALLING); 160 } else if (skt->irq_state == 1 && state->io_irq == 0) { 161 skt->irq_state = 0; 162 - set_irq_type(skt->socket.pci_irq, IRQ_TYPE_NONE); 163 } 164 165 skt->cs_state = *state; ··· 537 IRQF_DISABLED, irqs[i].str, skt); 538 if (res) 539 break; 540 - set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); 541 } 542 543 if (res) { ··· 570 571 for (i = 0; i < nr; i++) 572 if (irqs[i].sock == skt->nr) 573 - set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); 574 } 575 EXPORT_SYMBOL(soc_pcmcia_disable_irqs); 576 ··· 581 582 for (i = 0; i < nr; i++) 583 if (irqs[i].sock == skt->nr) { 584 - set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_RISING); 585 - set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_BOTH); 586 } 587 } 588 EXPORT_SYMBOL(soc_pcmcia_enable_irqs);
··· 155 */ 156 if (skt->irq_state != 1 && state->io_irq) { 157 skt->irq_state = 1; 158 + irq_set_irq_type(skt->socket.pci_irq, 159 + IRQ_TYPE_EDGE_FALLING); 160 } else if (skt->irq_state == 1 && state->io_irq == 0) { 161 skt->irq_state = 0; 162 + irq_set_irq_type(skt->socket.pci_irq, IRQ_TYPE_NONE); 163 } 164 165 skt->cs_state = *state; ··· 537 IRQF_DISABLED, irqs[i].str, skt); 538 if (res) 539 break; 540 + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); 541 } 542 543 if (res) { ··· 570 571 for (i = 0; i < nr; i++) 572 if (irqs[i].sock == skt->nr) 573 + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); 574 } 575 EXPORT_SYMBOL(soc_pcmcia_disable_irqs); 576 ··· 581 582 for (i = 0; i < nr; i++) 583 if (irqs[i].sock == skt->nr) { 584 + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_RISING); 585 + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_BOTH); 586 } 587 } 588 EXPORT_SYMBOL(soc_pcmcia_enable_irqs);
+1 -1
drivers/pcmcia/xxs1500_ss.c
··· 274 * edge detector. 275 */ 276 irq = gpio_to_irq(GPIO_CDA); 277 - set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); 278 ret = request_irq(irq, cdirq, 0, "pcmcia_carddetect", sock); 279 if (ret) { 280 dev_err(&pdev->dev, "cannot setup cd irq\n");
··· 274 * edge detector. 275 */ 276 irq = gpio_to_irq(GPIO_CDA); 277 + irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); 278 ret = request_irq(irq, cdirq, 0, "pcmcia_carddetect", sock); 279 if (ret) { 280 dev_err(&pdev->dev, "cannot setup cd irq\n");
+5 -3
drivers/platform/x86/intel_pmic_gpio.c
··· 257 } 258 259 for (i = 0; i < 8; i++) { 260 - set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, 261 - handle_simple_irq, "demux"); 262 - set_irq_chip_data(i + pg->irq_base, pg); 263 } 264 return 0; 265 err:
··· 257 } 258 259 for (i = 0; i < 8; i++) { 260 + irq_set_chip_and_handler_name(i + pg->irq_base, 261 + &pmic_irqchip, 262 + handle_simple_irq, 263 + "demux"); 264 + irq_set_chip_data(i + pg->irq_base, pg); 265 } 266 return 0; 267 err:
+2 -2
drivers/power/z2_battery.c
··· 215 if (ret) 216 goto err2; 217 218 - set_irq_type(gpio_to_irq(info->charge_gpio), 219 - IRQ_TYPE_EDGE_BOTH); 220 ret = request_irq(gpio_to_irq(info->charge_gpio), 221 z2_charge_switch_irq, IRQF_DISABLED, 222 "AC Detect", charger);
··· 215 if (ret) 216 goto err2; 217 218 + irq_set_irq_type(gpio_to_irq(info->charge_gpio), 219 + IRQ_TYPE_EDGE_BOTH); 220 ret = request_irq(gpio_to_irq(info->charge_gpio), 221 z2_charge_switch_irq, IRQF_DISABLED, 222 "AC Detect", charger);
+3 -3
drivers/rtc/rtc-sh.c
··· 782 struct platform_device *pdev = to_platform_device(dev); 783 struct sh_rtc *rtc = platform_get_drvdata(pdev); 784 785 - set_irq_wake(rtc->periodic_irq, enabled); 786 787 if (rtc->carry_irq > 0) { 788 - set_irq_wake(rtc->carry_irq, enabled); 789 - set_irq_wake(rtc->alarm_irq, enabled); 790 } 791 } 792
··· 782 struct platform_device *pdev = to_platform_device(dev); 783 struct sh_rtc *rtc = platform_get_drvdata(pdev); 784 785 + irq_set_irq_wake(rtc->periodic_irq, enabled); 786 787 if (rtc->carry_irq > 0) { 788 + irq_set_irq_wake(rtc->carry_irq, enabled); 789 + irq_set_irq_wake(rtc->alarm_irq, enabled); 790 } 791 } 792
+2 -2
drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
··· 341 if (error) 342 return -ENODEV; 343 344 - set_irq_wake(sdhcinfo->oob_irq, 1); 345 sdhcinfo->oob_irq_registered = true; 346 } 347 ··· 352 { 353 SDLX_MSG(("%s: Enter\n", __func__)); 354 355 - set_irq_wake(sdhcinfo->oob_irq, 0); 356 disable_irq(sdhcinfo->oob_irq); /* just in case.. */ 357 free_irq(sdhcinfo->oob_irq, NULL); 358 sdhcinfo->oob_irq_registered = false;
··· 341 if (error) 342 return -ENODEV; 343 344 + irq_set_irq_wake(sdhcinfo->oob_irq, 1); 345 sdhcinfo->oob_irq_registered = true; 346 } 347 ··· 352 { 353 SDLX_MSG(("%s: Enter\n", __func__)); 354 355 + irq_set_irq_wake(sdhcinfo->oob_irq, 0); 356 disable_irq(sdhcinfo->oob_irq); /* just in case.. */ 357 free_irq(sdhcinfo->oob_irq, NULL); 358 sdhcinfo->oob_irq_registered = false;
+1 -1
drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c
··· 597 int result; 598 int irq_pin = AST_INT; 599 600 - set_irq_type(OMAP_GPIO_IRQ(irq_pin), IRQ_TYPE_LEVEL_LOW); 601 602 /* 603 * for shared IRQS must provide non NULL device ptr
··· 597 int result; 598 int irq_pin = AST_INT; 599 600 + irq_set_irq_type(OMAP_GPIO_IRQ(irq_pin), IRQ_TYPE_LEVEL_LOW); 601 602 /* 603 * for shared IRQS must provide non NULL device ptr
+1 -1
drivers/tty/hvc/hvc_xen.c
··· 178 if (xencons_irq < 0) 179 xencons_irq = 0; /* NO_IRQ */ 180 else 181 - set_irq_noprobe(xencons_irq); 182 183 hp = hvc_alloc(HVC_COOKIE, xencons_irq, ops, 256); 184 if (IS_ERR(hp))
··· 178 if (xencons_irq < 0) 179 xencons_irq = 0; /* NO_IRQ */ 180 else 181 + irq_set_noprobe(xencons_irq); 182 183 hp = hvc_alloc(HVC_COOKIE, xencons_irq, ops, 256); 184 if (IS_ERR(hp))
+2 -2
drivers/tty/serial/msm_serial_hs.c
··· 1644 if (unlikely(uport->irq < 0)) 1645 return -ENXIO; 1646 1647 - if (unlikely(set_irq_wake(uport->irq, 1))) 1648 return -ENXIO; 1649 1650 if (pdata == NULL || pdata->rx_wakeup_irq < 0) ··· 1658 if (unlikely(msm_uport->rx_wakeup.irq < 0)) 1659 return -ENXIO; 1660 1661 - if (unlikely(set_irq_wake(msm_uport->rx_wakeup.irq, 1))) 1662 return -ENXIO; 1663 } 1664
··· 1644 if (unlikely(uport->irq < 0)) 1645 return -ENXIO; 1646 1647 + if (unlikely(irq_set_irq_wake(uport->irq, 1))) 1648 return -ENXIO; 1649 1650 if (pdata == NULL || pdata->rx_wakeup_irq < 0) ··· 1658 if (unlikely(msm_uport->rx_wakeup.irq < 0)) 1659 return -ENXIO; 1660 1661 + if (unlikely(irq_set_irq_wake(msm_uport->rx_wakeup.irq, 1))) 1662 return -ENXIO; 1663 } 1664
+1 -1
drivers/usb/host/oxu210hp-hcd.c
··· 3832 return -EBUSY; 3833 } 3834 3835 - ret = set_irq_type(irq, IRQF_TRIGGER_FALLING); 3836 if (ret) { 3837 dev_err(&pdev->dev, "error setting irq type\n"); 3838 ret = -EFAULT;
··· 3832 return -EBUSY; 3833 } 3834 3835 + ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING); 3836 if (ret) { 3837 dev_err(&pdev->dev, "error setting irq type\n"); 3838 ret = -EFAULT;
+1 -1
drivers/usb/musb/tusb6010.c
··· 943 musb_writel(tbase, TUSB_INT_CTRL_CONF, 944 TUSB_INT_CTRL_CONF_INT_RELCYC(0)); 945 946 - set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW); 947 948 /* maybe force into the Default-A OTG state machine */ 949 if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT)
··· 943 musb_writel(tbase, TUSB_INT_CTRL_CONF, 944 TUSB_INT_CTRL_CONF_INT_RELCYC(0)); 945 946 + irq_set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW); 947 948 /* maybe force into the Default-A OTG state machine */ 949 if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT)
+2 -2
drivers/w1/masters/ds1wm.c
··· 368 ds1wm_data->active_high = plat->active_high; 369 370 if (res->flags & IORESOURCE_IRQ_HIGHEDGE) 371 - set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_RISING); 372 if (res->flags & IORESOURCE_IRQ_LOWEDGE) 373 - set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_FALLING); 374 375 ret = request_irq(ds1wm_data->irq, ds1wm_isr, IRQF_DISABLED, 376 "ds1wm", ds1wm_data);
··· 368 ds1wm_data->active_high = plat->active_high; 369 370 if (res->flags & IORESOURCE_IRQ_HIGHEDGE) 371 + irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_RISING); 372 if (res->flags & IORESOURCE_IRQ_LOWEDGE) 373 + irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_FALLING); 374 375 ret = request_irq(ds1wm_data->irq, ds1wm_isr, IRQF_DISABLED, 376 "ds1wm", ds1wm_data);