Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, mce: Don't initialize MCEs on unknown CPUs
x86, mce: don't log boot MCEs on Pentium M (model == 13) CPUs
x86: Annotate section mismatch warnings in kernel/apic/x2apic_uv_x.c
x86, mce: therm_throt: Don't log redundant normality
x86: Fix UV BAU destination subnode id

+25 -8
+1 -1
arch/x86/include/asm/uv/uv_bau.h
··· 133 * see table 4.2.3.0.1 in broacast_assist spec. 134 */ 135 struct bau_msg_header { 136 - unsigned int dest_subnodeid:6; /* must be zero */ 137 /* bits 5:0 */ 138 unsigned int base_dest_nodeid:15; /* nasid>>1 (pnode) of */ 139 /* bits 20:6 */ /* first bit in node_map */
··· 133 * see table 4.2.3.0.1 in broacast_assist spec. 134 */ 135 struct bau_msg_header { 136 + unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ 137 /* bits 5:0 */ 138 unsigned int base_dest_nodeid:15; /* nasid>>1 (pnode) of */ 139 /* bits 20:6 */ /* first bit in node_map */
+2 -2
arch/x86/kernel/apic/x2apic_uv_x.c
··· 46 return node_id.s.node_id; 47 } 48 49 - static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 50 { 51 if (!strcmp(oem_id, "SGI")) { 52 if (!strcmp(oem_table_id, "UVL")) ··· 253 apic_write(APIC_SELF_IPI, vector); 254 } 255 256 - struct apic apic_x2apic_uv_x = { 257 258 .name = "UV large system", 259 .probe = NULL,
··· 46 return node_id.s.node_id; 47 } 48 49 + static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 50 { 51 if (!strcmp(oem_id, "SGI")) { 52 if (!strcmp(oem_table_id, "UVL")) ··· 253 apic_write(APIC_SELF_IPI, vector); 254 } 255 256 + struct apic __refdata apic_x2apic_uv_x = { 257 258 .name = "UV large system", 259 .probe = NULL,
+16 -3
arch/x86/kernel/cpu/mcheck/mce.c
··· 1226 } 1227 1228 /* Add per CPU specific workarounds here */ 1229 - static void mce_cpu_quirks(struct cpuinfo_x86 *c) 1230 { 1231 /* This should be disabled by the BIOS, but isn't always */ 1232 if (c->x86_vendor == X86_VENDOR_AMD) { 1233 if (c->x86 == 15 && banks > 4) { ··· 1278 if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) && 1279 monarch_timeout < 0) 1280 monarch_timeout = USEC_PER_SEC; 1281 } 1282 if (monarch_timeout < 0) 1283 monarch_timeout = 0; 1284 if (mce_bootlog != 0) 1285 mce_panic_timeout = 30; 1286 } 1287 1288 static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c) ··· 1352 if (!mce_available(c)) 1353 return; 1354 1355 - if (mce_cap_init() < 0) { 1356 mce_disabled = 1; 1357 return; 1358 } 1359 - mce_cpu_quirks(c); 1360 1361 machine_check_vector = do_machine_check; 1362
··· 1226 } 1227 1228 /* Add per CPU specific workarounds here */ 1229 + static int mce_cpu_quirks(struct cpuinfo_x86 *c) 1230 { 1231 + if (c->x86_vendor == X86_VENDOR_UNKNOWN) { 1232 + pr_info("MCE: unknown CPU type - not enabling MCE support.\n"); 1233 + return -EOPNOTSUPP; 1234 + } 1235 + 1236 /* This should be disabled by the BIOS, but isn't always */ 1237 if (c->x86_vendor == X86_VENDOR_AMD) { 1238 if (c->x86 == 15 && banks > 4) { ··· 1273 if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) && 1274 monarch_timeout < 0) 1275 monarch_timeout = USEC_PER_SEC; 1276 + 1277 + /* 1278 + * There are also broken BIOSes on some Pentium M and 1279 + * earlier systems: 1280 + */ 1281 + if (c->x86 == 6 && c->x86_model <= 13 && mce_bootlog < 0) 1282 + mce_bootlog = 0; 1283 } 1284 if (monarch_timeout < 0) 1285 monarch_timeout = 0; 1286 if (mce_bootlog != 0) 1287 mce_panic_timeout = 30; 1288 + 1289 + return 0; 1290 } 1291 1292 static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c) ··· 1338 if (!mce_available(c)) 1339 return; 1340 1341 + if (mce_cap_init() < 0 || mce_cpu_quirks(c) < 0) { 1342 mce_disabled = 1; 1343 return; 1344 } 1345 1346 machine_check_vector = do_machine_check; 1347
+5 -2
arch/x86/kernel/cpu/mcheck/therm_throt.c
··· 116 cpu, __get_cpu_var(thermal_throttle_count)); 117 118 add_taint(TAINT_MACHINE_CHECK); 119 - } else if (was_throttled) { 120 printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu); 121 } 122 123 - return 1; 124 } 125 126 #ifdef CONFIG_SYSFS
··· 116 cpu, __get_cpu_var(thermal_throttle_count)); 117 118 add_taint(TAINT_MACHINE_CHECK); 119 + return 1; 120 + } 121 + if (was_throttled) { 122 printk(KERN_INFO "CPU%d: Temperature/speed normal\n", cpu); 123 + return 1; 124 } 125 126 + return 0; 127 } 128 129 #ifdef CONFIG_SYSFS
+1
arch/x86/kernel/tlb_uv.c
··· 744 * note that base_dest_nodeid is actually a nasid. 745 */ 746 ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1; 747 ad2->header.command = UV_NET_ENDPOINT_INTD; 748 ad2->header.int_both = 1; 749 /*
··· 744 * note that base_dest_nodeid is actually a nasid. 745 */ 746 ad2->header.base_dest_nodeid = uv_partition_base_pnode << 1; 747 + ad2->header.dest_subnodeid = 0x10; /* the LB */ 748 ad2->header.command = UV_NET_ENDPOINT_INTD; 749 ad2->header.int_both = 1; 750 /*