Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:
"Some more driver bugfixes for I2C. Including a revert - the updated
series for it will come during the next merge window"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: owl: Clear NACK and BUS error bits
Revert "i2c: imx: Fix reset of I2SR_IAL flag"
i2c: meson: fixup rate calculation with filter delay
i2c: meson: keep peripheral clock enabled
i2c: meson: fix clock setting overwrite
i2c: imx: Fix reset of I2SR_IAL flag

Changed files
+39 -19
drivers
i2c
+33 -19
drivers/i2c/busses/i2c-meson.c
··· 5 5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> 6 6 */ 7 7 8 + #include <linux/bitfield.h> 8 9 #include <linux/clk.h> 9 10 #include <linux/completion.h> 10 11 #include <linux/i2c.h> ··· 34 33 #define REG_CTRL_ACK_IGNORE BIT(1) 35 34 #define REG_CTRL_STATUS BIT(2) 36 35 #define REG_CTRL_ERROR BIT(3) 37 - #define REG_CTRL_CLKDIV_SHIFT 12 38 - #define REG_CTRL_CLKDIV_MASK GENMASK(21, 12) 39 - #define REG_CTRL_CLKDIVEXT_SHIFT 28 40 - #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28) 36 + #define REG_CTRL_CLKDIV GENMASK(21, 12) 37 + #define REG_CTRL_CLKDIVEXT GENMASK(29, 28) 38 + 39 + #define REG_SLV_ADDR GENMASK(7, 0) 40 + #define REG_SLV_SDA_FILTER GENMASK(10, 8) 41 + #define REG_SLV_SCL_FILTER GENMASK(13, 11) 42 + #define REG_SLV_SCL_LOW GENMASK(27, 16) 43 + #define REG_SLV_SCL_LOW_EN BIT(28) 41 44 42 45 #define I2C_TIMEOUT_MS 500 46 + #define FILTER_DELAY 15 43 47 44 48 enum { 45 49 TOKEN_END = 0, ··· 139 133 unsigned long clk_rate = clk_get_rate(i2c->clk); 140 134 unsigned int div; 141 135 142 - div = DIV_ROUND_UP(clk_rate, freq * i2c->data->div_factor); 136 + div = DIV_ROUND_UP(clk_rate, freq); 137 + div -= FILTER_DELAY; 138 + div = DIV_ROUND_UP(div, i2c->data->div_factor); 143 139 144 140 /* clock divider has 12 bits */ 145 - if (div >= (1 << 12)) { 141 + if (div > GENMASK(11, 0)) { 146 142 dev_err(i2c->dev, "requested bus frequency too low\n"); 147 - div = (1 << 12) - 1; 143 + div = GENMASK(11, 0); 148 144 } 149 145 150 - meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, 151 - (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); 146 + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV, 147 + FIELD_PREP(REG_CTRL_CLKDIV, div & GENMASK(9, 0))); 152 148 153 - meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK, 154 - (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); 149 + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT, 150 + FIELD_PREP(REG_CTRL_CLKDIVEXT, div >> 10)); 151 + 152 + /* Disable HIGH/LOW mode */ 153 + meson_i2c_set_mask(i2c, REG_SLAVE_ADDR, REG_SLV_SCL_LOW_EN, 0); 155 154 156 155 dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__, 157 156 clk_rate, freq, div); ··· 291 280 token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ : 292 281 TOKEN_SLAVE_ADDR_WRITE; 293 282 294 - writel(msg->addr << 1, i2c->regs + REG_SLAVE_ADDR); 283 + 284 + meson_i2c_set_mask(i2c, REG_SLAVE_ADDR, REG_SLV_ADDR, 285 + FIELD_PREP(REG_SLV_ADDR, msg->addr << 1)); 286 + 295 287 meson_i2c_add_token(i2c, TOKEN_START); 296 288 meson_i2c_add_token(i2c, token); 297 289 } ··· 371 357 struct meson_i2c *i2c = adap->algo_data; 372 358 int i, ret = 0; 373 359 374 - clk_enable(i2c->clk); 375 - 376 360 for (i = 0; i < num; i++) { 377 361 ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1, atomic); 378 362 if (ret) 379 363 break; 380 364 } 381 - 382 - clk_disable(i2c->clk); 383 365 384 366 return ret ?: i; 385 367 } ··· 445 435 return ret; 446 436 } 447 437 448 - ret = clk_prepare(i2c->clk); 438 + ret = clk_prepare_enable(i2c->clk); 449 439 if (ret < 0) { 450 440 dev_err(&pdev->dev, "can't prepare clock\n"); 451 441 return ret; ··· 467 457 468 458 ret = i2c_add_adapter(&i2c->adap); 469 459 if (ret < 0) { 470 - clk_unprepare(i2c->clk); 460 + clk_disable_unprepare(i2c->clk); 471 461 return ret; 472 462 } 463 + 464 + /* Disable filtering */ 465 + meson_i2c_set_mask(i2c, REG_SLAVE_ADDR, 466 + REG_SLV_SDA_FILTER | REG_SLV_SCL_FILTER, 0); 473 467 474 468 meson_i2c_set_clk_div(i2c, timings.bus_freq_hz); 475 469 ··· 485 471 struct meson_i2c *i2c = platform_get_drvdata(pdev); 486 472 487 473 i2c_del_adapter(&i2c->adap); 488 - clk_unprepare(i2c->clk); 474 + clk_disable_unprepare(i2c->clk); 489 475 490 476 return 0; 491 477 }
+6
drivers/i2c/busses/i2c-owl.c
··· 176 176 fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT); 177 177 if (fifostat & OWL_I2C_FIFOSTAT_RNB) { 178 178 i2c_dev->err = -ENXIO; 179 + /* Clear NACK error bit by writing "1" */ 180 + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOSTAT, 181 + OWL_I2C_FIFOSTAT_RNB, true); 179 182 goto stop; 180 183 } 181 184 ··· 186 183 stat = readl(i2c_dev->base + OWL_I2C_REG_STAT); 187 184 if (stat & OWL_I2C_STAT_BEB) { 188 185 i2c_dev->err = -EIO; 186 + /* Clear BUS error bit by writing "1" */ 187 + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT, 188 + OWL_I2C_STAT_BEB, true); 189 189 goto stop; 190 190 } 191 191