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Documentation: dt: arc: fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
authored by
Eric Engestrom
and committed by
Vineet Gupta
da67e68c
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Documentation/devicetree/bindings/arc/archs-pct.txt
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The ARC HS can be configured with a pipeline performance monitor for counting
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CPU and cache events like cache misses and hits. Like conventional PCT there
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are 100+ hardware conditions dynamically mapped to upto 32 counters.
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are 100+ hardware conditions dynamically mapped to up to 32 counters.
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It also supports overflow interrupts.
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Required properties:
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Documentation/devicetree/bindings/arc/pct.txt
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The ARC700 can be configured with a pipeline performance monitor for counting
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CPU and cache events like cache misses and hits. Like conventional PCT there
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are 100+ hardware conditions dynamically mapped to upto 32 counters
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are 100+ hardware conditions dynamically mapped to up to 32 counters
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Note that:
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* The ARC 700 PCT does not support interrupts; although HW events may be