Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: am437x: Move l4 child devices to probe them with ti-sysc

With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to
their proper location and enable probing using ti-sysc.

In general the first child device address range starts at range 0
from the ti-sysc interconnect target so the move involves adjusting
the child device reg properties for that.

In case of any regressions, problem devices can be reverted to probe
with legacy platform data as needed by moving them back and removing
the related interconnect target module node.

Note that we are not yet moving dss or wkup_m3, those will be moved
later after some related driver changes.

Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

+858 -883
+7 -869
arch/arm/boot/dts/am4372.dtsi
··· 8 8 * kind, whether express or implied. 9 9 */ 10 10 11 + #include <dt-bindings/bus/ti-sysc.h> 11 12 #include <dt-bindings/gpio/gpio.h> 12 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 14 #include <dt-bindings/clock/am4.h> ··· 160 159 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 161 160 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 162 161 163 - l4_wkup: l4_wkup@44c00000 { 164 - compatible = "ti,am4-l4-wkup", "simple-bus"; 165 - #address-cells = <1>; 166 - #size-cells = <1>; 167 - ranges = <0 0x44c00000 0x287000>; 168 - 162 + l4_wkup: interconnect@44c00000 { 169 163 wkup_m3: wkup_m3@100000 { 170 164 compatible = "ti,am4372-wkup-m3"; 171 165 reg = <0x100000 0x4000>, ··· 169 173 ti,hwmods = "wkup_m3"; 170 174 ti,pm-firmware = "am335x-pm-firmware.elf"; 171 175 }; 172 - 173 - prcm: prcm@1f0000 { 174 - compatible = "ti,am4-prcm", "simple-bus"; 175 - reg = <0x1f0000 0x11000>; 176 - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 177 - #address-cells = <1>; 178 - #size-cells = <1>; 179 - ranges = <0 0x1f0000 0x11000>; 180 - 181 - prcm_clocks: clocks { 182 - #address-cells = <1>; 183 - #size-cells = <0>; 184 - }; 185 - 186 - prcm_clockdomains: clockdomains { 187 - }; 188 - }; 189 - 190 - scm: scm@210000 { 191 - compatible = "ti,am4-scm", "simple-bus"; 192 - reg = <0x210000 0x4000>; 193 - #address-cells = <1>; 194 - #size-cells = <1>; 195 - ranges = <0 0x210000 0x4000>; 196 - 197 - am43xx_pinmux: pinmux@800 { 198 - compatible = "ti,am437-padconf", 199 - "pinctrl-single"; 200 - reg = <0x800 0x31c>; 201 - #address-cells = <1>; 202 - #size-cells = <0>; 203 - #pinctrl-cells = <1>; 204 - #interrupt-cells = <1>; 205 - interrupt-controller; 206 - pinctrl-single,register-width = <32>; 207 - pinctrl-single,function-mask = <0xffffffff>; 208 - }; 209 - 210 - scm_conf: scm_conf@0 { 211 - compatible = "syscon"; 212 - reg = <0x0 0x800>; 213 - #address-cells = <1>; 214 - #size-cells = <1>; 215 - 216 - scm_clocks: clocks { 217 - #address-cells = <1>; 218 - #size-cells = <0>; 219 - }; 220 - }; 221 - 222 - wkup_m3_ipc: wkup_m3_ipc@1324 { 223 - compatible = "ti,am4372-wkup-m3-ipc"; 224 - reg = <0x1324 0x44>; 225 - interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 226 - ti,rproc = <&wkup_m3>; 227 - mboxes = <&mailbox &mbox_wkupm3>; 228 - }; 229 - 230 - edma_xbar: dma-router@f90 { 231 - compatible = "ti,am335x-edma-crossbar"; 232 - reg = <0xf90 0x40>; 233 - #dma-cells = <3>; 234 - dma-requests = <64>; 235 - dma-masters = <&edma>; 236 - }; 237 - 238 - scm_clockdomains: clockdomains { 239 - }; 240 - }; 176 + }; 177 + l4_per: interconnect@48000000 { 178 + }; 179 + l4_fast: interconnect@4a000000 { 241 180 }; 242 181 243 182 emif: emif@4c000000 { ··· 228 297 interrupt-names = "edma3_tcerrint"; 229 298 }; 230 299 231 - uart0: serial@44e09000 { 232 - compatible = "ti,am4372-uart","ti,omap2-uart"; 233 - reg = <0x44e09000 0x2000>; 234 - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 235 - ti,hwmods = "uart1"; 236 - }; 237 - 238 - uart1: serial@48022000 { 239 - compatible = "ti,am4372-uart","ti,omap2-uart"; 240 - reg = <0x48022000 0x2000>; 241 - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 242 - ti,hwmods = "uart2"; 243 - status = "disabled"; 244 - }; 245 - 246 - uart2: serial@48024000 { 247 - compatible = "ti,am4372-uart","ti,omap2-uart"; 248 - reg = <0x48024000 0x2000>; 249 - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 250 - ti,hwmods = "uart3"; 251 - status = "disabled"; 252 - }; 253 - 254 - uart3: serial@481a6000 { 255 - compatible = "ti,am4372-uart","ti,omap2-uart"; 256 - reg = <0x481a6000 0x2000>; 257 - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 258 - ti,hwmods = "uart4"; 259 - status = "disabled"; 260 - }; 261 - 262 - uart4: serial@481a8000 { 263 - compatible = "ti,am4372-uart","ti,omap2-uart"; 264 - reg = <0x481a8000 0x2000>; 265 - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 266 - ti,hwmods = "uart5"; 267 - status = "disabled"; 268 - }; 269 - 270 - uart5: serial@481aa000 { 271 - compatible = "ti,am4372-uart","ti,omap2-uart"; 272 - reg = <0x481aa000 0x2000>; 273 - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 274 - ti,hwmods = "uart6"; 275 - status = "disabled"; 276 - }; 277 - 278 - mailbox: mailbox@480c8000 { 279 - compatible = "ti,omap4-mailbox"; 280 - reg = <0x480C8000 0x200>; 281 - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 282 - ti,hwmods = "mailbox"; 283 - #mbox-cells = <1>; 284 - ti,mbox-num-users = <4>; 285 - ti,mbox-num-fifos = <8>; 286 - mbox_wkupm3: wkup_m3 { 287 - ti,mbox-send-noirq; 288 - ti,mbox-tx = <0 0 0>; 289 - ti,mbox-rx = <0 0 3>; 290 - }; 291 - }; 292 - 293 - timer1: timer@44e31000 { 294 - compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 295 - reg = <0x44e31000 0x400>; 296 - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 297 - ti,timer-alwon; 298 - ti,hwmods = "timer1"; 299 - clocks = <&timer1_fck>; 300 - clock-names = "fck"; 301 - }; 302 - 303 - timer2: timer@48040000 { 304 - compatible = "ti,am4372-timer","ti,am335x-timer"; 305 - reg = <0x48040000 0x400>; 306 - interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 307 - ti,hwmods = "timer2"; 308 - clocks = <&timer2_fck>; 309 - clock-names = "fck"; 310 - }; 311 - 312 - timer3: timer@48042000 { 313 - compatible = "ti,am4372-timer","ti,am335x-timer"; 314 - reg = <0x48042000 0x400>; 315 - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 316 - ti,hwmods = "timer3"; 317 - status = "disabled"; 318 - }; 319 - 320 - timer4: timer@48044000 { 321 - compatible = "ti,am4372-timer","ti,am335x-timer"; 322 - reg = <0x48044000 0x400>; 323 - interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 324 - ti,timer-pwm; 325 - ti,hwmods = "timer4"; 326 - status = "disabled"; 327 - }; 328 - 329 - timer5: timer@48046000 { 330 - compatible = "ti,am4372-timer","ti,am335x-timer"; 331 - reg = <0x48046000 0x400>; 332 - interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 333 - ti,timer-pwm; 334 - ti,hwmods = "timer5"; 335 - status = "disabled"; 336 - }; 337 - 338 - timer6: timer@48048000 { 339 - compatible = "ti,am4372-timer","ti,am335x-timer"; 340 - reg = <0x48048000 0x400>; 341 - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 342 - ti,timer-pwm; 343 - ti,hwmods = "timer6"; 344 - status = "disabled"; 345 - }; 346 - 347 - timer7: timer@4804a000 { 348 - compatible = "ti,am4372-timer","ti,am335x-timer"; 349 - reg = <0x4804a000 0x400>; 350 - interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 351 - ti,timer-pwm; 352 - ti,hwmods = "timer7"; 353 - status = "disabled"; 354 - }; 355 - 356 - timer8: timer@481c1000 { 357 - compatible = "ti,am4372-timer","ti,am335x-timer"; 358 - reg = <0x481c1000 0x400>; 359 - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 360 - ti,hwmods = "timer8"; 361 - status = "disabled"; 362 - }; 363 - 364 - timer9: timer@4833d000 { 365 - compatible = "ti,am4372-timer","ti,am335x-timer"; 366 - reg = <0x4833d000 0x400>; 367 - interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 368 - ti,hwmods = "timer9"; 369 - status = "disabled"; 370 - }; 371 - 372 - timer10: timer@4833f000 { 373 - compatible = "ti,am4372-timer","ti,am335x-timer"; 374 - reg = <0x4833f000 0x400>; 375 - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 376 - ti,hwmods = "timer10"; 377 - status = "disabled"; 378 - }; 379 - 380 - timer11: timer@48341000 { 381 - compatible = "ti,am4372-timer","ti,am335x-timer"; 382 - reg = <0x48341000 0x400>; 383 - interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 384 - ti,hwmods = "timer11"; 385 - status = "disabled"; 386 - }; 387 - 388 - counter32k: counter@44e86000 { 389 - compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 390 - reg = <0x44e86000 0x40>; 391 - ti,hwmods = "counter_32k"; 392 - }; 393 - 394 - rtc: rtc@44e3e000 { 395 - compatible = "ti,am4372-rtc", "ti,am3352-rtc", 396 - "ti,da830-rtc"; 397 - reg = <0x44e3e000 0x1000>; 398 - interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 399 - GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 400 - ti,hwmods = "rtc"; 401 - clocks = <&clk_32768_ck>; 402 - clock-names = "int-clk"; 403 - system-power-controller; 404 - status = "disabled"; 405 - }; 406 - 407 - wdt: wdt@44e35000 { 408 - compatible = "ti,am4372-wdt","ti,omap3-wdt"; 409 - reg = <0x44e35000 0x1000>; 410 - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 411 - ti,hwmods = "wd_timer2"; 412 - }; 413 - 414 - gpio0: gpio@44e07000 { 415 - compatible = "ti,am4372-gpio","ti,omap4-gpio"; 416 - reg = <0x44e07000 0x1000>; 417 - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 418 - gpio-controller; 419 - #gpio-cells = <2>; 420 - interrupt-controller; 421 - #interrupt-cells = <2>; 422 - ti,hwmods = "gpio1"; 423 - status = "disabled"; 424 - }; 425 - 426 - gpio1: gpio@4804c000 { 427 - compatible = "ti,am4372-gpio","ti,omap4-gpio"; 428 - reg = <0x4804c000 0x1000>; 429 - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 430 - gpio-controller; 431 - #gpio-cells = <2>; 432 - interrupt-controller; 433 - #interrupt-cells = <2>; 434 - ti,hwmods = "gpio2"; 435 - status = "disabled"; 436 - }; 437 - 438 - gpio2: gpio@481ac000 { 439 - compatible = "ti,am4372-gpio","ti,omap4-gpio"; 440 - reg = <0x481ac000 0x1000>; 441 - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 442 - gpio-controller; 443 - #gpio-cells = <2>; 444 - interrupt-controller; 445 - #interrupt-cells = <2>; 446 - ti,hwmods = "gpio3"; 447 - status = "disabled"; 448 - }; 449 - 450 - gpio3: gpio@481ae000 { 451 - compatible = "ti,am4372-gpio","ti,omap4-gpio"; 452 - reg = <0x481ae000 0x1000>; 453 - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 454 - gpio-controller; 455 - #gpio-cells = <2>; 456 - interrupt-controller; 457 - #interrupt-cells = <2>; 458 - ti,hwmods = "gpio4"; 459 - status = "disabled"; 460 - }; 461 - 462 - gpio4: gpio@48320000 { 463 - compatible = "ti,am4372-gpio","ti,omap4-gpio"; 464 - reg = <0x48320000 0x1000>; 465 - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 466 - gpio-controller; 467 - #gpio-cells = <2>; 468 - interrupt-controller; 469 - #interrupt-cells = <2>; 470 - ti,hwmods = "gpio5"; 471 - status = "disabled"; 472 - }; 473 - 474 - gpio5: gpio@48322000 { 475 - compatible = "ti,am4372-gpio","ti,omap4-gpio"; 476 - reg = <0x48322000 0x1000>; 477 - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 478 - gpio-controller; 479 - #gpio-cells = <2>; 480 - interrupt-controller; 481 - #interrupt-cells = <2>; 482 - ti,hwmods = "gpio6"; 483 - status = "disabled"; 484 - }; 485 - 486 - hwspinlock: spinlock@480ca000 { 487 - compatible = "ti,omap4-hwspinlock"; 488 - reg = <0x480ca000 0x1000>; 489 - ti,hwmods = "spinlock"; 490 - #hwlock-cells = <1>; 491 - }; 492 - 493 - i2c0: i2c@44e0b000 { 494 - compatible = "ti,am4372-i2c","ti,omap4-i2c"; 495 - reg = <0x44e0b000 0x1000>; 496 - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 497 - ti,hwmods = "i2c1"; 498 - #address-cells = <1>; 499 - #size-cells = <0>; 500 - status = "disabled"; 501 - }; 502 - 503 - i2c1: i2c@4802a000 { 504 - compatible = "ti,am4372-i2c","ti,omap4-i2c"; 505 - reg = <0x4802a000 0x1000>; 506 - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 507 - ti,hwmods = "i2c2"; 508 - #address-cells = <1>; 509 - #size-cells = <0>; 510 - status = "disabled"; 511 - }; 512 - 513 - i2c2: i2c@4819c000 { 514 - compatible = "ti,am4372-i2c","ti,omap4-i2c"; 515 - reg = <0x4819c000 0x1000>; 516 - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 517 - ti,hwmods = "i2c3"; 518 - #address-cells = <1>; 519 - #size-cells = <0>; 520 - status = "disabled"; 521 - }; 522 - 523 - spi0: spi@48030000 { 524 - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 525 - reg = <0x48030000 0x400>; 526 - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 527 - ti,hwmods = "spi0"; 528 - #address-cells = <1>; 529 - #size-cells = <0>; 530 - status = "disabled"; 531 - }; 532 - 533 - mmc1: mmc@48060000 { 534 - compatible = "ti,omap4-hsmmc"; 535 - reg = <0x48060000 0x1000>; 536 - ti,hwmods = "mmc1"; 537 - ti,dual-volt; 538 - ti,needs-special-reset; 539 - dmas = <&edma 24 0>, 540 - <&edma 25 0>; 541 - dma-names = "tx", "rx"; 542 - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 543 - status = "disabled"; 544 - }; 545 - 546 - mmc2: mmc@481d8000 { 547 - compatible = "ti,omap4-hsmmc"; 548 - reg = <0x481d8000 0x1000>; 549 - ti,hwmods = "mmc2"; 550 - ti,needs-special-reset; 551 - dmas = <&edma 2 0>, 552 - <&edma 3 0>; 553 - dma-names = "tx", "rx"; 554 - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 555 - status = "disabled"; 556 - }; 557 - 558 300 mmc3: mmc@47810000 { 559 301 compatible = "ti,omap4-hsmmc"; 560 302 reg = <0x47810000 0x1000>; ··· 235 631 ti,needs-special-reset; 236 632 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 237 633 status = "disabled"; 238 - }; 239 - 240 - spi1: spi@481a0000 { 241 - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 242 - reg = <0x481a0000 0x400>; 243 - interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 244 - ti,hwmods = "spi1"; 245 - #address-cells = <1>; 246 - #size-cells = <0>; 247 - status = "disabled"; 248 - }; 249 - 250 - spi2: spi@481a2000 { 251 - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 252 - reg = <0x481a2000 0x400>; 253 - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 254 - ti,hwmods = "spi2"; 255 - #address-cells = <1>; 256 - #size-cells = <0>; 257 - status = "disabled"; 258 - }; 259 - 260 - spi3: spi@481a4000 { 261 - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 262 - reg = <0x481a4000 0x400>; 263 - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 264 - ti,hwmods = "spi3"; 265 - #address-cells = <1>; 266 - #size-cells = <0>; 267 - status = "disabled"; 268 - }; 269 - 270 - spi4: spi@48345000 { 271 - compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 272 - reg = <0x48345000 0x400>; 273 - interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 274 - ti,hwmods = "spi4"; 275 - #address-cells = <1>; 276 - #size-cells = <0>; 277 - status = "disabled"; 278 - }; 279 - 280 - mac: ethernet@4a100000 { 281 - compatible = "ti,am4372-cpsw","ti,cpsw"; 282 - reg = <0x4a100000 0x800 283 - 0x4a101200 0x100>; 284 - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 285 - GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 286 - GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 287 - GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 288 - #address-cells = <1>; 289 - #size-cells = <1>; 290 - ti,hwmods = "cpgmac0"; 291 - clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, 292 - <&dpll_clksel_mac_clk>; 293 - clock-names = "fck", "cpts", "50mclk"; 294 - assigned-clocks = <&dpll_clksel_mac_clk>; 295 - assigned-clock-rates = <50000000>; 296 - status = "disabled"; 297 - cpdma_channels = <8>; 298 - ale_entries = <1024>; 299 - bd_ram_size = <0x2000>; 300 - mac_control = <0x20>; 301 - slaves = <2>; 302 - active_slave = <0>; 303 - cpts_clock_mult = <0x80000000>; 304 - cpts_clock_shift = <29>; 305 - ranges; 306 - syscon = <&scm_conf>; 307 - 308 - davinci_mdio: mdio@4a101000 { 309 - compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio"; 310 - reg = <0x4a101000 0x100>; 311 - #address-cells = <1>; 312 - #size-cells = <0>; 313 - ti,hwmods = "davinci_mdio"; 314 - bus_freq = <1000000>; 315 - status = "disabled"; 316 - }; 317 - 318 - cpsw_emac0: slave@4a100200 { 319 - /* Filled in by U-Boot */ 320 - mac-address = [ 00 00 00 00 00 00 ]; 321 - }; 322 - 323 - cpsw_emac1: slave@4a100300 { 324 - /* Filled in by U-Boot */ 325 - mac-address = [ 00 00 00 00 00 00 ]; 326 - }; 327 - 328 - phy_sel: cpsw-phy-sel@44e10650 { 329 - compatible = "ti,am43xx-cpsw-phy-sel"; 330 - reg= <0x44e10650 0x4>; 331 - reg-names = "gmii-sel"; 332 - }; 333 - }; 334 - 335 - epwmss0: epwmss@48300000 { 336 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 337 - reg = <0x48300000 0x10>; 338 - #address-cells = <1>; 339 - #size-cells = <1>; 340 - ranges; 341 - ti,hwmods = "epwmss0"; 342 - status = "disabled"; 343 - 344 - ecap0: ecap@48300100 { 345 - compatible = "ti,am4372-ecap", 346 - "ti,am3352-ecap", 347 - "ti,am33xx-ecap"; 348 - #pwm-cells = <3>; 349 - reg = <0x48300100 0x80>; 350 - clocks = <&l4ls_gclk>; 351 - clock-names = "fck"; 352 - status = "disabled"; 353 - }; 354 - 355 - ehrpwm0: pwm@48300200 { 356 - compatible = "ti,am4372-ehrpwm", 357 - "ti,am3352-ehrpwm", 358 - "ti,am33xx-ehrpwm"; 359 - #pwm-cells = <3>; 360 - reg = <0x48300200 0x80>; 361 - clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 362 - clock-names = "tbclk", "fck"; 363 - status = "disabled"; 364 - }; 365 - }; 366 - 367 - epwmss1: epwmss@48302000 { 368 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 369 - reg = <0x48302000 0x10>; 370 - #address-cells = <1>; 371 - #size-cells = <1>; 372 - ranges; 373 - ti,hwmods = "epwmss1"; 374 - status = "disabled"; 375 - 376 - ecap1: ecap@48302100 { 377 - compatible = "ti,am4372-ecap", 378 - "ti,am3352-ecap", 379 - "ti,am33xx-ecap"; 380 - #pwm-cells = <3>; 381 - reg = <0x48302100 0x80>; 382 - clocks = <&l4ls_gclk>; 383 - clock-names = "fck"; 384 - status = "disabled"; 385 - }; 386 - 387 - ehrpwm1: pwm@48302200 { 388 - compatible = "ti,am4372-ehrpwm", 389 - "ti,am3352-ehrpwm", 390 - "ti,am33xx-ehrpwm"; 391 - #pwm-cells = <3>; 392 - reg = <0x48302200 0x80>; 393 - clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 394 - clock-names = "tbclk", "fck"; 395 - status = "disabled"; 396 - }; 397 - }; 398 - 399 - epwmss2: epwmss@48304000 { 400 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 401 - reg = <0x48304000 0x10>; 402 - #address-cells = <1>; 403 - #size-cells = <1>; 404 - ranges; 405 - ti,hwmods = "epwmss2"; 406 - status = "disabled"; 407 - 408 - ecap2: ecap@48304100 { 409 - compatible = "ti,am4372-ecap", 410 - "ti,am3352-ecap", 411 - "ti,am33xx-ecap"; 412 - #pwm-cells = <3>; 413 - reg = <0x48304100 0x80>; 414 - clocks = <&l4ls_gclk>; 415 - clock-names = "fck"; 416 - status = "disabled"; 417 - }; 418 - 419 - ehrpwm2: pwm@48304200 { 420 - compatible = "ti,am4372-ehrpwm", 421 - "ti,am3352-ehrpwm", 422 - "ti,am33xx-ehrpwm"; 423 - #pwm-cells = <3>; 424 - reg = <0x48304200 0x80>; 425 - clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 426 - clock-names = "tbclk", "fck"; 427 - status = "disabled"; 428 - }; 429 - }; 430 - 431 - epwmss3: epwmss@48306000 { 432 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 433 - reg = <0x48306000 0x10>; 434 - #address-cells = <1>; 435 - #size-cells = <1>; 436 - ranges; 437 - ti,hwmods = "epwmss3"; 438 - status = "disabled"; 439 - 440 - ehrpwm3: pwm@48306200 { 441 - compatible = "ti,am4372-ehrpwm", 442 - "ti,am3352-ehrpwm", 443 - "ti,am33xx-ehrpwm"; 444 - #pwm-cells = <3>; 445 - reg = <0x48306200 0x80>; 446 - clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>; 447 - clock-names = "tbclk", "fck"; 448 - status = "disabled"; 449 - }; 450 - }; 451 - 452 - epwmss4: epwmss@48308000 { 453 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 454 - reg = <0x48308000 0x10>; 455 - #address-cells = <1>; 456 - #size-cells = <1>; 457 - ranges; 458 - ti,hwmods = "epwmss4"; 459 - status = "disabled"; 460 - 461 - ehrpwm4: pwm@48308200 { 462 - compatible = "ti,am4372-ehrpwm", 463 - "ti,am3352-ehrpwm", 464 - "ti,am33xx-ehrpwm"; 465 - #pwm-cells = <3>; 466 - reg = <0x48308200 0x80>; 467 - clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>; 468 - clock-names = "tbclk", "fck"; 469 - status = "disabled"; 470 - }; 471 - }; 472 - 473 - epwmss5: epwmss@4830a000 { 474 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 475 - reg = <0x4830a000 0x10>; 476 - #address-cells = <1>; 477 - #size-cells = <1>; 478 - ranges; 479 - ti,hwmods = "epwmss5"; 480 - status = "disabled"; 481 - 482 - ehrpwm5: pwm@4830a200 { 483 - compatible = "ti,am4372-ehrpwm", 484 - "ti,am3352-ehrpwm", 485 - "ti,am33xx-ehrpwm"; 486 - #pwm-cells = <3>; 487 - reg = <0x4830a200 0x80>; 488 - clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>; 489 - clock-names = "tbclk", "fck"; 490 - status = "disabled"; 491 - }; 492 - }; 493 - 494 - tscadc: tscadc@44e0d000 { 495 - compatible = "ti,am3359-tscadc"; 496 - reg = <0x44e0d000 0x1000>; 497 - ti,hwmods = "adc_tsc"; 498 - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 499 - clocks = <&adc_tsc_fck>; 500 - clock-names = "fck"; 501 - status = "disabled"; 502 - dmas = <&edma 53 0>, <&edma 57 0>; 503 - dma-names = "fifo0", "fifo1"; 504 - 505 - tsc { 506 - compatible = "ti,am3359-tsc"; 507 - }; 508 - 509 - adc { 510 - #io-channel-cells = <1>; 511 - compatible = "ti,am3359-adc"; 512 - }; 513 - 514 634 }; 515 635 516 636 sham: sham@53100000 { ··· 266 938 dma-names = "tx", "rx"; 267 939 }; 268 940 269 - rng: rng@48310000 { 270 - compatible = "ti,omap4-rng"; 271 - ti,hwmods = "rng"; 272 - reg = <0x48310000 0x2000>; 273 - interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 274 - }; 275 - 276 - mcasp0: mcasp@48038000 { 277 - compatible = "ti,am33xx-mcasp-audio"; 278 - ti,hwmods = "mcasp0"; 279 - reg = <0x48038000 0x2000>, 280 - <0x46000000 0x400000>; 281 - reg-names = "mpu", "dat"; 282 - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 283 - <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 284 - interrupt-names = "tx", "rx"; 285 - status = "disabled"; 286 - dmas = <&edma 8 2>, 287 - <&edma 9 2>; 288 - dma-names = "tx", "rx"; 289 - }; 290 - 291 - mcasp1: mcasp@4803c000 { 292 - compatible = "ti,am33xx-mcasp-audio"; 293 - ti,hwmods = "mcasp1"; 294 - reg = <0x4803C000 0x2000>, 295 - <0x46400000 0x400000>; 296 - reg-names = "mpu", "dat"; 297 - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 298 - <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 299 - interrupt-names = "tx", "rx"; 300 - status = "disabled"; 301 - dmas = <&edma 10 2>, 302 - <&edma 11 2>; 303 - dma-names = "tx", "rx"; 304 - }; 305 - 306 - elm: elm@48080000 { 307 - compatible = "ti,am3352-elm"; 308 - reg = <0x48080000 0x2000>; 309 - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 310 - ti,hwmods = "elm"; 311 - clocks = <&l4ls_gclk>; 312 - clock-names = "fck"; 313 - status = "disabled"; 314 - }; 315 - 316 941 gpmc: gpmc@50000000 { 317 942 compatible = "ti,am3352-gpmc"; 318 943 ti,hwmods = "gpmc"; ··· 286 1005 status = "disabled"; 287 1006 }; 288 1007 289 - ocp2scp0: ocp2scp@483a8000 { 290 - compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 291 - #address-cells = <1>; 292 - #size-cells = <1>; 293 - ranges; 294 - ti,hwmods = "ocp2scp0"; 295 - 296 - usb2_phy1: phy@483a8000 { 297 - compatible = "ti,am437x-usb2"; 298 - reg = <0x483a8000 0x8000>; 299 - syscon-phy-power = <&scm_conf 0x620>; 300 - clocks = <&usb_phy0_always_on_clk32k>, 301 - <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>; 302 - clock-names = "wkupclk", "refclk"; 303 - #phy-cells = <0>; 304 - status = "disabled"; 305 - }; 306 - }; 307 - 308 - ocp2scp1: ocp2scp@483e8000 { 309 - compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 310 - #address-cells = <1>; 311 - #size-cells = <1>; 312 - ranges; 313 - ti,hwmods = "ocp2scp1"; 314 - 315 - usb2_phy2: phy@483e8000 { 316 - compatible = "ti,am437x-usb2"; 317 - reg = <0x483e8000 0x8000>; 318 - syscon-phy-power = <&scm_conf 0x628>; 319 - clocks = <&usb_phy1_always_on_clk32k>, 320 - <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>; 321 - clock-names = "wkupclk", "refclk"; 322 - #phy-cells = <0>; 323 - status = "disabled"; 324 - }; 325 - }; 326 - 327 - dwc3_1: omap_dwc3@48380000 { 328 - compatible = "ti,am437x-dwc3"; 329 - ti,hwmods = "usb_otg_ss0"; 330 - reg = <0x48380000 0x10000>; 331 - interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 332 - #address-cells = <1>; 333 - #size-cells = <1>; 334 - utmi-mode = <1>; 335 - ranges; 336 - 337 - usb1: usb@48390000 { 338 - compatible = "synopsys,dwc3"; 339 - reg = <0x48390000 0x10000>; 340 - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 341 - <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 342 - <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 343 - interrupt-names = "peripheral", 344 - "host", 345 - "otg"; 346 - phys = <&usb2_phy1>; 347 - phy-names = "usb2-phy"; 348 - maximum-speed = "high-speed"; 349 - dr_mode = "otg"; 350 - status = "disabled"; 351 - snps,dis_u3_susphy_quirk; 352 - snps,dis_u2_susphy_quirk; 353 - }; 354 - }; 355 - 356 - dwc3_2: omap_dwc3@483c0000 { 357 - compatible = "ti,am437x-dwc3"; 358 - ti,hwmods = "usb_otg_ss1"; 359 - reg = <0x483c0000 0x10000>; 360 - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 361 - #address-cells = <1>; 362 - #size-cells = <1>; 363 - utmi-mode = <1>; 364 - ranges; 365 - 366 - usb2: usb@483d0000 { 367 - compatible = "synopsys,dwc3"; 368 - reg = <0x483d0000 0x10000>; 369 - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 370 - <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 371 - <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 372 - interrupt-names = "peripheral", 373 - "host", 374 - "otg"; 375 - phys = <&usb2_phy2>; 376 - phy-names = "usb2-phy"; 377 - maximum-speed = "high-speed"; 378 - dr_mode = "otg"; 379 - status = "disabled"; 380 - snps,dis_u3_susphy_quirk; 381 - snps,dis_u2_susphy_quirk; 382 - }; 383 - }; 384 - 385 1008 qspi: spi@47900000 { 386 1009 compatible = "ti,am4372-qspi"; 387 1010 reg = <0x47900000 0x100>, ··· 296 1111 ti,hwmods = "qspi"; 297 1112 interrupts = <0 138 0x4>; 298 1113 num-cs = <4>; 299 - status = "disabled"; 300 - }; 301 - 302 - hdq: hdq@48347000 { 303 - compatible = "ti,am4372-hdq"; 304 - reg = <0x48347000 0x1000>; 305 - interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 306 - clocks = <&func_12m_clk>; 307 - clock-names = "fck"; 308 - ti,hwmods = "hdq1w"; 309 1114 status = "disabled"; 310 1115 }; 311 1116 ··· 348 1173 pool; 349 1174 }; 350 1175 }; 351 - 352 - dcan0: can@481cc000 { 353 - compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 354 - ti,hwmods = "d_can0"; 355 - clocks = <&dcan0_fck>; 356 - clock-names = "fck"; 357 - reg = <0x481cc000 0x2000>; 358 - syscon-raminit = <&scm_conf 0x644 0>; 359 - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 360 - status = "disabled"; 361 - }; 362 - 363 - dcan1: can@481d0000 { 364 - compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 365 - ti,hwmods = "d_can1"; 366 - clocks = <&dcan1_fck>; 367 - clock-names = "fck"; 368 - reg = <0x481d0000 0x2000>; 369 - syscon-raminit = <&scm_conf 0x644 1>; 370 - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 371 - status = "disabled"; 372 - }; 373 - 374 - vpfe0: vpfe@48326000 { 375 - compatible = "ti,am437x-vpfe"; 376 - reg = <0x48326000 0x2000>; 377 - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 378 - ti,hwmods = "vpfe0"; 379 - status = "disabled"; 380 - }; 381 - 382 - vpfe1: vpfe@48328000 { 383 - compatible = "ti,am437x-vpfe"; 384 - reg = <0x48328000 0x2000>; 385 - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 386 - ti,hwmods = "vpfe1"; 387 - status = "disabled"; 388 - }; 389 1176 }; 390 1177 }; 391 1178 1179 + #include "am437x-l4.dtsi" 392 1180 #include "am43xx-clocks.dtsi"
+851 -14
arch/arm/boot/dts/am437x-l4.dtsi
··· 48 48 }; 49 49 50 50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */ 51 - compatible = "ti,sysc"; 52 - status = "disabled"; 51 + compatible = "ti,sysc-omap4", "ti,sysc"; 52 + reg = <0xf0000 0x4>; 53 + reg-names = "rev"; 53 54 #address-cells = <1>; 54 55 #size-cells = <1>; 55 56 ranges = <0x0 0xf0000 0x10000>; 57 + 58 + prcm: prcm@0 { 59 + compatible = "ti,am4-prcm", "simple-bus"; 60 + reg = <0x0 0x11000>; 61 + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 62 + #address-cells = <1>; 63 + #size-cells = <1>; 64 + ranges = <0 0 0x11000>; 65 + 66 + prcm_clocks: clocks { 67 + #address-cells = <1>; 68 + #size-cells = <0>; 69 + }; 70 + 71 + prcm_clockdomains: clockdomains { 72 + }; 73 + }; 56 74 }; 57 75 }; 58 76 ··· 152 134 #address-cells = <1>; 153 135 #size-cells = <1>; 154 136 ranges = <0x0 0x7000 0x1000>; 137 + 138 + gpio0: gpio@0 { 139 + compatible = "ti,am4372-gpio","ti,omap4-gpio"; 140 + reg = <0x0 0x1000>; 141 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 142 + gpio-controller; 143 + #gpio-cells = <2>; 144 + interrupt-controller; 145 + #interrupt-cells = <2>; 146 + status = "disabled"; 147 + }; 155 148 }; 156 149 157 150 target-module@9000 { /* 0x44e09000, ap 16 04.0 */ ··· 185 156 #address-cells = <1>; 186 157 #size-cells = <1>; 187 158 ranges = <0x0 0x9000 0x1000>; 159 + 160 + uart0: serial@0 { 161 + compatible = "ti,am4372-uart","ti,omap2-uart"; 162 + reg = <0x0 0x2000>; 163 + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 164 + }; 188 165 }; 189 166 190 167 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */ ··· 215 180 #address-cells = <1>; 216 181 #size-cells = <1>; 217 182 ranges = <0x0 0xb000 0x1000>; 183 + 184 + i2c0: i2c@0 { 185 + compatible = "ti,am4372-i2c","ti,omap4-i2c"; 186 + reg = <0x0 0x1000>; 187 + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 188 + #address-cells = <1>; 189 + #size-cells = <0>; 190 + status = "disabled"; 191 + }; 218 192 }; 219 193 220 194 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */ ··· 242 198 #address-cells = <1>; 243 199 #size-cells = <1>; 244 200 ranges = <0x0 0xd000 0x1000>; 201 + 202 + tscadc: tscadc@0 { 203 + compatible = "ti,am3359-tscadc"; 204 + reg = <0x0 0x1000>; 205 + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 206 + clocks = <&adc_tsc_fck>; 207 + clock-names = "fck"; 208 + status = "disabled"; 209 + dmas = <&edma 53 0>, <&edma 57 0>; 210 + dma-names = "fifo0", "fifo1"; 211 + 212 + tsc { 213 + compatible = "ti,am3359-tsc"; 214 + }; 215 + 216 + adc { 217 + #io-channel-cells = <1>; 218 + compatible = "ti,am3359-adc"; 219 + }; 220 + 221 + }; 245 222 }; 246 223 247 224 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */ 248 - compatible = "ti,sysc"; 249 - status = "disabled"; 225 + compatible = "ti,sysc-omap4", "ti,sysc"; 226 + reg = <0x10000 0x4>; 227 + reg-names = "rev"; 250 228 #address-cells = <1>; 251 229 #size-cells = <1>; 252 230 ranges = <0x0 0x10000 0x10000>; 231 + 232 + scm: scm@0 { 233 + compatible = "ti,am4-scm", "simple-bus"; 234 + reg = <0x0 0x4000>; 235 + #address-cells = <1>; 236 + #size-cells = <1>; 237 + ranges = <0 0 0x4000>; 238 + 239 + phy_sel: cpsw-phy-sel@650 { 240 + compatible = "ti,am43xx-cpsw-phy-sel"; 241 + reg= <0x650 0x4>; 242 + reg-names = "gmii-sel"; 243 + }; 244 + 245 + am43xx_pinmux: pinmux@800 { 246 + compatible = "ti,am437-padconf", 247 + "pinctrl-single"; 248 + reg = <0x800 0x31c>; 249 + #address-cells = <1>; 250 + #size-cells = <0>; 251 + #pinctrl-cells = <1>; 252 + #interrupt-cells = <1>; 253 + interrupt-controller; 254 + pinctrl-single,register-width = <32>; 255 + pinctrl-single,function-mask = <0xffffffff>; 256 + }; 257 + 258 + scm_conf: scm_conf@0 { 259 + compatible = "syscon"; 260 + reg = <0x0 0x800>; 261 + #address-cells = <1>; 262 + #size-cells = <1>; 263 + 264 + scm_clocks: clocks { 265 + #address-cells = <1>; 266 + #size-cells = <0>; 267 + }; 268 + }; 269 + 270 + wkup_m3_ipc: wkup_m3_ipc@1324 { 271 + compatible = "ti,am4372-wkup-m3-ipc"; 272 + reg = <0x1324 0x44>; 273 + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 274 + ti,rproc = <&wkup_m3>; 275 + mboxes = <&mailbox &mbox_wkupm3>; 276 + }; 277 + 278 + edma_xbar: dma-router@f90 { 279 + compatible = "ti,am335x-edma-crossbar"; 280 + reg = <0xf90 0x40>; 281 + #dma-cells = <3>; 282 + dma-requests = <64>; 283 + dma-masters = <&edma>; 284 + }; 285 + 286 + scm_clockdomains: clockdomains { 287 + }; 288 + }; 253 289 }; 254 290 255 291 target-module@31000 { /* 0x44e31000, ap 24 40.0 */ ··· 352 228 #address-cells = <1>; 353 229 #size-cells = <1>; 354 230 ranges = <0x0 0x31000 0x1000>; 231 + 232 + timer1: timer@0 { 233 + compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 234 + reg = <0x0 0x400>; 235 + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 236 + ti,timer-alwon; 237 + clocks = <&timer1_fck>; 238 + clock-names = "fck"; 239 + }; 355 240 }; 356 241 357 242 target-module@33000 { /* 0x44e33000, ap 26 18.0 */ ··· 391 258 #address-cells = <1>; 392 259 #size-cells = <1>; 393 260 ranges = <0x0 0x35000 0x1000>; 261 + 262 + wdt: wdt@0 { 263 + compatible = "ti,am4372-wdt","ti,omap3-wdt"; 264 + reg = <0x0 0x1000>; 265 + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 266 + }; 394 267 }; 395 268 396 269 target-module@37000 { /* 0x44e37000, ap 30 08.0 */ ··· 431 292 #address-cells = <1>; 432 293 #size-cells = <1>; 433 294 ranges = <0x0 0x3e000 0x1000>; 295 + 296 + rtc: rtc@0 { 297 + compatible = "ti,am4372-rtc", "ti,am3352-rtc", 298 + "ti,da830-rtc"; 299 + reg = <0x0 0x1000>; 300 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 301 + GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 302 + clocks = <&clk_32768_ck>; 303 + clock-names = "int-clk"; 304 + system-power-controller; 305 + status = "disabled"; 306 + }; 434 307 }; 435 308 436 309 target-module@40000 { /* 0x44e40000, ap 36 68.0 */ ··· 467 316 #address-cells = <1>; 468 317 #size-cells = <1>; 469 318 ranges = <0x0 0x86000 0x1000>; 319 + 320 + counter32k: counter@0 { 321 + compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 322 + reg = <0x0 0x40>; 323 + }; 470 324 }; 471 325 472 326 target-module@88000 { /* 0x44e88000, ap 38 12.0 */ ··· 511 355 <0x00280000 0x00280000 0x001000>; /* ap 8 */ 512 356 513 357 target-module@100000 { /* 0x4a100000, ap 3 04.0 */ 514 - compatible = "ti,sysc"; 515 - status = "disabled"; 358 + compatible = "ti,sysc-omap4-simple", "ti,sysc"; 359 + ti,hwmods = "cpgmac0"; 360 + reg = <0x101200 0x4>, 361 + <0x101208 0x4>, 362 + <0x101204 0x4>; 363 + reg-names = "rev", "sysc", "syss"; 364 + ti,sysc-mask = <0>; 365 + ti,sysc-midle = <SYSC_IDLE_FORCE>, 366 + <SYSC_IDLE_NO>; 367 + ti,sysc-sidle = <SYSC_IDLE_FORCE>, 368 + <SYSC_IDLE_NO>; 369 + ti,syss-mask = <1>; 370 + clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 371 + clock-names = "fck"; 516 372 #address-cells = <1>; 517 373 #size-cells = <1>; 518 374 ranges = <0x0 0x100000 0x8000>; 375 + 376 + mac: ethernet@0 { 377 + compatible = "ti,am4372-cpsw","ti,cpsw"; 378 + reg = <0x0 0x800 379 + 0x1200 0x100>; 380 + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 381 + GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 382 + GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 383 + GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 384 + #address-cells = <1>; 385 + #size-cells = <1>; 386 + clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, 387 + <&dpll_clksel_mac_clk>; 388 + clock-names = "fck", "cpts", "50mclk"; 389 + assigned-clocks = <&dpll_clksel_mac_clk>; 390 + assigned-clock-rates = <50000000>; 391 + status = "disabled"; 392 + cpdma_channels = <8>; 393 + ale_entries = <1024>; 394 + bd_ram_size = <0x2000>; 395 + mac_control = <0x20>; 396 + slaves = <2>; 397 + active_slave = <0>; 398 + cpts_clock_mult = <0x80000000>; 399 + cpts_clock_shift = <29>; 400 + ranges = <0 0 0x8000>; 401 + syscon = <&scm_conf>; 402 + cpsw-phy-sel = <&phy_sel>; 403 + 404 + davinci_mdio: mdio@1000 { 405 + compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio"; 406 + reg = <0x1000 0x100>; 407 + #address-cells = <1>; 408 + #size-cells = <0>; 409 + clocks = <&cpsw_125mhz_gclk>; 410 + clock-names = "fck"; 411 + ti,hwmods = "davinci_mdio"; 412 + bus_freq = <1000000>; 413 + status = "disabled"; 414 + }; 415 + 416 + cpsw_emac0: slave@200 { 417 + /* Filled in by U-Boot */ 418 + mac-address = [ 00 00 00 00 00 00 ]; 419 + }; 420 + 421 + cpsw_emac1: slave@300 { 422 + /* Filled in by U-Boot */ 423 + mac-address = [ 00 00 00 00 00 00 ]; 424 + }; 425 + }; 519 426 }; 520 427 521 428 target-module@200000 { /* 0x4a200000, ap 7 02.0 */ ··· 694 475 #address-cells = <1>; 695 476 #size-cells = <1>; 696 477 ranges = <0x0 0x22000 0x1000>; 478 + 479 + uart1: serial@0 { 480 + compatible = "ti,am4372-uart","ti,omap2-uart"; 481 + reg = <0x0 0x2000>; 482 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 483 + status = "disabled"; 484 + }; 697 485 }; 698 486 699 487 target-module@24000 { /* 0x48024000, ap 10 1c.0 */ ··· 723 497 #address-cells = <1>; 724 498 #size-cells = <1>; 725 499 ranges = <0x0 0x24000 0x1000>; 500 + 501 + uart2: serial@0 { 502 + compatible = "ti,am4372-uart","ti,omap2-uart"; 503 + reg = <0x0 0x2000>; 504 + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 505 + status = "disabled"; 506 + }; 726 507 }; 727 508 728 509 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */ ··· 754 521 #address-cells = <1>; 755 522 #size-cells = <1>; 756 523 ranges = <0x0 0x2a000 0x1000>; 524 + 525 + i2c1: i2c@0 { 526 + compatible = "ti,am4372-i2c","ti,omap4-i2c"; 527 + reg = <0x0 0x1000>; 528 + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 529 + #address-cells = <1>; 530 + #size-cells = <0>; 531 + status = "disabled"; 532 + }; 757 533 }; 758 534 759 535 target-module@30000 { /* 0x48030000, ap 65 08.0 */ ··· 785 543 #address-cells = <1>; 786 544 #size-cells = <1>; 787 545 ranges = <0x0 0x30000 0x1000>; 546 + 547 + spi0: spi@0 { 548 + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 549 + reg = <0x0 0x400>; 550 + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 551 + #address-cells = <1>; 552 + #size-cells = <0>; 553 + status = "disabled"; 554 + }; 788 555 }; 789 556 790 557 target-module@34000 { /* 0x48034000, ap 80 56.0 */ ··· 827 576 #address-cells = <1>; 828 577 #size-cells = <1>; 829 578 ranges = <0x0 0x38000 0x2000>; 579 + 580 + mcasp0: mcasp@0 { 581 + compatible = "ti,am33xx-mcasp-audio"; 582 + reg = <0x0 0x2000>, 583 + <0x46000000 0x400000>; 584 + reg-names = "mpu", "dat"; 585 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 586 + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 587 + interrupt-names = "tx", "rx"; 588 + status = "disabled"; 589 + dmas = <&edma 8 2>, 590 + <&edma 9 2>; 591 + dma-names = "tx", "rx"; 592 + }; 830 593 }; 831 594 832 595 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */ ··· 858 593 #address-cells = <1>; 859 594 #size-cells = <1>; 860 595 ranges = <0x0 0x3c000 0x2000>; 596 + 597 + mcasp1: mcasp@0 { 598 + compatible = "ti,am33xx-mcasp-audio"; 599 + reg = <0x0 0x2000>, 600 + <0x46400000 0x400000>; 601 + reg-names = "mpu", "dat"; 602 + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 603 + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 604 + interrupt-names = "tx", "rx"; 605 + status = "disabled"; 606 + dmas = <&edma 10 2>, 607 + <&edma 11 2>; 608 + dma-names = "tx", "rx"; 609 + }; 861 610 }; 862 611 863 612 target-module@40000 { /* 0x48040000, ap 18 1e.0 */ ··· 892 613 #address-cells = <1>; 893 614 #size-cells = <1>; 894 615 ranges = <0x0 0x40000 0x1000>; 616 + 617 + timer2: timer@0 { 618 + compatible = "ti,am4372-timer","ti,am335x-timer"; 619 + reg = <0x0 0x400>; 620 + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 621 + clocks = <&timer2_fck>; 622 + clock-names = "fck"; 623 + }; 895 624 }; 896 625 897 626 target-module@42000 { /* 0x48042000, ap 20 24.0 */ ··· 920 633 #address-cells = <1>; 921 634 #size-cells = <1>; 922 635 ranges = <0x0 0x42000 0x1000>; 636 + 637 + timer3: timer@0 { 638 + compatible = "ti,am4372-timer","ti,am335x-timer"; 639 + reg = <0x0 0x400>; 640 + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 641 + status = "disabled"; 642 + }; 923 643 }; 924 644 925 645 target-module@44000 { /* 0x48044000, ap 22 26.0 */ ··· 947 653 #address-cells = <1>; 948 654 #size-cells = <1>; 949 655 ranges = <0x0 0x44000 0x1000>; 656 + 657 + timer4: timer@0 { 658 + compatible = "ti,am4372-timer","ti,am335x-timer"; 659 + reg = <0x0 0x400>; 660 + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 661 + ti,timer-pwm; 662 + status = "disabled"; 663 + }; 950 664 }; 951 665 952 666 target-module@46000 { /* 0x48046000, ap 24 28.0 */ ··· 975 673 #address-cells = <1>; 976 674 #size-cells = <1>; 977 675 ranges = <0x0 0x46000 0x1000>; 676 + 677 + timer5: timer@0 { 678 + compatible = "ti,am4372-timer","ti,am335x-timer"; 679 + reg = <0x0 0x400>; 680 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 681 + ti,timer-pwm; 682 + status = "disabled"; 683 + }; 978 684 }; 979 685 980 686 target-module@48000 { /* 0x48048000, ap 26 1a.0 */ ··· 1003 693 #address-cells = <1>; 1004 694 #size-cells = <1>; 1005 695 ranges = <0x0 0x48000 0x1000>; 696 + 697 + timer6: timer@0 { 698 + compatible = "ti,am4372-timer","ti,am335x-timer"; 699 + reg = <0x0 0x400>; 700 + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 701 + ti,timer-pwm; 702 + status = "disabled"; 703 + }; 1006 704 }; 1007 705 1008 706 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */ ··· 1031 713 #address-cells = <1>; 1032 714 #size-cells = <1>; 1033 715 ranges = <0x0 0x4a000 0x1000>; 716 + 717 + timer7: timer@0 { 718 + compatible = "ti,am4372-timer","ti,am335x-timer"; 719 + reg = <0x0 0x400>; 720 + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 721 + ti,timer-pwm; 722 + status = "disabled"; 723 + }; 1034 724 }; 1035 725 1036 726 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */ ··· 1063 737 #address-cells = <1>; 1064 738 #size-cells = <1>; 1065 739 ranges = <0x0 0x4c000 0x1000>; 740 + 741 + gpio1: gpio@0 { 742 + compatible = "ti,am4372-gpio","ti,omap4-gpio"; 743 + reg = <0x0 0x1000>; 744 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 745 + gpio-controller; 746 + #gpio-cells = <2>; 747 + interrupt-controller; 748 + #interrupt-cells = <2>; 749 + status = "disabled"; 750 + }; 1066 751 }; 1067 752 1068 753 target-module@60000 { /* 0x48060000, ap 30 14.0 */ ··· 1097 760 #address-cells = <1>; 1098 761 #size-cells = <1>; 1099 762 ranges = <0x0 0x60000 0x1000>; 763 + 764 + mmc1: mmc@0 { 765 + compatible = "ti,omap4-hsmmc"; 766 + reg = <0x0 0x1000>; 767 + ti,dual-volt; 768 + ti,needs-special-reset; 769 + dmas = <&edma 24 0>, 770 + <&edma 25 0>; 771 + dma-names = "tx", "rx"; 772 + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 773 + status = "disabled"; 774 + }; 1100 775 }; 1101 776 1102 777 target-module@80000 { /* 0x48080000, ap 32 18.0 */ ··· 1131 782 #address-cells = <1>; 1132 783 #size-cells = <1>; 1133 784 ranges = <0x0 0x80000 0x10000>; 785 + 786 + elm: elm@0 { 787 + compatible = "ti,am3352-elm"; 788 + reg = <0x0 0x2000>; 789 + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 790 + clocks = <&l4ls_gclk>; 791 + clock-names = "fck"; 792 + status = "disabled"; 793 + }; 1134 794 }; 1135 795 1136 796 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */ ··· 1158 800 #address-cells = <1>; 1159 801 #size-cells = <1>; 1160 802 ranges = <0x0 0xc8000 0x1000>; 803 + 804 + mailbox: mailbox@0 { 805 + compatible = "ti,omap4-mailbox"; 806 + reg = <0x0 0x200>; 807 + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 808 + #mbox-cells = <1>; 809 + ti,mbox-num-users = <4>; 810 + ti,mbox-num-fifos = <8>; 811 + mbox_wkupm3: wkup_m3 { 812 + ti,mbox-send-noirq; 813 + ti,mbox-tx = <0 0 0>; 814 + ti,mbox-rx = <0 0 3>; 815 + }; 816 + }; 1161 817 }; 1162 818 1163 819 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */ ··· 1195 823 #address-cells = <1>; 1196 824 #size-cells = <1>; 1197 825 ranges = <0x0 0xca000 0x1000>; 826 + 827 + hwspinlock: spinlock@0 { 828 + compatible = "ti,omap4-hwspinlock"; 829 + reg = <0x0 0x1000>; 830 + #hwlock-cells = <1>; 831 + }; 1198 832 }; 1199 833 }; 1200 834 ··· 1277 899 #address-cells = <1>; 1278 900 #size-cells = <1>; 1279 901 ranges = <0x0 0x9c000 0x1000>; 902 + 903 + i2c2: i2c@0 { 904 + compatible = "ti,am4372-i2c","ti,omap4-i2c"; 905 + reg = <0x0 0x1000>; 906 + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 907 + #address-cells = <1>; 908 + #size-cells = <0>; 909 + status = "disabled"; 910 + }; 1280 911 }; 1281 912 1282 913 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */ ··· 1308 921 #address-cells = <1>; 1309 922 #size-cells = <1>; 1310 923 ranges = <0x0 0xa0000 0x1000>; 924 + 925 + spi1: spi@0 { 926 + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 927 + reg = <0x0 0x400>; 928 + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 929 + #address-cells = <1>; 930 + #size-cells = <0>; 931 + status = "disabled"; 932 + }; 1311 933 }; 1312 934 1313 935 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */ ··· 1339 943 #address-cells = <1>; 1340 944 #size-cells = <1>; 1341 945 ranges = <0x0 0xa2000 0x1000>; 946 + 947 + spi2: spi@0 { 948 + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 949 + reg = <0x0 0x400>; 950 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 951 + #address-cells = <1>; 952 + #size-cells = <0>; 953 + status = "disabled"; 954 + }; 1342 955 }; 1343 956 1344 957 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */ ··· 1370 965 #address-cells = <1>; 1371 966 #size-cells = <1>; 1372 967 ranges = <0x0 0xa4000 0x1000>; 968 + 969 + spi3: spi@0 { 970 + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 971 + reg = <0x0 0x400>; 972 + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 973 + #address-cells = <1>; 974 + #size-cells = <0>; 975 + status = "disabled"; 976 + }; 1373 977 }; 1374 978 1375 979 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */ ··· 1401 987 #address-cells = <1>; 1402 988 #size-cells = <1>; 1403 989 ranges = <0x0 0xa6000 0x1000>; 990 + 991 + uart3: serial@0 { 992 + compatible = "ti,am4372-uart","ti,omap2-uart"; 993 + reg = <0x0 0x2000>; 994 + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 995 + status = "disabled"; 996 + }; 1404 997 }; 1405 998 1406 999 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */ ··· 1430 1009 #address-cells = <1>; 1431 1010 #size-cells = <1>; 1432 1011 ranges = <0x0 0xa8000 0x1000>; 1012 + 1013 + uart4: serial@0 { 1014 + compatible = "ti,am4372-uart","ti,omap2-uart"; 1015 + reg = <0x0 0x2000>; 1016 + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 1017 + status = "disabled"; 1018 + }; 1433 1019 }; 1434 1020 1435 1021 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */ ··· 1459 1031 #address-cells = <1>; 1460 1032 #size-cells = <1>; 1461 1033 ranges = <0x0 0xaa000 0x1000>; 1034 + 1035 + uart5: serial@0 { 1036 + compatible = "ti,am4372-uart","ti,omap2-uart"; 1037 + reg = <0x0 0x2000>; 1038 + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 1039 + status = "disabled"; 1040 + }; 1462 1041 }; 1463 1042 1464 1043 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */ ··· 1490 1055 #address-cells = <1>; 1491 1056 #size-cells = <1>; 1492 1057 ranges = <0x0 0xac000 0x1000>; 1058 + 1059 + gpio2: gpio@0 { 1060 + compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1061 + reg = <0x0 0x1000>; 1062 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 1063 + gpio-controller; 1064 + #gpio-cells = <2>; 1065 + interrupt-controller; 1066 + #interrupt-cells = <2>; 1067 + status = "disabled"; 1068 + }; 1493 1069 }; 1494 1070 1495 1071 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */ ··· 1525 1079 #address-cells = <1>; 1526 1080 #size-cells = <1>; 1527 1081 ranges = <0x0 0xae000 0x1000>; 1082 + 1083 + gpio3: gpio@0 { 1084 + compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1085 + reg = <0x0 0x1000>; 1086 + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 1087 + gpio-controller; 1088 + #gpio-cells = <2>; 1089 + interrupt-controller; 1090 + #interrupt-cells = <2>; 1091 + status = "disabled"; 1092 + }; 1528 1093 }; 1529 1094 1530 1095 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */ ··· 1556 1099 #address-cells = <1>; 1557 1100 #size-cells = <1>; 1558 1101 ranges = <0x0 0xc1000 0x1000>; 1102 + 1103 + timer8: timer@0 { 1104 + compatible = "ti,am4372-timer","ti,am335x-timer"; 1105 + reg = <0x0 0x400>; 1106 + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 1107 + status = "disabled"; 1108 + }; 1559 1109 }; 1560 1110 1561 1111 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ 1562 - compatible = "ti,sysc"; 1563 - status = "disabled"; 1112 + compatible = "ti,sysc-omap4", "ti,sysc"; 1113 + ti,hwmods = "d_can0"; 1114 + reg = <0xcc000 0x4>; 1115 + reg-names = "rev"; 1116 + /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1117 + clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>; 1118 + clock-names = "fck"; 1564 1119 #address-cells = <1>; 1565 1120 #size-cells = <1>; 1566 1121 ranges = <0x0 0xcc000 0x2000>; 1122 + 1123 + dcan0: can@0 { 1124 + compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1125 + reg = <0x0 0x2000>; 1126 + syscon-raminit = <&scm_conf 0x644 0>; 1127 + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 1128 + status = "disabled"; 1129 + }; 1567 1130 }; 1568 1131 1569 1132 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ 1570 - compatible = "ti,sysc"; 1571 - status = "disabled"; 1133 + compatible = "ti,sysc-omap4", "ti,sysc"; 1134 + ti,hwmods = "d_can1"; 1135 + reg = <0xd0000 0x4>; 1136 + reg-names = "rev"; 1137 + /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1138 + clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>; 1139 + clock-names = "fck"; 1572 1140 #address-cells = <1>; 1573 1141 #size-cells = <1>; 1574 1142 ranges = <0x0 0xd0000 0x2000>; 1143 + 1144 + dcan1: can@0 { 1145 + compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 1146 + reg = <0x0 0x2000>; 1147 + syscon-raminit = <&scm_conf 0x644 1>; 1148 + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 1149 + status = "disabled"; 1150 + }; 1575 1151 }; 1576 1152 1577 1153 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */ ··· 1628 1138 #address-cells = <1>; 1629 1139 #size-cells = <1>; 1630 1140 ranges = <0x0 0xd8000 0x1000>; 1141 + 1142 + mmc2: mmc@0 { 1143 + compatible = "ti,omap4-hsmmc"; 1144 + reg = <0x0 0x1000>; 1145 + ti,needs-special-reset; 1146 + dmas = <&edma 2 0>, 1147 + <&edma 3 0>; 1148 + dma-names = "tx", "rx"; 1149 + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 1150 + status = "disabled"; 1151 + }; 1631 1152 }; 1632 1153 }; 1633 1154 ··· 1727 1226 #address-cells = <1>; 1728 1227 #size-cells = <1>; 1729 1228 ranges = <0x0 0x0 0x1000>; 1229 + 1230 + epwmss0: epwmss@0 { 1231 + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1232 + reg = <0x0 0x10>; 1233 + #address-cells = <1>; 1234 + #size-cells = <1>; 1235 + ranges = <0 0 0x1000>; 1236 + status = "disabled"; 1237 + 1238 + ecap0: ecap@100 { 1239 + compatible = "ti,am4372-ecap", 1240 + "ti,am3352-ecap", 1241 + "ti,am33xx-ecap"; 1242 + #pwm-cells = <3>; 1243 + reg = <0x100 0x80>; 1244 + clocks = <&l4ls_gclk>; 1245 + clock-names = "fck"; 1246 + status = "disabled"; 1247 + }; 1248 + 1249 + ehrpwm0: pwm@200 { 1250 + compatible = "ti,am4372-ehrpwm", 1251 + "ti,am3352-ehrpwm", 1252 + "ti,am33xx-ehrpwm"; 1253 + #pwm-cells = <3>; 1254 + reg = <0x200 0x80>; 1255 + clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 1256 + clock-names = "tbclk", "fck"; 1257 + status = "disabled"; 1258 + }; 1259 + }; 1730 1260 }; 1731 1261 1732 1262 target-module@2000 { /* 0x48302000, ap 58 4a.0 */ ··· 1780 1248 #address-cells = <1>; 1781 1249 #size-cells = <1>; 1782 1250 ranges = <0x0 0x2000 0x1000>; 1251 + 1252 + epwmss1: epwmss@0 { 1253 + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1254 + reg = <0x0 0x10>; 1255 + #address-cells = <1>; 1256 + #size-cells = <1>; 1257 + ranges = <0 0 0x1000>; 1258 + status = "disabled"; 1259 + 1260 + ecap1: ecap@100 { 1261 + compatible = "ti,am4372-ecap", 1262 + "ti,am3352-ecap", 1263 + "ti,am33xx-ecap"; 1264 + #pwm-cells = <3>; 1265 + reg = <0x100 0x80>; 1266 + clocks = <&l4ls_gclk>; 1267 + clock-names = "fck"; 1268 + status = "disabled"; 1269 + }; 1270 + 1271 + ehrpwm1: pwm@200 { 1272 + compatible = "ti,am4372-ehrpwm", 1273 + "ti,am3352-ehrpwm", 1274 + "ti,am33xx-ehrpwm"; 1275 + #pwm-cells = <3>; 1276 + reg = <0x200 0x80>; 1277 + clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 1278 + clock-names = "tbclk", "fck"; 1279 + status = "disabled"; 1280 + }; 1281 + }; 1783 1282 }; 1784 1283 1785 1284 target-module@4000 { /* 0x48304000, ap 60 44.0 */ ··· 1833 1270 #address-cells = <1>; 1834 1271 #size-cells = <1>; 1835 1272 ranges = <0x0 0x4000 0x1000>; 1273 + 1274 + epwmss2: epwmss@0 { 1275 + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1276 + reg = <0x0 0x10>; 1277 + #address-cells = <1>; 1278 + #size-cells = <1>; 1279 + ranges = <0 0 0x1000>; 1280 + status = "disabled"; 1281 + 1282 + ecap2: ecap@100 { 1283 + compatible = "ti,am4372-ecap", 1284 + "ti,am3352-ecap", 1285 + "ti,am33xx-ecap"; 1286 + #pwm-cells = <3>; 1287 + reg = <0x100 0x80>; 1288 + clocks = <&l4ls_gclk>; 1289 + clock-names = "fck"; 1290 + status = "disabled"; 1291 + }; 1292 + 1293 + ehrpwm2: pwm@200 { 1294 + compatible = "ti,am4372-ehrpwm", 1295 + "ti,am3352-ehrpwm", 1296 + "ti,am33xx-ehrpwm"; 1297 + #pwm-cells = <3>; 1298 + reg = <0x200 0x80>; 1299 + clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 1300 + clock-names = "tbclk", "fck"; 1301 + status = "disabled"; 1302 + }; 1303 + }; 1836 1304 }; 1837 1305 1838 1306 target-module@6000 { /* 0x48306000, ap 96 58.0 */ ··· 1886 1292 #address-cells = <1>; 1887 1293 #size-cells = <1>; 1888 1294 ranges = <0x0 0x6000 0x1000>; 1295 + 1296 + epwmss3: epwmss@0 { 1297 + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1298 + reg = <0x0 0x10>; 1299 + #address-cells = <1>; 1300 + #size-cells = <1>; 1301 + ranges = <0 0 0x1000>; 1302 + status = "disabled"; 1303 + 1304 + ehrpwm3: pwm@200 { 1305 + compatible = "ti,am4372-ehrpwm", 1306 + "ti,am3352-ehrpwm", 1307 + "ti,am33xx-ehrpwm"; 1308 + #pwm-cells = <3>; 1309 + reg = <0x200 0x80>; 1310 + clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>; 1311 + clock-names = "tbclk", "fck"; 1312 + status = "disabled"; 1313 + }; 1314 + }; 1889 1315 }; 1890 1316 1891 1317 target-module@8000 { /* 0x48308000, ap 98 54.0 */ ··· 1928 1314 #address-cells = <1>; 1929 1315 #size-cells = <1>; 1930 1316 ranges = <0x0 0x8000 0x1000>; 1317 + 1318 + epwmss4: epwmss@0 { 1319 + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1320 + reg = <0x0 0x10>; 1321 + #address-cells = <1>; 1322 + #size-cells = <1>; 1323 + ranges = <0 0 0x1000>; 1324 + status = "disabled"; 1325 + 1326 + ehrpwm4: pwm@48308200 { 1327 + compatible = "ti,am4372-ehrpwm", 1328 + "ti,am3352-ehrpwm", 1329 + "ti,am33xx-ehrpwm"; 1330 + #pwm-cells = <3>; 1331 + reg = <0x200 0x80>; 1332 + clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>; 1333 + clock-names = "tbclk", "fck"; 1334 + status = "disabled"; 1335 + }; 1336 + }; 1931 1337 }; 1932 1338 1933 1339 target-module@a000 { /* 0x4830a000, ap 100 60.0 */ ··· 1970 1336 #address-cells = <1>; 1971 1337 #size-cells = <1>; 1972 1338 ranges = <0x0 0xa000 0x1000>; 1339 + 1340 + epwmss5: epwmss@0 { 1341 + compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 1342 + reg = <0x0 0x10>; 1343 + #address-cells = <1>; 1344 + #size-cells = <1>; 1345 + ranges = <0 0 0x1000>; 1346 + status = "disabled"; 1347 + 1348 + ehrpwm5: pwm@200 { 1349 + compatible = "ti,am4372-ehrpwm", 1350 + "ti,am3352-ehrpwm", 1351 + "ti,am33xx-ehrpwm"; 1352 + #pwm-cells = <3>; 1353 + reg = <0x200 0x80>; 1354 + clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>; 1355 + clock-names = "tbclk", "fck"; 1356 + status = "disabled"; 1357 + }; 1358 + }; 1973 1359 }; 1974 1360 1975 1361 target-module@10000 { /* 0x48310000, ap 64 4e.1 */ ··· 2007 1353 #address-cells = <1>; 2008 1354 #size-cells = <1>; 2009 1355 ranges = <0x0 0x10000 0x2000>; 1356 + 1357 + rng: rng@0 { 1358 + compatible = "ti,omap4-rng"; 1359 + reg = <0x0 0x2000>; 1360 + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 1361 + }; 2010 1362 }; 2011 1363 2012 1364 target-module@13000 { /* 0x48313000, ap 90 50.0 */ ··· 2053 1393 #address-cells = <1>; 2054 1394 #size-cells = <1>; 2055 1395 ranges = <0x0 0x20000 0x1000>; 1396 + 1397 + gpio4: gpio@0 { 1398 + compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1399 + reg = <0x0 0x1000>; 1400 + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 1401 + gpio-controller; 1402 + #gpio-cells = <2>; 1403 + interrupt-controller; 1404 + #interrupt-cells = <2>; 1405 + status = "disabled"; 1406 + }; 2056 1407 }; 2057 1408 2058 1409 target-module@22000 { /* 0x48322000, ap 116 64.0 */ ··· 2088 1417 #address-cells = <1>; 2089 1418 #size-cells = <1>; 2090 1419 ranges = <0x0 0x22000 0x1000>; 1420 + 1421 + gpio5: gpio@0 { 1422 + compatible = "ti,am4372-gpio","ti,omap4-gpio"; 1423 + reg = <0x0 0x1000>; 1424 + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1425 + gpio-controller; 1426 + #gpio-cells = <2>; 1427 + interrupt-controller; 1428 + #interrupt-cells = <2>; 1429 + status = "disabled"; 1430 + }; 2091 1431 }; 2092 1432 2093 1433 target-module@26000 { /* 0x48326000, ap 86 66.0 */ ··· 2119 1437 #address-cells = <1>; 2120 1438 #size-cells = <1>; 2121 1439 ranges = <0x0 0x26000 0x1000>; 1440 + 1441 + vpfe0: vpfe@0 { 1442 + compatible = "ti,am437x-vpfe"; 1443 + reg = <0x0 0x2000>; 1444 + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 1445 + status = "disabled"; 1446 + }; 2122 1447 }; 2123 1448 2124 1449 target-module@28000 { /* 0x48328000, ap 75 0e.0 */ ··· 2146 1457 #address-cells = <1>; 2147 1458 #size-cells = <1>; 2148 1459 ranges = <0x0 0x28000 0x1000>; 1460 + 1461 + vpfe1: vpfe@0 { 1462 + compatible = "ti,am437x-vpfe"; 1463 + reg = <0x0 0x2000>; 1464 + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 1465 + status = "disabled"; 1466 + }; 2149 1467 }; 2150 1468 2151 1469 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */ ··· 2195 1499 #address-cells = <1>; 2196 1500 #size-cells = <1>; 2197 1501 ranges = <0x0 0x3d000 0x1000>; 1502 + 1503 + timer9: timer@0 { 1504 + compatible = "ti,am4372-timer","ti,am335x-timer"; 1505 + reg = <0x0 0x400>; 1506 + interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 1507 + status = "disabled"; 1508 + }; 2198 1509 }; 2199 1510 2200 1511 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */ ··· 2222 1519 #address-cells = <1>; 2223 1520 #size-cells = <1>; 2224 1521 ranges = <0x0 0x3f000 0x1000>; 1522 + 1523 + timer10: timer@0 { 1524 + compatible = "ti,am4372-timer","ti,am335x-timer"; 1525 + reg = <0x0 0x400>; 1526 + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 1527 + status = "disabled"; 1528 + }; 2225 1529 }; 2226 1530 2227 1531 target-module@41000 { /* 0x48341000, ap 106 76.0 */ ··· 2249 1539 #address-cells = <1>; 2250 1540 #size-cells = <1>; 2251 1541 ranges = <0x0 0x41000 0x1000>; 1542 + 1543 + timer11: timer@0 { 1544 + compatible = "ti,am4372-timer","ti,am335x-timer"; 1545 + reg = <0x0 0x400>; 1546 + interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 1547 + status = "disabled"; 1548 + }; 2252 1549 }; 2253 1550 2254 1551 target-module@45000 { /* 0x48345000, ap 108 6a.0 */ ··· 2278 1561 #address-cells = <1>; 2279 1562 #size-cells = <1>; 2280 1563 ranges = <0x0 0x45000 0x1000>; 1564 + 1565 + spi4: spi@0 { 1566 + compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 1567 + reg = <0x0 0x400>; 1568 + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 1569 + #address-cells = <1>; 1570 + #size-cells = <0>; 1571 + status = "disabled"; 1572 + }; 2281 1573 }; 2282 1574 2283 1575 target-module@47000 { /* 0x48347000, ap 110 70.0 */ ··· 2304 1578 #address-cells = <1>; 2305 1579 #size-cells = <1>; 2306 1580 ranges = <0x0 0x47000 0x1000>; 1581 + 1582 + hdq: hdq@0 { 1583 + compatible = "ti,am4372-hdq"; 1584 + reg = <0x0 0x1000>; 1585 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 1586 + clocks = <&func_12m_clk>; 1587 + clock-names = "fck"; 1588 + status = "disabled"; 1589 + }; 2307 1590 }; 2308 1591 2309 1592 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */ ··· 2344 1609 #address-cells = <1>; 2345 1610 #size-cells = <1>; 2346 1611 ranges = <0x0 0x80000 0x20000>; 1612 + 1613 + dwc3_1: omap_dwc3@0 { 1614 + compatible = "ti,am437x-dwc3"; 1615 + reg = <0x0 0x10000>; 1616 + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1617 + #address-cells = <1>; 1618 + #size-cells = <1>; 1619 + utmi-mode = <1>; 1620 + ranges = <0 0 0x20000>; 1621 + 1622 + usb1: usb@10000 { 1623 + compatible = "synopsys,dwc3"; 1624 + reg = <0x10000 0x10000>; 1625 + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 1626 + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 1627 + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1628 + interrupt-names = "peripheral", 1629 + "host", 1630 + "otg"; 1631 + phys = <&usb2_phy1>; 1632 + phy-names = "usb2-phy"; 1633 + maximum-speed = "high-speed"; 1634 + dr_mode = "otg"; 1635 + status = "disabled"; 1636 + snps,dis_u3_susphy_quirk; 1637 + snps,dis_u2_susphy_quirk; 1638 + }; 1639 + }; 2347 1640 }; 2348 1641 2349 1642 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */ 2350 - compatible = "ti,sysc"; 2351 - status = "disabled"; 1643 + compatible = "ti,sysc-omap4", "ti,sysc"; 1644 + ti,hwmods = "ocp2scp0"; 1645 + reg = <0xa8000 0x4>; 1646 + reg-names = "rev"; 1647 + /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1648 + clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>; 1649 + clock-names = "fck"; 2352 1650 #address-cells = <1>; 2353 1651 #size-cells = <1>; 2354 1652 ranges = <0x0 0xa8000 0x8000>; 1653 + 1654 + ocp2scp0: ocp2scp@0 { 1655 + compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 1656 + #address-cells = <1>; 1657 + #size-cells = <1>; 1658 + ranges = <0 0 0x8000>; 1659 + 1660 + usb2_phy1: phy@8000 { 1661 + compatible = "ti,am437x-usb2"; 1662 + reg = <0x0 0x8000>; 1663 + syscon-phy-power = <&scm_conf 0x620>; 1664 + clocks = <&usb_phy0_always_on_clk32k>, 1665 + <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>; 1666 + clock-names = "wkupclk", "refclk"; 1667 + #phy-cells = <0>; 1668 + status = "disabled"; 1669 + }; 1670 + }; 2355 1671 }; 2356 1672 2357 1673 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */ ··· 2426 1640 #address-cells = <1>; 2427 1641 #size-cells = <1>; 2428 1642 ranges = <0x0 0xc0000 0x20000>; 1643 + 1644 + dwc3_2: omap_dwc3@0 { 1645 + compatible = "ti,am437x-dwc3"; 1646 + reg = <0x0 0x10000>; 1647 + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1648 + #address-cells = <1>; 1649 + #size-cells = <1>; 1650 + utmi-mode = <1>; 1651 + ranges = <0 0 0x20000>; 1652 + 1653 + usb2: usb@10000 { 1654 + compatible = "synopsys,dwc3"; 1655 + reg = <0x10000 0x10000>; 1656 + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 1657 + <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, 1658 + <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1659 + interrupt-names = "peripheral", 1660 + "host", 1661 + "otg"; 1662 + phys = <&usb2_phy2>; 1663 + phy-names = "usb2-phy"; 1664 + maximum-speed = "high-speed"; 1665 + dr_mode = "otg"; 1666 + status = "disabled"; 1667 + snps,dis_u3_susphy_quirk; 1668 + snps,dis_u2_susphy_quirk; 1669 + }; 1670 + }; 2429 1671 }; 2430 1672 2431 1673 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */ 2432 - compatible = "ti,sysc"; 2433 - status = "disabled"; 1674 + compatible = "ti,sysc-omap4", "ti,sysc"; 1675 + ti,hwmods = "ocp2scp1"; 1676 + reg = <0xe8000 0x4>; 1677 + reg-names = "rev"; 1678 + /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1679 + clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>; 1680 + clock-names = "fck"; 2434 1681 #address-cells = <1>; 2435 1682 #size-cells = <1>; 2436 1683 ranges = <0x0 0xe8000 0x8000>; 1684 + 1685 + ocp2scp1: ocp2scp@0 { 1686 + compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 1687 + #address-cells = <1>; 1688 + #size-cells = <1>; 1689 + ranges = <0 0 0x8000>; 1690 + 1691 + usb2_phy2: phy@8000 { 1692 + compatible = "ti,am437x-usb2"; 1693 + reg = <0x0 0x8000>; 1694 + syscon-phy-power = <&scm_conf 0x628>; 1695 + clocks = <&usb_phy1_always_on_clk32k>, 1696 + <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>; 1697 + clock-names = "wkupclk", "refclk"; 1698 + #phy-cells = <0>; 1699 + status = "disabled"; 1700 + }; 1701 + }; 2437 1702 }; 2438 1703 2439 1704 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */