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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/xe/pcode: add struct drm_device based interface
In preparation for dropping the dependency on struct intel_uncore or
struct xe_tile from display code, add a struct drm_device based
interface to pcode.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/eeaa9cc8438caab2e22f9cb2142fbc18cc0fd861.1750678991.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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-1
+26
drivers/gpu/drm/xe/xe_pcode.c
+26
drivers/gpu/drm/xe/xe_pcode.c
···
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return xe_pcode_ready(xe, false);
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}
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ALLOW_ERROR_INJECTION(xe_pcode_probe_early, ERRNO); /* See xe_pci_probe */
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+
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/* Helpers with drm device */
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int intel_pcode_read(struct drm_device *drm, u32 mbox, u32 *val, u32 *val1)
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{
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struct xe_device *xe = to_xe_device(drm);
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struct xe_tile *tile = xe_device_get_root_tile(xe);
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+
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return xe_pcode_read(tile, mbox, val, val1);
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}
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int intel_pcode_write_timeout(struct drm_device *drm, u32 mbox, u32 val, int timeout_ms)
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{
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struct xe_device *xe = to_xe_device(drm);
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struct xe_tile *tile = xe_device_get_root_tile(xe);
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return xe_pcode_write_timeout(tile, mbox, val, timeout_ms);
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}
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int intel_pcode_request(struct drm_device *drm, u32 mbox, u32 request,
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u32 reply_mask, u32 reply, int timeout_base_ms)
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{
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struct xe_device *xe = to_xe_device(drm);
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struct xe_tile *tile = xe_device_get_root_tile(xe);
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return xe_pcode_request(tile, mbox, request, reply_mask, reply, timeout_base_ms);
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}
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-1
drivers/gpu/drm/xe/xe_pcode.h
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-1
drivers/gpu/drm/xe/xe_pcode.h
···
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#define _XE_PCODE_H_
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#include <linux/types.h>
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-
struct xe_tile;
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struct drm_device;
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struct xe_device;
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struct xe_tile;
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void xe_pcode_init(struct xe_tile *tile);
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int xe_pcode_probe_early(struct xe_device *xe);
···
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(FIELD_PREP(PCODE_MB_COMMAND, mbcmd)\
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| FIELD_PREP(PCODE_MB_PARAM1, param1)\
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| FIELD_PREP(PCODE_MB_PARAM2, param2))
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+
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/* Helpers with drm device */
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int intel_pcode_read(struct drm_device *drm, u32 mbox, u32 *val, u32 *val1);
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int intel_pcode_write_timeout(struct drm_device *drm, u32 mbox, u32 val, int timeout_ms);
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#define intel_pcode_write(drm, mbox, val) \
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intel_pcode_write_timeout((drm), (mbox), (val), 1)
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int intel_pcode_request(struct drm_device *drm, u32 mbox, u32 request,
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u32 reply_mask, u32 reply, int timeout_base_ms);
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#endif