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kernel
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linux
drm/amd/powerplay: tag swSMU code layers
Per designs, the swSMU code is separated into four layers. And the typical
calling flow should be like: amdgpu_smu.c -> ${asic}_ppt.c -> smu_v11/12_0.c
-> smu_cmn.c. Compile errors will come out for any violations. This can
help to prevent cross callings(e.g. amdgpu_smu.c -> ${asic}_ppt.c ->
amdgpu_smu.c -> ${asic}_ppt.c) which were common in our code.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Evan Quan
and committed by
Alex Deucher
d8e0b16d
70475931
+28
-9
+2
-2
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+2
-2
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
···
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#define SWSMU_CODE_LAYER_L1
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#include <linux/firmware.h>
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#include <linux/pci.h>
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#include "amdgpu.h"
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#include "amdgpu_smu.h"
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#include "smu_internal.h"
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-
#include "smu_v11_0.h"
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#include "smu_v12_0.h"
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#include "atom.h"
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#include "arcturus_ppt.h"
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#include "navi10_ppt.h"
+2
-1
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+2
-1
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+2
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+2
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
···
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#define WORKLOAD_MAP(profile, workload) \
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[profile] = {1, (workload)}
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#if !defined(SWSMU_CODE_LAYER_L2) && !defined(SWSMU_CODE_LAYER_L3) && !defined(SWSMU_CODE_LAYER_L4)
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int smu_load_microcode(struct smu_context *smu);
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int smu_check_fw_status(struct smu_context *smu);
···
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int smu_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value);
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#endif
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#endif
+3
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
+3
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
···
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BACO_SEQ_COUNT,
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};
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#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3)
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int smu_v11_0_init_microcode(struct smu_context *smu);
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void smu_v11_0_fini_microcode(struct smu_context *smu);
···
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uint32_t *min_value,
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uint32_t *max_value);
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+
#endif
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#endif
+3
drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
+3
drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
···
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#define MP1_Public 0x03b00000
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#define MP1_SRAM 0x03c00004
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#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3)
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int smu_v12_0_check_fw_status(struct smu_context *smu);
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int smu_v12_0_check_fw_version(struct smu_context *smu);
···
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int smu_v12_0_set_driver_table_location(struct smu_context *smu);
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+
#endif
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#endif
+2
-1
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+2
-1
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+2
-1
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+2
-1
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
···
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*
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*/
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#define SWSMU_CODE_LAYER_L2
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#include <linux/firmware.h>
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#include <linux/pci.h>
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#include "amdgpu.h"
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#include "amdgpu_smu.h"
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-
#include "smu_internal.h"
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#include "atomfirmware.h"
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#include "amdgpu_atomfirmware.h"
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#include "amdgpu_atombios.h"
+2
-1
drivers/gpu/drm/amd/powerplay/smu_cmn.c
+2
-1
drivers/gpu/drm/amd/powerplay/smu_cmn.c
+2
drivers/gpu/drm/amd/powerplay/smu_cmn.h
+2
drivers/gpu/drm/amd/powerplay/smu_cmn.h
···
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#include "amdgpu_smu.h"
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+
#if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4)
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int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,
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enum smu_message_type msg,
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uint32_t param,
···
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int smu_cmn_write_pptable(struct smu_context *smu);
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#endif
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#endif
+3
drivers/gpu/drm/amd/powerplay/smu_internal.h
+3
drivers/gpu/drm/amd/powerplay/smu_internal.h
···
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#include "amdgpu_smu.h"
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#if defined(SWSMU_CODE_LAYER_L1)
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#define smu_ppt_funcs(intf, ret, smu, args...) \
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((smu)->ppt_funcs ? ((smu)->ppt_funcs->intf ? (smu)->ppt_funcs->intf(smu, ##args) : ret) : -EINVAL)
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···
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#define smu_get_pp_feature_mask(smu, buf) smu_ppt_funcs(get_pp_feature_mask, 0, smu, buf)
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#define smu_set_pp_feature_mask(smu, new_mask) smu_ppt_funcs(set_pp_feature_mask, 0, smu, new_mask)
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#endif
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#endif
+1
-1
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+1
-1
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
···
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#include <linux/reboot.h>
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#define SMU_11_0_PARTIAL_PPTABLE
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#define SWSMU_CODE_LAYER_L3
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#include "amdgpu.h"
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#include "amdgpu_smu.h"
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#include "smu_internal.h"
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#include "atomfirmware.h"
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#include "amdgpu_atomfirmware.h"
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#include "amdgpu_atombios.h"
+2
-1
drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+2
-1
drivers/gpu/drm/amd/powerplay/smu_v12_0.c
···
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#define SWSMU_CODE_LAYER_L3
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#include <linux/firmware.h>
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#include "amdgpu.h"
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#include "amdgpu_smu.h"
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#include "smu_internal.h"
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#include "atomfirmware.h"
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#include "amdgpu_atomfirmware.h"
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#include "smu_v12_0.h"