drm/amdgpu: add renoir header files (v2)

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

This patch add all renoir header files.

v2: clean up headers (Alex)

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Huang Rui and committed by

Alex Deucher 6 years ago d8a46257 8b94d051

+1202

2 changed files

expand all

drivers

gpu

drm

amd

include

asic_reg

mp_12_0_0_offset.h

mp_12_0_0_sh_mask.h

+336

drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h

+866

drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_sh_mask.h

··· 1 + /* 2 + * Copyright (C) 2019 Advanced Micro Devices, Inc. 3 + * 4 + * Permission is hereby granted, free of charge, to any person obtaining a 5 + * copy of this software and associated documentation files (the "Software"), 6 + * to deal in the Software without restriction, including without limitation 7 + * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 + * and/or sell copies of the Software, and to permit persons to whom the 9 + * Software is furnished to do so, subject to the following conditions: 10 + * 11 + * The above copyright notice and this permission notice shall be included 12 + * in all copies or substantial portions of the Software. 13 + * 14 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 + * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18 + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 + */ 21 + #ifndef _mp_12_0_0_SH_MASK_HEADER 22 + #define _mp_12_0_0_SH_MASK_HEADER 23 + 24 + 25 + // addressBlock: mp_SmuMp0_SmnDec 26 + //MP0_SMN_C2PMSG_32 27 + #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 28 + #define MP0_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 29 + //MP0_SMN_C2PMSG_33 30 + #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 31 + #define MP0_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 32 + //MP0_SMN_C2PMSG_34 33 + #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 34 + #define MP0_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 35 + //MP0_SMN_C2PMSG_35 36 + #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 37 + #define MP0_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 38 + //MP0_SMN_C2PMSG_36 39 + #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 40 + #define MP0_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 41 + //MP0_SMN_C2PMSG_37 42 + #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 43 + #define MP0_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 44 + //MP0_SMN_C2PMSG_38 45 + #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 46 + #define MP0_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 47 + //MP0_SMN_C2PMSG_39 48 + #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 49 + #define MP0_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 50 + //MP0_SMN_C2PMSG_40 51 + #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 52 + #define MP0_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 53 + //MP0_SMN_C2PMSG_41 54 + #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 55 + #define MP0_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 56 + //MP0_SMN_C2PMSG_42 57 + #define MP0_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 58 + #define MP0_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 59 + //MP0_SMN_C2PMSG_43 60 + #define MP0_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 61 + #define MP0_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 62 + //MP0_SMN_C2PMSG_44 63 + #define MP0_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 64 + #define MP0_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 65 + //MP0_SMN_C2PMSG_45 66 + #define MP0_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 67 + #define MP0_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 68 + //MP0_SMN_C2PMSG_46 69 + #define MP0_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 70 + #define MP0_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 71 + //MP0_SMN_C2PMSG_47 72 + #define MP0_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 73 + #define MP0_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 74 + //MP0_SMN_C2PMSG_48 75 + #define MP0_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 76 + #define MP0_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 77 + //MP0_SMN_C2PMSG_49 78 + #define MP0_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 79 + #define MP0_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 80 + //MP0_SMN_C2PMSG_50 81 + #define MP0_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 82 + #define MP0_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 83 + //MP0_SMN_C2PMSG_51 84 + #define MP0_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 85 + #define MP0_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 86 + //MP0_SMN_C2PMSG_52 87 + #define MP0_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 88 + #define MP0_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 89 + //MP0_SMN_C2PMSG_53 90 + #define MP0_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 91 + #define MP0_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 92 + //MP0_SMN_C2PMSG_54 93 + #define MP0_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 94 + #define MP0_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 95 + //MP0_SMN_C2PMSG_55 96 + #define MP0_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 97 + #define MP0_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 98 + //MP0_SMN_C2PMSG_56 99 + #define MP0_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 100 + #define MP0_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 101 + //MP0_SMN_C2PMSG_57 102 + #define MP0_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 103 + #define MP0_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 104 + //MP0_SMN_C2PMSG_58 105 + #define MP0_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 106 + #define MP0_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 107 + //MP0_SMN_C2PMSG_59 108 + #define MP0_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 109 + #define MP0_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 110 + //MP0_SMN_C2PMSG_60 111 + #define MP0_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 112 + #define MP0_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 113 + //MP0_SMN_C2PMSG_61 114 + #define MP0_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 115 + #define MP0_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 116 + //MP0_SMN_C2PMSG_62 117 + #define MP0_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 118 + #define MP0_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 119 + //MP0_SMN_C2PMSG_63 120 + #define MP0_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 121 + #define MP0_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 122 + //MP0_SMN_C2PMSG_64 123 + #define MP0_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 124 + #define MP0_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 125 + //MP0_SMN_C2PMSG_65 126 + #define MP0_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 127 + #define MP0_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 128 + //MP0_SMN_C2PMSG_66 129 + #define MP0_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 130 + #define MP0_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 131 + //MP0_SMN_C2PMSG_67 132 + #define MP0_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 133 + #define MP0_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 134 + //MP0_SMN_C2PMSG_68 135 + #define MP0_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 136 + #define MP0_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 137 + //MP0_SMN_C2PMSG_69 138 + #define MP0_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 139 + #define MP0_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 140 + //MP0_SMN_C2PMSG_70 141 + #define MP0_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 142 + #define MP0_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 143 + //MP0_SMN_C2PMSG_71 144 + #define MP0_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 145 + #define MP0_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 146 + //MP0_SMN_C2PMSG_72 147 + #define MP0_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 148 + #define MP0_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 149 + //MP0_SMN_C2PMSG_73 150 + #define MP0_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 151 + #define MP0_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 152 + //MP0_SMN_C2PMSG_74 153 + #define MP0_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 154 + #define MP0_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 155 + //MP0_SMN_C2PMSG_75 156 + #define MP0_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 157 + #define MP0_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 158 + //MP0_SMN_C2PMSG_76 159 + #define MP0_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 160 + #define MP0_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 161 + //MP0_SMN_C2PMSG_77 162 + #define MP0_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 163 + #define MP0_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 164 + //MP0_SMN_C2PMSG_78 165 + #define MP0_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 166 + #define MP0_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 167 + //MP0_SMN_C2PMSG_79 168 + #define MP0_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 169 + #define MP0_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 170 + //MP0_SMN_C2PMSG_80 171 + #define MP0_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 172 + #define MP0_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 173 + //MP0_SMN_C2PMSG_81 174 + #define MP0_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 175 + #define MP0_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 176 + //MP0_SMN_C2PMSG_82 177 + #define MP0_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 178 + #define MP0_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 179 + //MP0_SMN_C2PMSG_83 180 + #define MP0_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 181 + #define MP0_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 182 + //MP0_SMN_C2PMSG_84 183 + #define MP0_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 184 + #define MP0_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 185 + //MP0_SMN_C2PMSG_85 186 + #define MP0_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 187 + #define MP0_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 188 + //MP0_SMN_C2PMSG_86 189 + #define MP0_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 190 + #define MP0_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 191 + //MP0_SMN_C2PMSG_87 192 + #define MP0_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 193 + #define MP0_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 194 + //MP0_SMN_C2PMSG_88 195 + #define MP0_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 196 + #define MP0_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 197 + //MP0_SMN_C2PMSG_89 198 + #define MP0_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 199 + #define MP0_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 200 + //MP0_SMN_C2PMSG_90 201 + #define MP0_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 202 + #define MP0_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 203 + //MP0_SMN_C2PMSG_91 204 + #define MP0_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 205 + #define MP0_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 206 + //MP0_SMN_C2PMSG_92 207 + #define MP0_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 208 + #define MP0_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 209 + //MP0_SMN_C2PMSG_93 210 + #define MP0_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 211 + #define MP0_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 212 + //MP0_SMN_C2PMSG_94 213 + #define MP0_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 214 + #define MP0_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 215 + //MP0_SMN_C2PMSG_95 216 + #define MP0_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 217 + #define MP0_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 218 + //MP0_SMN_C2PMSG_96 219 + #define MP0_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 220 + #define MP0_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 221 + //MP0_SMN_C2PMSG_97 222 + #define MP0_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 223 + #define MP0_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 224 + //MP0_SMN_C2PMSG_98 225 + #define MP0_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 226 + #define MP0_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 227 + //MP0_SMN_C2PMSG_99 228 + #define MP0_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 229 + #define MP0_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 230 + //MP0_SMN_C2PMSG_100 231 + #define MP0_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 232 + #define MP0_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 233 + //MP0_SMN_C2PMSG_101 234 + #define MP0_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 235 + #define MP0_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 236 + //MP0_SMN_C2PMSG_102 237 + #define MP0_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 238 + #define MP0_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 239 + //MP0_SMN_C2PMSG_103 240 + #define MP0_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 241 + #define MP0_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 242 + //MP0_SMN_IH_CREDIT 243 + #define MP0_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 244 + #define MP0_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 245 + #define MP0_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 246 + #define MP0_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 247 + //MP0_SMN_IH_SW_INT 248 + #define MP0_SMN_IH_SW_INT__ID__SHIFT 0x0 249 + #define MP0_SMN_IH_SW_INT__VALID__SHIFT 0x8 250 + #define MP0_SMN_IH_SW_INT__ID_MASK 0x000000FFL 251 + #define MP0_SMN_IH_SW_INT__VALID_MASK 0x00000100L 252 + 253 + 254 + // addressBlock: mp_SmuMp1_SmnDec 255 + //MP1_SMN_C2PMSG_32 256 + #define MP1_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 257 + #define MP1_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 258 + //MP1_SMN_C2PMSG_33 259 + #define MP1_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 260 + #define MP1_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 261 + //MP1_SMN_C2PMSG_34 262 + #define MP1_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 263 + #define MP1_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 264 + //MP1_SMN_C2PMSG_35 265 + #define MP1_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 266 + #define MP1_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 267 + //MP1_SMN_C2PMSG_36 268 + #define MP1_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 269 + #define MP1_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 270 + //MP1_SMN_C2PMSG_37 271 + #define MP1_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 272 + #define MP1_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 273 + //MP1_SMN_C2PMSG_38 274 + #define MP1_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 275 + #define MP1_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 276 + //MP1_SMN_C2PMSG_39 277 + #define MP1_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 278 + #define MP1_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 279 + //MP1_SMN_C2PMSG_40 280 + #define MP1_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 281 + #define MP1_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 282 + //MP1_SMN_C2PMSG_41 283 + #define MP1_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 284 + #define MP1_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 285 + //MP1_SMN_C2PMSG_42 286 + #define MP1_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 287 + #define MP1_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 288 + //MP1_SMN_C2PMSG_43 289 + #define MP1_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 290 + #define MP1_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 291 + //MP1_SMN_C2PMSG_44 292 + #define MP1_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 293 + #define MP1_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 294 + //MP1_SMN_C2PMSG_45 295 + #define MP1_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 296 + #define MP1_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 297 + //MP1_SMN_C2PMSG_46 298 + #define MP1_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 299 + #define MP1_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 300 + //MP1_SMN_C2PMSG_47 301 + #define MP1_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 302 + #define MP1_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 303 + //MP1_SMN_C2PMSG_48 304 + #define MP1_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 305 + #define MP1_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 306 + //MP1_SMN_C2PMSG_49 307 + #define MP1_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 308 + #define MP1_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 309 + //MP1_SMN_C2PMSG_50 310 + #define MP1_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 311 + #define MP1_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 312 + //MP1_SMN_C2PMSG_51 313 + #define MP1_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 314 + #define MP1_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 315 + //MP1_SMN_C2PMSG_52 316 + #define MP1_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 317 + #define MP1_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 318 + //MP1_SMN_C2PMSG_53 319 + #define MP1_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 320 + #define MP1_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 321 + //MP1_SMN_C2PMSG_54 322 + #define MP1_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 323 + #define MP1_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 324 + //MP1_SMN_C2PMSG_55 325 + #define MP1_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 326 + #define MP1_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 327 + //MP1_SMN_C2PMSG_56 328 + #define MP1_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 329 + #define MP1_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 330 + //MP1_SMN_C2PMSG_57 331 + #define MP1_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 332 + #define MP1_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 333 + //MP1_SMN_C2PMSG_58 334 + #define MP1_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 335 + #define MP1_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 336 + //MP1_SMN_C2PMSG_59 337 + #define MP1_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 338 + #define MP1_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 339 + //MP1_SMN_C2PMSG_60 340 + #define MP1_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 341 + #define MP1_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 342 + //MP1_SMN_C2PMSG_61 343 + #define MP1_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 344 + #define MP1_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 345 + //MP1_SMN_C2PMSG_62 346 + #define MP1_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 347 + #define MP1_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 348 + //MP1_SMN_C2PMSG_63 349 + #define MP1_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 350 + #define MP1_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 351 + //MP1_SMN_C2PMSG_64 352 + #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 353 + #define MP1_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 354 + //MP1_SMN_C2PMSG_65 355 + #define MP1_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 356 + #define MP1_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 357 + //MP1_SMN_C2PMSG_66 358 + #define MP1_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 359 + #define MP1_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 360 + //MP1_SMN_C2PMSG_67 361 + #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 362 + #define MP1_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 363 + //MP1_SMN_C2PMSG_68 364 + #define MP1_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 365 + #define MP1_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 366 + //MP1_SMN_C2PMSG_69 367 + #define MP1_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 368 + #define MP1_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 369 + //MP1_SMN_C2PMSG_70 370 + #define MP1_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 371 + #define MP1_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 372 + //MP1_SMN_C2PMSG_71 373 + #define MP1_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 374 + #define MP1_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 375 + //MP1_SMN_C2PMSG_72 376 + #define MP1_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 377 + #define MP1_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 378 + //MP1_SMN_C2PMSG_73 379 + #define MP1_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 380 + #define MP1_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 381 + //MP1_SMN_C2PMSG_74 382 + #define MP1_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 383 + #define MP1_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 384 + //MP1_SMN_C2PMSG_75 385 + #define MP1_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 386 + #define MP1_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 387 + //MP1_SMN_C2PMSG_76 388 + #define MP1_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 389 + #define MP1_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 390 + //MP1_SMN_C2PMSG_77 391 + #define MP1_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 392 + #define MP1_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 393 + //MP1_SMN_C2PMSG_78 394 + #define MP1_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 395 + #define MP1_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 396 + //MP1_SMN_C2PMSG_79 397 + #define MP1_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 398 + #define MP1_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 399 + //MP1_SMN_C2PMSG_80 400 + #define MP1_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 401 + #define MP1_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 402 + //MP1_SMN_C2PMSG_81 403 + #define MP1_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 404 + #define MP1_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 405 + //MP1_SMN_C2PMSG_82 406 + #define MP1_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 407 + #define MP1_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 408 + //MP1_SMN_C2PMSG_83 409 + #define MP1_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 410 + #define MP1_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 411 + //MP1_SMN_C2PMSG_84 412 + #define MP1_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 413 + #define MP1_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 414 + //MP1_SMN_C2PMSG_85 415 + #define MP1_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 416 + #define MP1_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 417 + //MP1_SMN_C2PMSG_86 418 + #define MP1_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 419 + #define MP1_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 420 + //MP1_SMN_C2PMSG_87 421 + #define MP1_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 422 + #define MP1_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 423 + //MP1_SMN_C2PMSG_88 424 + #define MP1_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 425 + #define MP1_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 426 + //MP1_SMN_C2PMSG_89 427 + #define MP1_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 428 + #define MP1_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 429 + //MP1_SMN_C2PMSG_90 430 + #define MP1_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 431 + #define MP1_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 432 + //MP1_SMN_C2PMSG_91 433 + #define MP1_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 434 + #define MP1_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 435 + //MP1_SMN_C2PMSG_92 436 + #define MP1_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 437 + #define MP1_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 438 + //MP1_SMN_C2PMSG_93 439 + #define MP1_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 440 + #define MP1_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 441 + //MP1_SMN_C2PMSG_94 442 + #define MP1_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 443 + #define MP1_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 444 + //MP1_SMN_C2PMSG_95 445 + #define MP1_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 446 + #define MP1_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 447 + //MP1_SMN_C2PMSG_96 448 + #define MP1_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 449 + #define MP1_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 450 + //MP1_SMN_C2PMSG_97 451 + #define MP1_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 452 + #define MP1_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 453 + //MP1_SMN_C2PMSG_98 454 + #define MP1_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 455 + #define MP1_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 456 + //MP1_SMN_C2PMSG_99 457 + #define MP1_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 458 + #define MP1_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 459 + //MP1_SMN_C2PMSG_100 460 + #define MP1_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 461 + #define MP1_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 462 + //MP1_SMN_C2PMSG_101 463 + #define MP1_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 464 + #define MP1_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 465 + //MP1_SMN_C2PMSG_102 466 + #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 467 + #define MP1_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 468 + //MP1_SMN_C2PMSG_103 469 + #define MP1_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 470 + #define MP1_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 471 + //MP1_SMN_IH_CREDIT 472 + #define MP1_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 473 + #define MP1_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 474 + #define MP1_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 475 + #define MP1_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 476 + //MP1_SMN_IH_SW_INT 477 + #define MP1_SMN_IH_SW_INT__ID__SHIFT 0x0 478 + #define MP1_SMN_IH_SW_INT__VALID__SHIFT 0x8 479 + #define MP1_SMN_IH_SW_INT__ID_MASK 0x000000FFL 480 + #define MP1_SMN_IH_SW_INT__VALID_MASK 0x00000100L 481 + //MP1_SMN_FPS_CNT 482 + #define MP1_SMN_FPS_CNT__COUNT__SHIFT 0x0 483 + #define MP1_SMN_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 484 + 485 + 486 + // addressBlock: mp_SmuMp0Pub_CruDec 487 + //MP0_IH_CREDIT 488 + #define MP0_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 489 + #define MP0_IH_CREDIT__CLIENT_ID__SHIFT 0x10 490 + #define MP0_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 491 + #define MP0_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 492 + //MP0_IH_SW_INT 493 + #define MP0_IH_SW_INT__ID__SHIFT 0x0 494 + #define MP0_IH_SW_INT__VALID__SHIFT 0x8 495 + #define MP0_IH_SW_INT__ID_MASK 0x000000FFL 496 + #define MP0_IH_SW_INT__VALID_MASK 0x00000100L 497 + //MP0_IH_SW_INT_CTRL 498 + #define MP0_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 499 + #define MP0_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 500 + #define MP0_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 501 + #define MP0_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 502 + 503 + 504 + // addressBlock: mp_SmuMp1Pub_CruDec 505 + //MP1_FIRMWARE_FLAGS 506 + #define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT 0x0 507 + #define MP1_FIRMWARE_FLAGS__RESERVED__SHIFT 0x1 508 + #define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK 0x00000001L 509 + #define MP1_FIRMWARE_FLAGS__RESERVED_MASK 0xFFFFFFFEL 510 + //MP1_C2PMSG_0 511 + #define MP1_C2PMSG_0__CONTENT__SHIFT 0x0 512 + #define MP1_C2PMSG_0__CONTENT_MASK 0xFFFFFFFFL 513 + //MP1_C2PMSG_1 514 + #define MP1_C2PMSG_1__CONTENT__SHIFT 0x0 515 + #define MP1_C2PMSG_1__CONTENT_MASK 0xFFFFFFFFL 516 + //MP1_C2PMSG_2 517 + #define MP1_C2PMSG_2__CONTENT__SHIFT 0x0 518 + #define MP1_C2PMSG_2__CONTENT_MASK 0xFFFFFFFFL 519 + //MP1_C2PMSG_3 520 + #define MP1_C2PMSG_3__CONTENT__SHIFT 0x0 521 + #define MP1_C2PMSG_3__CONTENT_MASK 0xFFFFFFFFL 522 + //MP1_C2PMSG_4 523 + #define MP1_C2PMSG_4__CONTENT__SHIFT 0x0 524 + #define MP1_C2PMSG_4__CONTENT_MASK 0xFFFFFFFFL 525 + //MP1_C2PMSG_5 526 + #define MP1_C2PMSG_5__CONTENT__SHIFT 0x0 527 + #define MP1_C2PMSG_5__CONTENT_MASK 0xFFFFFFFFL 528 + //MP1_C2PMSG_6 529 + #define MP1_C2PMSG_6__CONTENT__SHIFT 0x0 530 + #define MP1_C2PMSG_6__CONTENT_MASK 0xFFFFFFFFL 531 + //MP1_C2PMSG_7 532 + #define MP1_C2PMSG_7__CONTENT__SHIFT 0x0 533 + #define MP1_C2PMSG_7__CONTENT_MASK 0xFFFFFFFFL 534 + //MP1_C2PMSG_8 535 + #define MP1_C2PMSG_8__CONTENT__SHIFT 0x0 536 + #define MP1_C2PMSG_8__CONTENT_MASK 0xFFFFFFFFL 537 + //MP1_C2PMSG_9 538 + #define MP1_C2PMSG_9__CONTENT__SHIFT 0x0 539 + #define MP1_C2PMSG_9__CONTENT_MASK 0xFFFFFFFFL 540 + //MP1_C2PMSG_10 541 + #define MP1_C2PMSG_10__CONTENT__SHIFT 0x0 542 + #define MP1_C2PMSG_10__CONTENT_MASK 0xFFFFFFFFL 543 + //MP1_C2PMSG_11 544 + #define MP1_C2PMSG_11__CONTENT__SHIFT 0x0 545 + #define MP1_C2PMSG_11__CONTENT_MASK 0xFFFFFFFFL 546 + //MP1_C2PMSG_12 547 + #define MP1_C2PMSG_12__CONTENT__SHIFT 0x0 548 + #define MP1_C2PMSG_12__CONTENT_MASK 0xFFFFFFFFL 549 + //MP1_C2PMSG_13 550 + #define MP1_C2PMSG_13__CONTENT__SHIFT 0x0 551 + #define MP1_C2PMSG_13__CONTENT_MASK 0xFFFFFFFFL 552 + //MP1_C2PMSG_14 553 + #define MP1_C2PMSG_14__CONTENT__SHIFT 0x0 554 + #define MP1_C2PMSG_14__CONTENT_MASK 0xFFFFFFFFL 555 + //MP1_C2PMSG_15 556 + #define MP1_C2PMSG_15__CONTENT__SHIFT 0x0 557 + #define MP1_C2PMSG_15__CONTENT_MASK 0xFFFFFFFFL 558 + //MP1_C2PMSG_16 559 + #define MP1_C2PMSG_16__CONTENT__SHIFT 0x0 560 + #define MP1_C2PMSG_16__CONTENT_MASK 0xFFFFFFFFL 561 + //MP1_C2PMSG_17 562 + #define MP1_C2PMSG_17__CONTENT__SHIFT 0x0 563 + #define MP1_C2PMSG_17__CONTENT_MASK 0xFFFFFFFFL 564 + //MP1_C2PMSG_18 565 + #define MP1_C2PMSG_18__CONTENT__SHIFT 0x0 566 + #define MP1_C2PMSG_18__CONTENT_MASK 0xFFFFFFFFL 567 + //MP1_C2PMSG_19 568 + #define MP1_C2PMSG_19__CONTENT__SHIFT 0x0 569 + #define MP1_C2PMSG_19__CONTENT_MASK 0xFFFFFFFFL 570 + //MP1_C2PMSG_20 571 + #define MP1_C2PMSG_20__CONTENT__SHIFT 0x0 572 + #define MP1_C2PMSG_20__CONTENT_MASK 0xFFFFFFFFL 573 + //MP1_C2PMSG_21 574 + #define MP1_C2PMSG_21__CONTENT__SHIFT 0x0 575 + #define MP1_C2PMSG_21__CONTENT_MASK 0xFFFFFFFFL 576 + //MP1_C2PMSG_22 577 + #define MP1_C2PMSG_22__CONTENT__SHIFT 0x0 578 + #define MP1_C2PMSG_22__CONTENT_MASK 0xFFFFFFFFL 579 + //MP1_C2PMSG_23 580 + #define MP1_C2PMSG_23__CONTENT__SHIFT 0x0 581 + #define MP1_C2PMSG_23__CONTENT_MASK 0xFFFFFFFFL 582 + //MP1_C2PMSG_24 583 + #define MP1_C2PMSG_24__CONTENT__SHIFT 0x0 584 + #define MP1_C2PMSG_24__CONTENT_MASK 0xFFFFFFFFL 585 + //MP1_C2PMSG_25 586 + #define MP1_C2PMSG_25__CONTENT__SHIFT 0x0 587 + #define MP1_C2PMSG_25__CONTENT_MASK 0xFFFFFFFFL 588 + //MP1_C2PMSG_26 589 + #define MP1_C2PMSG_26__CONTENT__SHIFT 0x0 590 + #define MP1_C2PMSG_26__CONTENT_MASK 0xFFFFFFFFL 591 + //MP1_C2PMSG_27 592 + #define MP1_C2PMSG_27__CONTENT__SHIFT 0x0 593 + #define MP1_C2PMSG_27__CONTENT_MASK 0xFFFFFFFFL 594 + //MP1_C2PMSG_28 595 + #define MP1_C2PMSG_28__CONTENT__SHIFT 0x0 596 + #define MP1_C2PMSG_28__CONTENT_MASK 0xFFFFFFFFL 597 + //MP1_C2PMSG_29 598 + #define MP1_C2PMSG_29__CONTENT__SHIFT 0x0 599 + #define MP1_C2PMSG_29__CONTENT_MASK 0xFFFFFFFFL 600 + //MP1_C2PMSG_30 601 + #define MP1_C2PMSG_30__CONTENT__SHIFT 0x0 602 + #define MP1_C2PMSG_30__CONTENT_MASK 0xFFFFFFFFL 603 + //MP1_C2PMSG_31 604 + #define MP1_C2PMSG_31__CONTENT__SHIFT 0x0 605 + #define MP1_C2PMSG_31__CONTENT_MASK 0xFFFFFFFFL 606 + //MP1_P2CMSG_0 607 + #define MP1_P2CMSG_0__CONTENT__SHIFT 0x0 608 + #define MP1_P2CMSG_0__CONTENT_MASK 0xFFFFFFFFL 609 + //MP1_P2CMSG_1 610 + #define MP1_P2CMSG_1__CONTENT__SHIFT 0x0 611 + #define MP1_P2CMSG_1__CONTENT_MASK 0xFFFFFFFFL 612 + //MP1_P2CMSG_2 613 + #define MP1_P2CMSG_2__CONTENT__SHIFT 0x0 614 + #define MP1_P2CMSG_2__CONTENT_MASK 0xFFFFFFFFL 615 + //MP1_P2CMSG_3 616 + #define MP1_P2CMSG_3__CONTENT__SHIFT 0x0 617 + #define MP1_P2CMSG_3__CONTENT_MASK 0xFFFFFFFFL 618 + //MP1_P2CMSG_INTEN 619 + #define MP1_P2CMSG_INTEN__INTEN__SHIFT 0x0 620 + #define MP1_P2CMSG_INTEN__INTEN_MASK 0x0000000FL 621 + //MP1_P2CMSG_INTSTS 622 + #define MP1_P2CMSG_INTSTS__INTSTS0__SHIFT 0x0 623 + #define MP1_P2CMSG_INTSTS__INTSTS1__SHIFT 0x1 624 + #define MP1_P2CMSG_INTSTS__INTSTS2__SHIFT 0x2 625 + #define MP1_P2CMSG_INTSTS__INTSTS3__SHIFT 0x3 626 + #define MP1_P2CMSG_INTSTS__INTSTS0_MASK 0x00000001L 627 + #define MP1_P2CMSG_INTSTS__INTSTS1_MASK 0x00000002L 628 + #define MP1_P2CMSG_INTSTS__INTSTS2_MASK 0x00000004L 629 + #define MP1_P2CMSG_INTSTS__INTSTS3_MASK 0x00000008L 630 + //MP1_C2PMSG_32 631 + #define MP1_C2PMSG_32__CONTENT__SHIFT 0x0 632 + #define MP1_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 633 + //MP1_C2PMSG_33 634 + #define MP1_C2PMSG_33__CONTENT__SHIFT 0x0 635 + #define MP1_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 636 + //MP1_C2PMSG_34 637 + #define MP1_C2PMSG_34__CONTENT__SHIFT 0x0 638 + #define MP1_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 639 + //MP1_C2PMSG_35 640 + #define MP1_C2PMSG_35__CONTENT__SHIFT 0x0 641 + #define MP1_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 642 + //MP1_C2PMSG_36 643 + #define MP1_C2PMSG_36__CONTENT__SHIFT 0x0 644 + #define MP1_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 645 + //MP1_C2PMSG_37 646 + #define MP1_C2PMSG_37__CONTENT__SHIFT 0x0 647 + #define MP1_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 648 + //MP1_C2PMSG_38 649 + #define MP1_C2PMSG_38__CONTENT__SHIFT 0x0 650 + #define MP1_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 651 + //MP1_C2PMSG_39 652 + #define MP1_C2PMSG_39__CONTENT__SHIFT 0x0 653 + #define MP1_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 654 + //MP1_C2PMSG_40 655 + #define MP1_C2PMSG_40__CONTENT__SHIFT 0x0 656 + #define MP1_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 657 + //MP1_C2PMSG_41 658 + #define MP1_C2PMSG_41__CONTENT__SHIFT 0x0 659 + #define MP1_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 660 + //MP1_C2PMSG_42 661 + #define MP1_C2PMSG_42__CONTENT__SHIFT 0x0 662 + #define MP1_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 663 + //MP1_C2PMSG_43 664 + #define MP1_C2PMSG_43__CONTENT__SHIFT 0x0 665 + #define MP1_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 666 + //MP1_C2PMSG_44 667 + #define MP1_C2PMSG_44__CONTENT__SHIFT 0x0 668 + #define MP1_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 669 + //MP1_C2PMSG_45 670 + #define MP1_C2PMSG_45__CONTENT__SHIFT 0x0 671 + #define MP1_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 672 + //MP1_C2PMSG_46 673 + #define MP1_C2PMSG_46__CONTENT__SHIFT 0x0 674 + #define MP1_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 675 + //MP1_C2PMSG_47 676 + #define MP1_C2PMSG_47__CONTENT__SHIFT 0x0 677 + #define MP1_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 678 + //MP1_C2PMSG_48 679 + #define MP1_C2PMSG_48__CONTENT__SHIFT 0x0 680 + #define MP1_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 681 + //MP1_C2PMSG_49 682 + #define MP1_C2PMSG_49__CONTENT__SHIFT 0x0 683 + #define MP1_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 684 + //MP1_C2PMSG_50 685 + #define MP1_C2PMSG_50__CONTENT__SHIFT 0x0 686 + #define MP1_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 687 + //MP1_C2PMSG_51 688 + #define MP1_C2PMSG_51__CONTENT__SHIFT 0x0 689 + #define MP1_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 690 + //MP1_C2PMSG_52 691 + #define MP1_C2PMSG_52__CONTENT__SHIFT 0x0 692 + #define MP1_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 693 + //MP1_C2PMSG_53 694 + #define MP1_C2PMSG_53__CONTENT__SHIFT 0x0 695 + #define MP1_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 696 + //MP1_C2PMSG_54 697 + #define MP1_C2PMSG_54__CONTENT__SHIFT 0x0 698 + #define MP1_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 699 + //MP1_C2PMSG_55 700 + #define MP1_C2PMSG_55__CONTENT__SHIFT 0x0 701 + #define MP1_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 702 + //MP1_C2PMSG_56 703 + #define MP1_C2PMSG_56__CONTENT__SHIFT 0x0 704 + #define MP1_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 705 + //MP1_C2PMSG_57 706 + #define MP1_C2PMSG_57__CONTENT__SHIFT 0x0 707 + #define MP1_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 708 + //MP1_C2PMSG_58 709 + #define MP1_C2PMSG_58__CONTENT__SHIFT 0x0 710 + #define MP1_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 711 + //MP1_C2PMSG_59 712 + #define MP1_C2PMSG_59__CONTENT__SHIFT 0x0 713 + #define MP1_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 714 + //MP1_C2PMSG_60 715 + #define MP1_C2PMSG_60__CONTENT__SHIFT 0x0 716 + #define MP1_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 717 + //MP1_C2PMSG_61 718 + #define MP1_C2PMSG_61__CONTENT__SHIFT 0x0 719 + #define MP1_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 720 + //MP1_C2PMSG_62 721 + #define MP1_C2PMSG_62__CONTENT__SHIFT 0x0 722 + #define MP1_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 723 + //MP1_C2PMSG_63 724 + #define MP1_C2PMSG_63__CONTENT__SHIFT 0x0 725 + #define MP1_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 726 + //MP1_C2PMSG_64 727 + #define MP1_C2PMSG_64__CONTENT__SHIFT 0x0 728 + #define MP1_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 729 + //MP1_C2PMSG_65 730 + #define MP1_C2PMSG_65__CONTENT__SHIFT 0x0 731 + #define MP1_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 732 + //MP1_C2PMSG_66 733 + #define MP1_C2PMSG_66__CONTENT__SHIFT 0x0 734 + #define MP1_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 735 + //MP1_C2PMSG_67 736 + #define MP1_C2PMSG_67__CONTENT__SHIFT 0x0 737 + #define MP1_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 738 + //MP1_C2PMSG_68 739 + #define MP1_C2PMSG_68__CONTENT__SHIFT 0x0 740 + #define MP1_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 741 + //MP1_C2PMSG_69 742 + #define MP1_C2PMSG_69__CONTENT__SHIFT 0x0 743 + #define MP1_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 744 + //MP1_C2PMSG_70 745 + #define MP1_C2PMSG_70__CONTENT__SHIFT 0x0 746 + #define MP1_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 747 + //MP1_C2PMSG_71 748 + #define MP1_C2PMSG_71__CONTENT__SHIFT 0x0 749 + #define MP1_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 750 + //MP1_C2PMSG_72 751 + #define MP1_C2PMSG_72__CONTENT__SHIFT 0x0 752 + #define MP1_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 753 + //MP1_C2PMSG_73 754 + #define MP1_C2PMSG_73__CONTENT__SHIFT 0x0 755 + #define MP1_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 756 + //MP1_C2PMSG_74 757 + #define MP1_C2PMSG_74__CONTENT__SHIFT 0x0 758 + #define MP1_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 759 + //MP1_C2PMSG_75 760 + #define MP1_C2PMSG_75__CONTENT__SHIFT 0x0 761 + #define MP1_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 762 + //MP1_C2PMSG_76 763 + #define MP1_C2PMSG_76__CONTENT__SHIFT 0x0 764 + #define MP1_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 765 + //MP1_C2PMSG_77 766 + #define MP1_C2PMSG_77__CONTENT__SHIFT 0x0 767 + #define MP1_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 768 + //MP1_C2PMSG_78 769 + #define MP1_C2PMSG_78__CONTENT__SHIFT 0x0 770 + #define MP1_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 771 + //MP1_C2PMSG_79 772 + #define MP1_C2PMSG_79__CONTENT__SHIFT 0x0 773 + #define MP1_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 774 + //MP1_C2PMSG_80 775 + #define MP1_C2PMSG_80__CONTENT__SHIFT 0x0 776 + #define MP1_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 777 + //MP1_C2PMSG_81 778 + #define MP1_C2PMSG_81__CONTENT__SHIFT 0x0 779 + #define MP1_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 780 + //MP1_C2PMSG_82 781 + #define MP1_C2PMSG_82__CONTENT__SHIFT 0x0 782 + #define MP1_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 783 + //MP1_C2PMSG_83 784 + #define MP1_C2PMSG_83__CONTENT__SHIFT 0x0 785 + #define MP1_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 786 + //MP1_C2PMSG_84 787 + #define MP1_C2PMSG_84__CONTENT__SHIFT 0x0 788 + #define MP1_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 789 + //MP1_C2PMSG_85 790 + #define MP1_C2PMSG_85__CONTENT__SHIFT 0x0 791 + #define MP1_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 792 + //MP1_C2PMSG_86 793 + #define MP1_C2PMSG_86__CONTENT__SHIFT 0x0 794 + #define MP1_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 795 + //MP1_C2PMSG_87 796 + #define MP1_C2PMSG_87__CONTENT__SHIFT 0x0 797 + #define MP1_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 798 + //MP1_C2PMSG_88 799 + #define MP1_C2PMSG_88__CONTENT__SHIFT 0x0 800 + #define MP1_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 801 + //MP1_C2PMSG_89 802 + #define MP1_C2PMSG_89__CONTENT__SHIFT 0x0 803 + #define MP1_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 804 + //MP1_C2PMSG_90 805 + #define MP1_C2PMSG_90__CONTENT__SHIFT 0x0 806 + #define MP1_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 807 + //MP1_C2PMSG_91 808 + #define MP1_C2PMSG_91__CONTENT__SHIFT 0x0 809 + #define MP1_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 810 + //MP1_C2PMSG_92 811 + #define MP1_C2PMSG_92__CONTENT__SHIFT 0x0 812 + #define MP1_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 813 + //MP1_C2PMSG_93 814 + #define MP1_C2PMSG_93__CONTENT__SHIFT 0x0 815 + #define MP1_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 816 + //MP1_C2PMSG_94 817 + #define MP1_C2PMSG_94__CONTENT__SHIFT 0x0 818 + #define MP1_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 819 + //MP1_C2PMSG_95 820 + #define MP1_C2PMSG_95__CONTENT__SHIFT 0x0 821 + #define MP1_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 822 + //MP1_C2PMSG_96 823 + #define MP1_C2PMSG_96__CONTENT__SHIFT 0x0 824 + #define MP1_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 825 + //MP1_C2PMSG_97 826 + #define MP1_C2PMSG_97__CONTENT__SHIFT 0x0 827 + #define MP1_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 828 + //MP1_C2PMSG_98 829 + #define MP1_C2PMSG_98__CONTENT__SHIFT 0x0 830 + #define MP1_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 831 + //MP1_C2PMSG_99 832 + #define MP1_C2PMSG_99__CONTENT__SHIFT 0x0 833 + #define MP1_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 834 + //MP1_C2PMSG_100 835 + #define MP1_C2PMSG_100__CONTENT__SHIFT 0x0 836 + #define MP1_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 837 + //MP1_C2PMSG_101 838 + #define MP1_C2PMSG_101__CONTENT__SHIFT 0x0 839 + #define MP1_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 840 + //MP1_C2PMSG_102 841 + #define MP1_C2PMSG_102__CONTENT__SHIFT 0x0 842 + #define MP1_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 843 + //MP1_C2PMSG_103 844 + #define MP1_C2PMSG_103__CONTENT__SHIFT 0x0 845 + #define MP1_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 846 + //MP1_IH_CREDIT 847 + #define MP1_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 848 + #define MP1_IH_CREDIT__CLIENT_ID__SHIFT 0x10 849 + #define MP1_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 850 + #define MP1_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 851 + //MP1_IH_SW_INT 852 + #define MP1_IH_SW_INT__ID__SHIFT 0x0 853 + #define MP1_IH_SW_INT__VALID__SHIFT 0x8 854 + #define MP1_IH_SW_INT__ID_MASK 0x000000FFL 855 + #define MP1_IH_SW_INT__VALID_MASK 0x00000100L 856 + //MP1_IH_SW_INT_CTRL 857 + #define MP1_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 858 + #define MP1_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 859 + #define MP1_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 860 + #define MP1_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 861 + //MP1_FPS_CNT 862 + #define MP1_FPS_CNT__COUNT__SHIFT 0x0 863 + #define MP1_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 864 + 865 + 866 + #endif