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kernel
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linux
phy: mediatek: pcie: use new helper to update register bits
The new helper will use FIELD_PREP() macro to prepare bits value
according to mask, then we no need do it anymore.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220920090038.15133-6-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Chunfeng Yun
and committed by
Vinod Koul
d87f2b83
2b0c0043
+8
-9
+8
-9
drivers/phy/mediatek/phy-mtk-pcie.c
+8
-9
drivers/phy/mediatek/phy-mtk-pcie.c
···
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addr = pcie_phy->sif_base + PEXTP_ANA_LN0_TRX_REG +
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lane * PEXTP_ANA_LANE_OFFSET;
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-
mtk_phy_update_bits(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_PMOS_SEL,
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-
FIELD_PREP(EFUSE_LN_TX_PMOS_SEL, data->tx_pmos));
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+
mtk_phy_update_field(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_PMOS_SEL,
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+
data->tx_pmos);
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-
mtk_phy_update_bits(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_NMOS_SEL,
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FIELD_PREP(EFUSE_LN_TX_NMOS_SEL, data->tx_nmos));
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+
mtk_phy_update_field(addr + PEXTP_ANA_TX_REG, EFUSE_LN_TX_NMOS_SEL,
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+
data->tx_nmos);
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-
mtk_phy_update_bits(addr + PEXTP_ANA_RX_REG, EFUSE_LN_RX_SEL,
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FIELD_PREP(EFUSE_LN_RX_SEL, data->rx_data));
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+
mtk_phy_update_field(addr + PEXTP_ANA_RX_REG, EFUSE_LN_RX_SEL,
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+
data->rx_data);
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}
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/**
···
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return 0;
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/* Set global data */
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-
mtk_phy_update_bits(pcie_phy->sif_base + PEXTP_ANA_GLB_00_REG,
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EFUSE_GLB_INTR_SEL,
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FIELD_PREP(EFUSE_GLB_INTR_SEL, pcie_phy->efuse_glb_intr));
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+
mtk_phy_update_field(pcie_phy->sif_base + PEXTP_ANA_GLB_00_REG,
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+
EFUSE_GLB_INTR_SEL, pcie_phy->efuse_glb_intr);
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for (i = 0; i < pcie_phy->data->num_lanes; i++)
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mtk_pcie_efuse_set_lane(pcie_phy, i);