Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpio: tegra186: Fix tegra186_gpio_is_accessible() check

The controller has several register bits describing access control
information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it
means we have full read/write access to all the registers for given GPIO
pin. When SCR_SEC[R|W]EN is set, it means we need to further check the
accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all
the registers for given GPIO pin.

This check was previously declaring that a GPIO pin was accessible
only if either of the following conditions were met:

- SCR_SEC_REN + SCR_SEC_WEN both set

or

- SCR_SEC_REN + SCR_SEC_WEN both set and
SCR_SEC_G1R + SCR_SEC_G1W both set

Update the check to properly handle cases where only one of
SCR_SEC_REN or SCR_SEC_WEN is set.

Fixes: b2b56a163230 ("gpio: tegra186: Check GPIO pin permission before access.")
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20240424095514.24397-1-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

authored by

Prathamesh Shete and committed by
Bartosz Golaszewski
d806f474 ed30a4a5

+11 -9
+11 -9
drivers/gpio/gpio-tegra186.c
··· 36 36 #define TEGRA186_GPIO_SCR_SEC_REN BIT(27) 37 37 #define TEGRA186_GPIO_SCR_SEC_G1W BIT(9) 38 38 #define TEGRA186_GPIO_SCR_SEC_G1R BIT(1) 39 - #define TEGRA186_GPIO_FULL_ACCESS (TEGRA186_GPIO_SCR_SEC_WEN | \ 40 - TEGRA186_GPIO_SCR_SEC_REN | \ 41 - TEGRA186_GPIO_SCR_SEC_G1R | \ 42 - TEGRA186_GPIO_SCR_SEC_G1W) 43 - #define TEGRA186_GPIO_SCR_SEC_ENABLE (TEGRA186_GPIO_SCR_SEC_WEN | \ 44 - TEGRA186_GPIO_SCR_SEC_REN) 45 39 46 40 /* control registers */ 47 41 #define TEGRA186_GPIO_ENABLE_CONFIG 0x00 ··· 171 177 172 178 value = __raw_readl(secure + TEGRA186_GPIO_SCR); 173 179 174 - if ((value & TEGRA186_GPIO_SCR_SEC_ENABLE) == 0) 175 - return true; 180 + /* 181 + * When SCR_SEC_[R|W]EN is unset, then we have full read/write access to all the 182 + * registers for given GPIO pin. 183 + * When SCR_SEC[R|W]EN is set, then there is need to further check the accompanying 184 + * SCR_SEC_G1[R|W] bit to determine read/write access to all the registers for given 185 + * GPIO pin. 186 + */ 176 187 177 - if ((value & TEGRA186_GPIO_FULL_ACCESS) == TEGRA186_GPIO_FULL_ACCESS) 188 + if (((value & TEGRA186_GPIO_SCR_SEC_REN) == 0 || 189 + ((value & TEGRA186_GPIO_SCR_SEC_REN) && (value & TEGRA186_GPIO_SCR_SEC_G1R))) && 190 + ((value & TEGRA186_GPIO_SCR_SEC_WEN) == 0 || 191 + ((value & TEGRA186_GPIO_SCR_SEC_WEN) && (value & TEGRA186_GPIO_SCR_SEC_G1W)))) 178 192 return true; 179 193 180 194 return false;