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kernel os linux

dmaengine: dw: Remove misleading is_private property

The commit a9ddb575d6d6

("dmaengine: dw_dmac: Enhance device tree support")

introduces is_private property in uncertain understanding what does it mean.

First of all, documentation defines DMA_PRIVATE capability as

Documentation/crypto/async-tx-api.txt:
The DMA_PRIVATE capability flag is used to tag dma devices that should not be
used by the general-purpose allocator. It can be set at initialization time
if it is known that a channel will always be private. Alternatively,
it is set when dma_request_channel() finds an unused "public" channel.

A couple caveats to note when implementing a driver and consumer:
1/ Once a channel has been privately allocated it will no longer be
considered by the general-purpose allocator even after a call to
dma_release_channel().
2/ Since capabilities are specified at the device level a dma_device with
multiple channels will either have all channels public, or all channels
private.

Documentation/driver-api/dmaengine/provider.rst:
- DMA_PRIVATE
The devices only supports slave transfers, and as such isn't available
for async transfers.

The capability had been introduced by the commit 59b5ec21446b

("dmaengine: introduce dma_request_channel and private channels")

and some code didn't changed from that times ever.

Taking into consideration above and the fact that on all known platforms
Synopsys DesignWare DMA engine is attached to serve slave transfers,
the DMA_PRIVATE capability must be enabled for this device unconditionally.
Otherwise, as rightfully noticed in drivers/dma/at_xdmac.c:
/*
* Without DMA_PRIVATE the driver is not able to allocate more than
* one channel, second allocation fails in private_candidate.
*/
because of of a caveats mentioned in above documentation excerpts.

So, remove conditional around DMA_PRIVATE followed by removal leftovers.

If someone wonders, DMA_PRIVATE can be not used if and only if the all channels
of the DMA controller are supposed to serve memory-to-memory like operations.
For example, EP93xx has two controllers, one of which can only perform
memory-to-memory transfers

Note, this change doesn't affect dmatest to be able to test such controllers.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (maintainer:SERIAL DRIVERS)
Cc: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Andy Shevchenko and committed by
Vinod Koul
d7dba6be 87fe9ae8

+1 -13
-2
Documentation/devicetree/bindings/dma/snps-dma.txt
··· 23 23 24 24 25 25 Optional properties: 26 - - is_private: The device channels should be marked as private and not for by the 27 - general purpose DMA channel allocator. False if not passed. 28 26 - multi-block: Multi block transfers supported by hardware. Array property with 29 27 one cell per channel. 0: not supported, 1 (default): supported. 30 28 - snps,dma-protection-control: AHB HPROT[3:1] protection setting.
+1 -3
drivers/dma/dw/core.c
··· 1227 1227 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE); 1228 1228 1229 1229 /* Fill platform data with the default values */ 1230 - pdata->is_private = true; 1231 1230 pdata->is_memcpy = true; 1232 1231 pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING; 1233 1232 pdata->chan_priority = CHAN_PRIORITY_ASCENDING; ··· 1339 1340 1340 1341 /* Set capabilities */ 1341 1342 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); 1342 - if (pdata->is_private) 1343 - dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask); 1343 + dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask); 1344 1344 if (pdata->is_memcpy) 1345 1345 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); 1346 1346
-1
drivers/dma/dw/pci.c
··· 17 17 18 18 static struct dw_dma_platform_data mrfld_pdata = { 19 19 .nr_channels = 8, 20 - .is_private = true, 21 20 .is_memcpy = true, 22 21 .is_idma32 = true, 23 22 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
-3
drivers/dma/dw/platform.c
··· 128 128 pdata->nr_masters = nr_masters; 129 129 pdata->nr_channels = nr_channels; 130 130 131 - if (of_property_read_bool(np, "is_private")) 132 - pdata->is_private = true; 133 - 134 131 /* 135 132 * All known devices, which use DT for configuration, support 136 133 * memory-to-memory transfers. So enable it by default.
-1
drivers/tty/serial/8250/8250_lpss.c
··· 153 153 #ifdef CONFIG_SERIAL_8250_DMA 154 154 static const struct dw_dma_platform_data qrk_serial_dma_pdata = { 155 155 .nr_channels = 2, 156 - .is_private = true, 157 156 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, 158 157 .chan_priority = CHAN_PRIORITY_ASCENDING, 159 158 .block_size = 4095,
-3
include/linux/platform_data/dma-dw.h
··· 38 38 /** 39 39 * struct dw_dma_platform_data - Controller configuration parameters 40 40 * @nr_channels: Number of channels supported by hardware (max 8) 41 - * @is_private: The device channels should be marked as private and not for 42 - * by the general purpose DMA channel allocator. 43 41 * @is_memcpy: The device channels do support memory-to-memory transfers. 44 42 * @is_idma32: The type of the DMA controller is iDMA32 45 43 * @chan_allocation_order: Allocate channels starting from 0 or 7 ··· 51 53 */ 52 54 struct dw_dma_platform_data { 53 55 unsigned int nr_channels; 54 - bool is_private; 55 56 bool is_memcpy; 56 57 bool is_idma32; 57 58 #define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */