ARM: S5P6442: Cleanup map.h file

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

+38 -33
+38 -33
arch/arm/mach-s5p6442/include/mach/map.h
··· 1 1 /* linux/arch/arm/mach-s5p6442/include/mach/map.h 2 2 * 3 - * Copyright (c) 2010 Samsung Electronics Co., Ltd. 3 + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 4 4 * http://www.samsung.com/ 5 5 * 6 6 * S5P6442 - Memory map definitions ··· 16 16 #include <plat/map-base.h> 17 17 #include <plat/map-s5p.h> 18 18 19 - #define S5P6442_PA_CHIPID (0xE0000000) 20 - #define S5P_PA_CHIPID S5P6442_PA_CHIPID 19 + #define S5P6442_PA_SDRAM 0x20000000 21 20 22 - #define S5P6442_PA_SYSCON (0xE0100000) 23 - #define S5P_PA_SYSCON S5P6442_PA_SYSCON 21 + #define S5P6442_PA_I2S0 0xC0B00000 22 + #define S5P6442_PA_I2S1 0xF2200000 24 23 25 - #define S5P6442_PA_GPIO (0xE0200000) 24 + #define S5P6442_PA_CHIPID 0xE0000000 26 25 27 - #define S5P6442_PA_VIC0 (0xE4000000) 28 - #define S5P6442_PA_VIC1 (0xE4100000) 29 - #define S5P6442_PA_VIC2 (0xE4200000) 26 + #define S5P6442_PA_SYSCON 0xE0100000 30 27 31 - #define S5P6442_PA_SROMC (0xE7000000) 32 - #define S5P_PA_SROMC S5P6442_PA_SROMC 28 + #define S5P6442_PA_GPIO 0xE0200000 29 + 30 + #define S5P6442_PA_VIC0 0xE4000000 31 + #define S5P6442_PA_VIC1 0xE4100000 32 + #define S5P6442_PA_VIC2 0xE4200000 33 + 34 + #define S5P6442_PA_SROMC 0xE7000000 33 35 34 36 #define S5P6442_PA_MDMA 0xE8000000 35 37 #define S5P6442_PA_PDMA 0xE9000000 36 38 37 - #define S5P6442_PA_TIMER (0xEA000000) 38 - #define S5P_PA_TIMER S5P6442_PA_TIMER 39 + #define S5P6442_PA_TIMER 0xEA000000 39 40 40 - #define S5P6442_PA_SYSTIMER (0xEA100000) 41 + #define S5P6442_PA_SYSTIMER 0xEA100000 41 42 42 - #define S5P6442_PA_WATCHDOG (0xEA200000) 43 + #define S5P6442_PA_WATCHDOG 0xEA200000 43 44 44 - #define S5P6442_PA_UART (0xEC000000) 45 + #define S5P6442_PA_UART 0xEC000000 45 46 46 - #define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) 47 - #define S5P_PA_UART1 (S5P6442_PA_UART + 0x400) 48 - #define S5P_PA_UART2 (S5P6442_PA_UART + 0x800) 49 - #define S5P_SZ_UART SZ_256 50 - 51 - #define S5P6442_PA_IIC0 (0xEC100000) 52 - 53 - #define S5P6442_PA_SDRAM (0x20000000) 54 - #define S5P_PA_SDRAM S5P6442_PA_SDRAM 47 + #define S5P6442_PA_IIC0 0xEC100000 55 48 56 49 #define S5P6442_PA_SPI 0xEC300000 57 50 58 - /* I2S */ 59 - #define S5P6442_PA_I2S0 0xC0B00000 60 - #define S5P6442_PA_I2S1 0xF2200000 61 - 62 - /* PCM */ 63 51 #define S5P6442_PA_PCM0 0xF2400000 64 52 #define S5P6442_PA_PCM1 0xF2500000 65 53 66 - /* compatibiltiy defines. */ 67 - #define S3C_PA_WDT S5P6442_PA_WATCHDOG 68 - #define S3C_PA_UART S5P6442_PA_UART 54 + /* Compatibiltiy Defines */ 55 + 69 56 #define S3C_PA_IIC S5P6442_PA_IIC0 57 + #define S3C_PA_WDT S5P6442_PA_WATCHDOG 58 + 59 + #define S5P_PA_CHIPID S5P6442_PA_CHIPID 60 + #define S5P_PA_SDRAM S5P6442_PA_SDRAM 61 + #define S5P_PA_SROMC S5P6442_PA_SROMC 62 + #define S5P_PA_SYSCON S5P6442_PA_SYSCON 63 + #define S5P_PA_TIMER S5P6442_PA_TIMER 64 + 65 + /* UART */ 66 + 67 + #define S3C_PA_UART S5P6442_PA_UART 68 + 69 + #define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) 70 + #define S5P_PA_UART0 S5P_PA_UART(0) 71 + #define S5P_PA_UART1 S5P_PA_UART(1) 72 + #define S5P_PA_UART2 S5P_PA_UART(2) 73 + 74 + #define S5P_SZ_UART SZ_256 70 75 71 76 #endif /* __ASM_ARCH_MAP_H */