···2929#define WM8994_CONFIGURE_GPIO 0x800030303131#define WM8994_DRC_REGS 53232-#define WM8994_EQ_REGS 193232+#define WM8994_EQ_REGS 2033333434/**3535 * DRC configurations are specified with a label and a set of register
···33393339 int mask;33403340 int active;3341334133423342- mask = snd_soc_read(codec, WM8962_INTERRUPT_STATUS_2);33423342+ mask = snd_soc_read(codec, WM8962_INTERRUPT_STATUS_2_MASK);3343334333443344 active = snd_soc_read(codec, WM8962_INTERRUPT_STATUS_2);33453345 active &= ~mask;