Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mtd: nand: make use of nand_set/get_controller_data() helpers

New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[Brian: fixed a few rebase conflicts]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>

authored by

Boris BREZILLON and committed by
Brian Norris
d699ed25 d9dccc68

+260 -257
+3 -3
drivers/mtd/nand/ams-delta.c
··· 65 65 static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) 66 66 { 67 67 struct nand_chip *this = mtd_to_nand(mtd); 68 - void __iomem *io_base = this->priv; 68 + void __iomem *io_base = (void __iomem *)nand_get_controller_data(this); 69 69 70 70 writew(0, io_base + OMAP_MPUIO_IO_CNTL); 71 71 writew(byte, this->IO_ADDR_W); ··· 78 78 { 79 79 u_char res; 80 80 struct nand_chip *this = mtd_to_nand(mtd); 81 - void __iomem *io_base = this->priv; 81 + void __iomem *io_base = (void __iomem *)nand_get_controller_data(this); 82 82 83 83 gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0); 84 84 ndelay(40); ··· 206 206 goto out_free; 207 207 } 208 208 209 - this->priv = io_base; 209 + nand_set_controller_data(this, (void *)io_base); 210 210 211 211 /* Set address of NAND IO lines */ 212 212 this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
+28 -27
drivers/mtd/nand/atmel_nand.c
··· 182 182 static void atmel_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 183 183 { 184 184 struct nand_chip *nand_chip = mtd_to_nand(mtd); 185 - struct atmel_nand_host *host = nand_chip->priv; 185 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 186 186 187 187 if (ctrl & NAND_CTRL_CHANGE) { 188 188 if (ctrl & NAND_NCE) ··· 205 205 static int atmel_nand_device_ready(struct mtd_info *mtd) 206 206 { 207 207 struct nand_chip *nand_chip = mtd_to_nand(mtd); 208 - struct atmel_nand_host *host = nand_chip->priv; 208 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 209 209 210 210 return gpio_get_value(host->board.rdy_pin) ^ 211 211 !!host->board.rdy_pin_active_low; ··· 215 215 static int atmel_nand_set_enable_ready_pins(struct mtd_info *mtd) 216 216 { 217 217 struct nand_chip *chip = mtd_to_nand(mtd); 218 - struct atmel_nand_host *host = chip->priv; 218 + struct atmel_nand_host *host = nand_get_controller_data(chip); 219 219 int res = 0; 220 220 221 221 if (gpio_is_valid(host->board.rdy_pin)) { ··· 267 267 static void atmel_read_buf8(struct mtd_info *mtd, u8 *buf, int len) 268 268 { 269 269 struct nand_chip *nand_chip = mtd_to_nand(mtd); 270 - struct atmel_nand_host *host = nand_chip->priv; 270 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 271 271 272 272 if (host->nfc && host->nfc->use_nfc_sram && host->nfc->data_in_sram) { 273 273 memcpy(buf, host->nfc->data_in_sram, len); ··· 280 280 static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len) 281 281 { 282 282 struct nand_chip *nand_chip = mtd_to_nand(mtd); 283 - struct atmel_nand_host *host = nand_chip->priv; 283 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 284 284 285 285 if (host->nfc && host->nfc->use_nfc_sram && host->nfc->data_in_sram) { 286 286 memcpy(buf, host->nfc->data_in_sram, len); ··· 354 354 struct dma_async_tx_descriptor *tx = NULL; 355 355 dma_cookie_t cookie; 356 356 struct nand_chip *chip = mtd_to_nand(mtd); 357 - struct atmel_nand_host *host = chip->priv; 357 + struct atmel_nand_host *host = nand_get_controller_data(chip); 358 358 void *p = buf; 359 359 int err = -EIO; 360 360 enum dma_data_direction dir = is_read ? DMA_FROM_DEVICE : DMA_TO_DEVICE; ··· 427 427 static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len) 428 428 { 429 429 struct nand_chip *chip = mtd_to_nand(mtd); 430 - struct atmel_nand_host *host = chip->priv; 430 + struct atmel_nand_host *host = nand_get_controller_data(chip); 431 431 432 432 if (use_dma && len > mtd->oobsize) 433 433 /* only use DMA for bigger than oob size: better performances */ ··· 443 443 static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len) 444 444 { 445 445 struct nand_chip *chip = mtd_to_nand(mtd); 446 - struct atmel_nand_host *host = chip->priv; 446 + struct atmel_nand_host *host = nand_get_controller_data(chip); 447 447 448 448 if (use_dma && len > mtd->oobsize) 449 449 /* only use DMA for bigger than oob size: better performances */ ··· 535 535 static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector) 536 536 { 537 537 struct nand_chip *nand_chip = mtd_to_nand(mtd); 538 - struct atmel_nand_host *host = nand_chip->priv; 538 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 539 539 int i; 540 540 uint32_t value; 541 541 ··· 552 552 static void pmecc_substitute(struct mtd_info *mtd) 553 553 { 554 554 struct nand_chip *nand_chip = mtd_to_nand(mtd); 555 - struct atmel_nand_host *host = nand_chip->priv; 555 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 556 556 int16_t __iomem *alpha_to = host->pmecc_alpha_to; 557 557 int16_t __iomem *index_of = host->pmecc_index_of; 558 558 int16_t *partial_syn = host->pmecc_partial_syn; ··· 594 594 static void pmecc_get_sigma(struct mtd_info *mtd) 595 595 { 596 596 struct nand_chip *nand_chip = mtd_to_nand(mtd); 597 - struct atmel_nand_host *host = nand_chip->priv; 597 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 598 598 599 599 int16_t *lmu = host->pmecc_lmu; 600 600 int16_t *si = host->pmecc_si; ··· 752 752 static int pmecc_err_location(struct mtd_info *mtd) 753 753 { 754 754 struct nand_chip *nand_chip = mtd_to_nand(mtd); 755 - struct atmel_nand_host *host = nand_chip->priv; 755 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 756 756 unsigned long end_time; 757 757 const int cap = host->pmecc_corr_cap; 758 758 const int num = 2 * cap + 1; ··· 804 804 int sector_num, int extra_bytes, int err_nbr) 805 805 { 806 806 struct nand_chip *nand_chip = mtd_to_nand(mtd); 807 - struct atmel_nand_host *host = nand_chip->priv; 807 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 808 808 int i = 0; 809 809 int byte_pos, bit_pos, sector_size, pos; 810 810 uint32_t tmp; ··· 850 850 u8 *ecc) 851 851 { 852 852 struct nand_chip *nand_chip = mtd_to_nand(mtd); 853 - struct atmel_nand_host *host = nand_chip->priv; 853 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 854 854 int i, err_nbr; 855 855 uint8_t *buf_pos; 856 856 int max_bitflips = 0; ··· 920 920 static int atmel_nand_pmecc_read_page(struct mtd_info *mtd, 921 921 struct nand_chip *chip, uint8_t *buf, int oob_required, int page) 922 922 { 923 - struct atmel_nand_host *host = chip->priv; 923 + struct atmel_nand_host *host = nand_get_controller_data(chip); 924 924 int eccsize = chip->ecc.size * chip->ecc.steps; 925 925 uint8_t *oob = chip->oob_poi; 926 926 uint32_t *eccpos = chip->ecc.layout->eccpos; ··· 958 958 struct nand_chip *chip, const uint8_t *buf, int oob_required, 959 959 int page) 960 960 { 961 - struct atmel_nand_host *host = chip->priv; 961 + struct atmel_nand_host *host = nand_get_controller_data(chip); 962 962 uint32_t *eccpos = chip->ecc.layout->eccpos; 963 963 int i, j; 964 964 unsigned long end_time; ··· 994 994 static void atmel_pmecc_core_init(struct mtd_info *mtd) 995 995 { 996 996 struct nand_chip *nand_chip = mtd_to_nand(mtd); 997 - struct atmel_nand_host *host = nand_chip->priv; 997 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 998 998 uint32_t val = 0; 999 999 struct nand_ecclayout *ecc_layout; 1000 1000 ··· 1310 1310 const u_char *dat, unsigned char *ecc_code) 1311 1311 { 1312 1312 struct nand_chip *nand_chip = mtd_to_nand(mtd); 1313 - struct atmel_nand_host *host = nand_chip->priv; 1313 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 1314 1314 unsigned int ecc_value; 1315 1315 1316 1316 /* get the first 2 ECC bytes */ ··· 1356 1356 * Workaround: Reset the parity registers before reading the 1357 1357 * actual data. 1358 1358 */ 1359 - struct atmel_nand_host *host = chip->priv; 1359 + struct atmel_nand_host *host = nand_get_controller_data(chip); 1360 1360 if (host->board.need_reset_workaround) 1361 1361 ecc_writel(host->ecc, CR, ATMEL_ECC_RST); 1362 1362 ··· 1414 1414 u_char *read_ecc, u_char *isnull) 1415 1415 { 1416 1416 struct nand_chip *nand_chip = mtd_to_nand(mtd); 1417 - struct atmel_nand_host *host = nand_chip->priv; 1417 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 1418 1418 unsigned int ecc_status; 1419 1419 unsigned int ecc_word, ecc_bit; 1420 1420 ··· 1480 1480 static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) 1481 1481 { 1482 1482 struct nand_chip *nand_chip = mtd_to_nand(mtd); 1483 - struct atmel_nand_host *host = nand_chip->priv; 1483 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 1484 1484 1485 1485 if (host->board.need_reset_workaround) 1486 1486 ecc_writel(host->ecc, CR, ATMEL_ECC_RST); ··· 1773 1773 { 1774 1774 u32 status, mask; 1775 1775 struct nand_chip *nand_chip = mtd_to_nand(mtd); 1776 - struct atmel_nand_host *host = nand_chip->priv; 1776 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 1777 1777 1778 1778 status = nfc_read_status(host); 1779 1779 mask = nfc_readl(host->nfc->hsmc_regs, IMR); ··· 1789 1789 static void nfc_select_chip(struct mtd_info *mtd, int chip) 1790 1790 { 1791 1791 struct nand_chip *nand_chip = mtd_to_nand(mtd); 1792 - struct atmel_nand_host *host = nand_chip->priv; 1792 + struct atmel_nand_host *host = nand_get_controller_data(nand_chip); 1793 1793 1794 1794 if (chip == -1) 1795 1795 nfc_writel(host->nfc->hsmc_regs, CTRL, NFC_CTRL_DISABLE); ··· 1841 1841 int column, int page_addr) 1842 1842 { 1843 1843 struct nand_chip *chip = mtd_to_nand(mtd); 1844 - struct atmel_nand_host *host = chip->priv; 1844 + struct atmel_nand_host *host = nand_get_controller_data(chip); 1845 1845 unsigned long timeout; 1846 1846 unsigned int nfc_addr_cmd = 0; 1847 1847 ··· 1967 1967 { 1968 1968 int cfg, len; 1969 1969 int status = 0; 1970 - struct atmel_nand_host *host = chip->priv; 1970 + struct atmel_nand_host *host = nand_get_controller_data(chip); 1971 1971 void *sram = host->nfc->sram_bank0 + nfc_get_sram_off(host); 1972 1972 1973 1973 /* Subpage write is not supported */ ··· 2028 2028 static int nfc_sram_init(struct mtd_info *mtd) 2029 2029 { 2030 2030 struct nand_chip *chip = mtd_to_nand(mtd); 2031 - struct atmel_nand_host *host = chip->priv; 2031 + struct atmel_nand_host *host = nand_get_controller_data(chip); 2032 2032 int res = 0; 2033 2033 2034 2034 /* Initialize the NFC CFG register */ ··· 2127 2127 sizeof(struct atmel_nand_data)); 2128 2128 } 2129 2129 2130 - nand_chip->priv = host; /* link the private data structures */ 2130 + /* link the private data structures */ 2131 + nand_set_controller_data(nand_chip, host); 2131 2132 mtd->dev.parent = &pdev->dev; 2132 2133 2133 2134 /* Set address of NAND IO lines */
+1 -1
drivers/mtd/nand/bcm47xxnflash/main.c
··· 34 34 if (!b47n) 35 35 return -ENOMEM; 36 36 37 - b47n->nand_chip.priv = b47n; 37 + nand_set_controller_data(&b47n->nand_chip, b47n); 38 38 mtd = nand_to_mtd(&b47n->nand_chip); 39 39 mtd->dev.parent = &pdev->dev; 40 40 b47n->cc = container_of(nflash, struct bcma_drv_cc, nflash);
+8 -8
drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c
··· 90 90 int len) 91 91 { 92 92 struct nand_chip *nand_chip = mtd_to_nand(mtd); 93 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 93 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 94 94 95 95 u32 ctlcode; 96 96 u32 *dest = (u32 *)buf; ··· 140 140 const uint8_t *buf, int len) 141 141 { 142 142 struct nand_chip *nand_chip = mtd_to_nand(mtd); 143 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 143 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 144 144 struct bcma_drv_cc *cc = b47n->cc; 145 145 146 146 u32 ctlcode; ··· 174 174 unsigned int ctrl) 175 175 { 176 176 struct nand_chip *nand_chip = mtd_to_nand(mtd); 177 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 177 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 178 178 u32 code = 0; 179 179 180 180 if (cmd == NAND_CMD_NONE) ··· 200 200 static int bcm47xxnflash_ops_bcm4706_dev_ready(struct mtd_info *mtd) 201 201 { 202 202 struct nand_chip *nand_chip = mtd_to_nand(mtd); 203 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 203 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 204 204 205 205 return !!(bcma_cc_read32(b47n->cc, BCMA_CC_NFLASH_CTL) & NCTL_READY); 206 206 } ··· 217 217 int page_addr) 218 218 { 219 219 struct nand_chip *nand_chip = mtd_to_nand(mtd); 220 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 220 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 221 221 struct bcma_drv_cc *cc = b47n->cc; 222 222 u32 ctlcode; 223 223 int i; ··· 313 313 static u8 bcm47xxnflash_ops_bcm4706_read_byte(struct mtd_info *mtd) 314 314 { 315 315 struct nand_chip *nand_chip = mtd_to_nand(mtd); 316 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 316 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 317 317 struct bcma_drv_cc *cc = b47n->cc; 318 318 u32 tmp = 0; 319 319 ··· 342 342 uint8_t *buf, int len) 343 343 { 344 344 struct nand_chip *nand_chip = mtd_to_nand(mtd); 345 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 345 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 346 346 347 347 switch (b47n->curr_command) { 348 348 case NAND_CMD_READ0: ··· 358 358 const uint8_t *buf, int len) 359 359 { 360 360 struct nand_chip *nand_chip = mtd_to_nand(mtd); 361 - struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv; 361 + struct bcm47xxnflash *b47n = nand_get_controller_data(nand_chip); 362 362 363 363 switch (b47n->curr_command) { 364 364 case NAND_CMD_SEQIN:
+1 -1
drivers/mtd/nand/bf5xx_nand.c
··· 781 781 chip->cmd_ctrl = bf5xx_nand_hwcontrol; 782 782 chip->dev_ready = bf5xx_nand_devready; 783 783 784 - chip->priv = mtd; 784 + nand_set_controller_data(chip, mtd); 785 785 chip->controller = &info->controller; 786 786 787 787 chip->IO_ADDR_R = (void __iomem *) NFC_READ;
+15 -15
drivers/mtd/nand/brcmnand/brcmnand.c
··· 877 877 static void brcmnand_wp(struct mtd_info *mtd, int wp) 878 878 { 879 879 struct nand_chip *chip = mtd_to_nand(mtd); 880 - struct brcmnand_host *host = chip->priv; 880 + struct brcmnand_host *host = nand_get_controller_data(chip); 881 881 struct brcmnand_controller *ctrl = host->ctrl; 882 882 883 883 if ((ctrl->features & BRCMNAND_HAS_WP) && wp_on == 1) { ··· 1043 1043 static int brcmnand_waitfunc(struct mtd_info *mtd, struct nand_chip *this) 1044 1044 { 1045 1045 struct nand_chip *chip = mtd_to_nand(mtd); 1046 - struct brcmnand_host *host = chip->priv; 1046 + struct brcmnand_host *host = nand_get_controller_data(chip); 1047 1047 struct brcmnand_controller *ctrl = host->ctrl; 1048 1048 unsigned long timeo = msecs_to_jiffies(100); 1049 1049 ··· 1117 1117 int column, int page_addr) 1118 1118 { 1119 1119 struct nand_chip *chip = mtd_to_nand(mtd); 1120 - struct brcmnand_host *host = chip->priv; 1120 + struct brcmnand_host *host = nand_get_controller_data(chip); 1121 1121 struct brcmnand_controller *ctrl = host->ctrl; 1122 1122 u64 addr = (u64)page_addr << chip->page_shift; 1123 1123 int native_cmd = 0; ··· 1223 1223 static uint8_t brcmnand_read_byte(struct mtd_info *mtd) 1224 1224 { 1225 1225 struct nand_chip *chip = mtd_to_nand(mtd); 1226 - struct brcmnand_host *host = chip->priv; 1226 + struct brcmnand_host *host = nand_get_controller_data(chip); 1227 1227 struct brcmnand_controller *ctrl = host->ctrl; 1228 1228 uint8_t ret = 0; 1229 1229 int addr, offs; ··· 1290 1290 { 1291 1291 int i; 1292 1292 struct nand_chip *chip = mtd_to_nand(mtd); 1293 - struct brcmnand_host *host = chip->priv; 1293 + struct brcmnand_host *host = nand_get_controller_data(chip); 1294 1294 1295 1295 switch (host->last_cmd) { 1296 1296 case NAND_CMD_SET_FEATURES: ··· 1400 1400 u64 addr, unsigned int trans, u32 *buf, 1401 1401 u8 *oob, u64 *err_addr) 1402 1402 { 1403 - struct brcmnand_host *host = chip->priv; 1403 + struct brcmnand_host *host = nand_get_controller_data(chip); 1404 1404 struct brcmnand_controller *ctrl = host->ctrl; 1405 1405 int i, j, ret = 0; 1406 1406 ··· 1463 1463 static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip, 1464 1464 u64 addr, unsigned int trans, u32 *buf, u8 *oob) 1465 1465 { 1466 - struct brcmnand_host *host = chip->priv; 1466 + struct brcmnand_host *host = nand_get_controller_data(chip); 1467 1467 struct brcmnand_controller *ctrl = host->ctrl; 1468 1468 u64 err_addr = 0; 1469 1469 int err; ··· 1513 1513 static int brcmnand_read_page(struct mtd_info *mtd, struct nand_chip *chip, 1514 1514 uint8_t *buf, int oob_required, int page) 1515 1515 { 1516 - struct brcmnand_host *host = chip->priv; 1516 + struct brcmnand_host *host = nand_get_controller_data(chip); 1517 1517 u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL; 1518 1518 1519 1519 return brcmnand_read(mtd, chip, host->last_addr, ··· 1523 1523 static int brcmnand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, 1524 1524 uint8_t *buf, int oob_required, int page) 1525 1525 { 1526 - struct brcmnand_host *host = chip->priv; 1526 + struct brcmnand_host *host = nand_get_controller_data(chip); 1527 1527 u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL; 1528 1528 int ret; 1529 1529 ··· 1545 1545 static int brcmnand_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip, 1546 1546 int page) 1547 1547 { 1548 - struct brcmnand_host *host = chip->priv; 1548 + struct brcmnand_host *host = nand_get_controller_data(chip); 1549 1549 1550 1550 brcmnand_set_ecc_enabled(host, 0); 1551 1551 brcmnand_read(mtd, chip, (u64)page << chip->page_shift, ··· 1558 1558 static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip, 1559 1559 u64 addr, const u32 *buf, u8 *oob) 1560 1560 { 1561 - struct brcmnand_host *host = chip->priv; 1561 + struct brcmnand_host *host = nand_get_controller_data(chip); 1562 1562 struct brcmnand_controller *ctrl = host->ctrl; 1563 1563 unsigned int i, j, trans = mtd->writesize >> FC_SHIFT; 1564 1564 int status, ret = 0; ··· 1629 1629 static int brcmnand_write_page(struct mtd_info *mtd, struct nand_chip *chip, 1630 1630 const uint8_t *buf, int oob_required, int page) 1631 1631 { 1632 - struct brcmnand_host *host = chip->priv; 1632 + struct brcmnand_host *host = nand_get_controller_data(chip); 1633 1633 void *oob = oob_required ? chip->oob_poi : NULL; 1634 1634 1635 1635 brcmnand_write(mtd, chip, host->last_addr, (const u32 *)buf, oob); ··· 1640 1640 struct nand_chip *chip, const uint8_t *buf, 1641 1641 int oob_required, int page) 1642 1642 { 1643 - struct brcmnand_host *host = chip->priv; 1643 + struct brcmnand_host *host = nand_get_controller_data(chip); 1644 1644 void *oob = oob_required ? chip->oob_poi : NULL; 1645 1645 1646 1646 brcmnand_set_ecc_enabled(host, 0); ··· 1659 1659 static int brcmnand_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip, 1660 1660 int page) 1661 1661 { 1662 - struct brcmnand_host *host = chip->priv; 1662 + struct brcmnand_host *host = nand_get_controller_data(chip); 1663 1663 int ret; 1664 1664 1665 1665 brcmnand_set_ecc_enabled(host, 0); ··· 1923 1923 chip = &host->chip; 1924 1924 1925 1925 nand_set_flash_node(chip, dn); 1926 - chip->priv = host; 1926 + nand_set_controller_data(chip, host); 1927 1927 mtd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "brcmnand.%d", 1928 1928 host->cs); 1929 1929 mtd->owner = THIS_MODULE;
+12 -12
drivers/mtd/nand/cafe_nand.c
··· 102 102 static int cafe_device_ready(struct mtd_info *mtd) 103 103 { 104 104 struct nand_chip *chip = mtd_to_nand(mtd); 105 - struct cafe_priv *cafe = chip->priv; 105 + struct cafe_priv *cafe = nand_get_controller_data(chip); 106 106 int result = !!(cafe_readl(cafe, NAND_STATUS) & 0x40000000); 107 107 uint32_t irqs = cafe_readl(cafe, NAND_IRQ); 108 108 ··· 119 119 static void cafe_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 120 120 { 121 121 struct nand_chip *chip = mtd_to_nand(mtd); 122 - struct cafe_priv *cafe = chip->priv; 122 + struct cafe_priv *cafe = nand_get_controller_data(chip); 123 123 124 124 if (usedma) 125 125 memcpy(cafe->dmabuf + cafe->datalen, buf, len); ··· 135 135 static void cafe_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 136 136 { 137 137 struct nand_chip *chip = mtd_to_nand(mtd); 138 - struct cafe_priv *cafe = chip->priv; 138 + struct cafe_priv *cafe = nand_get_controller_data(chip); 139 139 140 140 if (usedma) 141 141 memcpy(buf, cafe->dmabuf + cafe->datalen, len); ··· 150 150 static uint8_t cafe_read_byte(struct mtd_info *mtd) 151 151 { 152 152 struct nand_chip *chip = mtd_to_nand(mtd); 153 - struct cafe_priv *cafe = chip->priv; 153 + struct cafe_priv *cafe = nand_get_controller_data(chip); 154 154 uint8_t d; 155 155 156 156 cafe_read_buf(mtd, &d, 1); ··· 163 163 int column, int page_addr) 164 164 { 165 165 struct nand_chip *chip = mtd_to_nand(mtd); 166 - struct cafe_priv *cafe = chip->priv; 166 + struct cafe_priv *cafe = nand_get_controller_data(chip); 167 167 int adrbytes = 0; 168 168 uint32_t ctl1; 169 169 uint32_t doneint = 0x80000000; ··· 319 319 static void cafe_select_chip(struct mtd_info *mtd, int chipnr) 320 320 { 321 321 struct nand_chip *chip = mtd_to_nand(mtd); 322 - struct cafe_priv *cafe = chip->priv; 322 + struct cafe_priv *cafe = nand_get_controller_data(chip); 323 323 324 324 cafe_dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr); 325 325 ··· 335 335 { 336 336 struct mtd_info *mtd = id; 337 337 struct nand_chip *chip = mtd_to_nand(mtd); 338 - struct cafe_priv *cafe = chip->priv; 338 + struct cafe_priv *cafe = nand_get_controller_data(chip); 339 339 uint32_t irqs = cafe_readl(cafe, NAND_IRQ); 340 340 cafe_writel(cafe, irqs & ~0x90000000, NAND_IRQ); 341 341 if (!irqs) ··· 384 384 static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, 385 385 uint8_t *buf, int oob_required, int page) 386 386 { 387 - struct cafe_priv *cafe = chip->priv; 387 + struct cafe_priv *cafe = nand_get_controller_data(chip); 388 388 unsigned int max_bitflips = 0; 389 389 390 390 cafe_dev_dbg(&cafe->pdev->dev, "ECC result %08x SYN1,2 %08x\n", ··· 526 526 const uint8_t *buf, int oob_required, 527 527 int page) 528 528 { 529 - struct cafe_priv *cafe = chip->priv; 529 + struct cafe_priv *cafe = nand_get_controller_data(chip); 530 530 531 531 chip->write_buf(mtd, buf, mtd->writesize); 532 532 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); ··· 611 611 612 612 mtd = nand_to_mtd(&cafe->nand); 613 613 mtd->dev.parent = &pdev->dev; 614 - cafe->nand.priv = cafe; 614 + nand_set_controller_data(&cafe->nand, cafe); 615 615 616 616 cafe->pdev = pdev; 617 617 cafe->mmio = pci_iomap(pdev, 0, 0); ··· 800 800 { 801 801 struct mtd_info *mtd = pci_get_drvdata(pdev); 802 802 struct nand_chip *chip = mtd_to_nand(mtd); 803 - struct cafe_priv *cafe = chip->priv; 803 + struct cafe_priv *cafe = nand_get_controller_data(chip); 804 804 805 805 /* Disable NAND IRQ in global IRQ mask register */ 806 806 cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK); ··· 828 828 uint32_t ctrl; 829 829 struct mtd_info *mtd = pci_get_drvdata(pdev); 830 830 struct nand_chip *chip = mtd_to_nand(mtd); 831 - struct cafe_priv *cafe = chip->priv; 831 + struct cafe_priv *cafe = nand_get_controller_data(chip); 832 832 833 833 /* Start off by resetting the NAND controller completely */ 834 834 cafe_writel(cafe, 1, NAND_RESET);
+35 -35
drivers/mtd/nand/diskonchip.c
··· 296 296 static void doc2000_write_byte(struct mtd_info *mtd, u_char datum) 297 297 { 298 298 struct nand_chip *this = mtd_to_nand(mtd); 299 - struct doc_priv *doc = this->priv; 299 + struct doc_priv *doc = nand_get_controller_data(this); 300 300 void __iomem *docptr = doc->virtadr; 301 301 302 302 if (debug) ··· 308 308 static u_char doc2000_read_byte(struct mtd_info *mtd) 309 309 { 310 310 struct nand_chip *this = mtd_to_nand(mtd); 311 - struct doc_priv *doc = this->priv; 311 + struct doc_priv *doc = nand_get_controller_data(this); 312 312 void __iomem *docptr = doc->virtadr; 313 313 u_char ret; 314 314 ··· 323 323 static void doc2000_writebuf(struct mtd_info *mtd, const u_char *buf, int len) 324 324 { 325 325 struct nand_chip *this = mtd_to_nand(mtd); 326 - struct doc_priv *doc = this->priv; 326 + struct doc_priv *doc = nand_get_controller_data(this); 327 327 void __iomem *docptr = doc->virtadr; 328 328 int i; 329 329 if (debug) ··· 340 340 static void doc2000_readbuf(struct mtd_info *mtd, u_char *buf, int len) 341 341 { 342 342 struct nand_chip *this = mtd_to_nand(mtd); 343 - struct doc_priv *doc = this->priv; 343 + struct doc_priv *doc = nand_get_controller_data(this); 344 344 void __iomem *docptr = doc->virtadr; 345 345 int i; 346 346 ··· 355 355 static void doc2000_readbuf_dword(struct mtd_info *mtd, u_char *buf, int len) 356 356 { 357 357 struct nand_chip *this = mtd_to_nand(mtd); 358 - struct doc_priv *doc = this->priv; 358 + struct doc_priv *doc = nand_get_controller_data(this); 359 359 void __iomem *docptr = doc->virtadr; 360 360 int i; 361 361 ··· 376 376 static uint16_t __init doc200x_ident_chip(struct mtd_info *mtd, int nr) 377 377 { 378 378 struct nand_chip *this = mtd_to_nand(mtd); 379 - struct doc_priv *doc = this->priv; 379 + struct doc_priv *doc = nand_get_controller_data(this); 380 380 uint16_t ret; 381 381 382 382 doc200x_select_chip(mtd, nr); ··· 422 422 static void __init doc2000_count_chips(struct mtd_info *mtd) 423 423 { 424 424 struct nand_chip *this = mtd_to_nand(mtd); 425 - struct doc_priv *doc = this->priv; 425 + struct doc_priv *doc = nand_get_controller_data(this); 426 426 uint16_t mfrid; 427 427 int i; 428 428 ··· 443 443 444 444 static int doc200x_wait(struct mtd_info *mtd, struct nand_chip *this) 445 445 { 446 - struct doc_priv *doc = this->priv; 446 + struct doc_priv *doc = nand_get_controller_data(this); 447 447 448 448 int status; 449 449 ··· 458 458 static void doc2001_write_byte(struct mtd_info *mtd, u_char datum) 459 459 { 460 460 struct nand_chip *this = mtd_to_nand(mtd); 461 - struct doc_priv *doc = this->priv; 461 + struct doc_priv *doc = nand_get_controller_data(this); 462 462 void __iomem *docptr = doc->virtadr; 463 463 464 464 WriteDOC(datum, docptr, CDSNSlowIO); ··· 469 469 static u_char doc2001_read_byte(struct mtd_info *mtd) 470 470 { 471 471 struct nand_chip *this = mtd_to_nand(mtd); 472 - struct doc_priv *doc = this->priv; 472 + struct doc_priv *doc = nand_get_controller_data(this); 473 473 void __iomem *docptr = doc->virtadr; 474 474 475 475 //ReadDOC(docptr, CDSNSlowIO); ··· 483 483 static void doc2001_writebuf(struct mtd_info *mtd, const u_char *buf, int len) 484 484 { 485 485 struct nand_chip *this = mtd_to_nand(mtd); 486 - struct doc_priv *doc = this->priv; 486 + struct doc_priv *doc = nand_get_controller_data(this); 487 487 void __iomem *docptr = doc->virtadr; 488 488 int i; 489 489 ··· 496 496 static void doc2001_readbuf(struct mtd_info *mtd, u_char *buf, int len) 497 497 { 498 498 struct nand_chip *this = mtd_to_nand(mtd); 499 - struct doc_priv *doc = this->priv; 499 + struct doc_priv *doc = nand_get_controller_data(this); 500 500 void __iomem *docptr = doc->virtadr; 501 501 int i; 502 502 ··· 513 513 static u_char doc2001plus_read_byte(struct mtd_info *mtd) 514 514 { 515 515 struct nand_chip *this = mtd_to_nand(mtd); 516 - struct doc_priv *doc = this->priv; 516 + struct doc_priv *doc = nand_get_controller_data(this); 517 517 void __iomem *docptr = doc->virtadr; 518 518 u_char ret; 519 519 ··· 528 528 static void doc2001plus_writebuf(struct mtd_info *mtd, const u_char *buf, int len) 529 529 { 530 530 struct nand_chip *this = mtd_to_nand(mtd); 531 - struct doc_priv *doc = this->priv; 531 + struct doc_priv *doc = nand_get_controller_data(this); 532 532 void __iomem *docptr = doc->virtadr; 533 533 int i; 534 534 ··· 546 546 static void doc2001plus_readbuf(struct mtd_info *mtd, u_char *buf, int len) 547 547 { 548 548 struct nand_chip *this = mtd_to_nand(mtd); 549 - struct doc_priv *doc = this->priv; 549 + struct doc_priv *doc = nand_get_controller_data(this); 550 550 void __iomem *docptr = doc->virtadr; 551 551 int i; 552 552 ··· 577 577 static void doc2001plus_select_chip(struct mtd_info *mtd, int chip) 578 578 { 579 579 struct nand_chip *this = mtd_to_nand(mtd); 580 - struct doc_priv *doc = this->priv; 580 + struct doc_priv *doc = nand_get_controller_data(this); 581 581 void __iomem *docptr = doc->virtadr; 582 582 int floor = 0; 583 583 ··· 604 604 static void doc200x_select_chip(struct mtd_info *mtd, int chip) 605 605 { 606 606 struct nand_chip *this = mtd_to_nand(mtd); 607 - struct doc_priv *doc = this->priv; 607 + struct doc_priv *doc = nand_get_controller_data(this); 608 608 void __iomem *docptr = doc->virtadr; 609 609 int floor = 0; 610 610 ··· 635 635 unsigned int ctrl) 636 636 { 637 637 struct nand_chip *this = mtd_to_nand(mtd); 638 - struct doc_priv *doc = this->priv; 638 + struct doc_priv *doc = nand_get_controller_data(this); 639 639 void __iomem *docptr = doc->virtadr; 640 640 641 641 if (ctrl & NAND_CTRL_CHANGE) { ··· 658 658 static void doc2001plus_command(struct mtd_info *mtd, unsigned command, int column, int page_addr) 659 659 { 660 660 struct nand_chip *this = mtd_to_nand(mtd); 661 - struct doc_priv *doc = this->priv; 661 + struct doc_priv *doc = nand_get_controller_data(this); 662 662 void __iomem *docptr = doc->virtadr; 663 663 664 664 /* ··· 764 764 static int doc200x_dev_ready(struct mtd_info *mtd) 765 765 { 766 766 struct nand_chip *this = mtd_to_nand(mtd); 767 - struct doc_priv *doc = this->priv; 767 + struct doc_priv *doc = nand_get_controller_data(this); 768 768 void __iomem *docptr = doc->virtadr; 769 769 770 770 if (DoC_is_MillenniumPlus(doc)) { ··· 804 804 static void doc200x_enable_hwecc(struct mtd_info *mtd, int mode) 805 805 { 806 806 struct nand_chip *this = mtd_to_nand(mtd); 807 - struct doc_priv *doc = this->priv; 807 + struct doc_priv *doc = nand_get_controller_data(this); 808 808 void __iomem *docptr = doc->virtadr; 809 809 810 810 /* Prime the ECC engine */ ··· 823 823 static void doc2001plus_enable_hwecc(struct mtd_info *mtd, int mode) 824 824 { 825 825 struct nand_chip *this = mtd_to_nand(mtd); 826 - struct doc_priv *doc = this->priv; 826 + struct doc_priv *doc = nand_get_controller_data(this); 827 827 void __iomem *docptr = doc->virtadr; 828 828 829 829 /* Prime the ECC engine */ ··· 843 843 static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat, unsigned char *ecc_code) 844 844 { 845 845 struct nand_chip *this = mtd_to_nand(mtd); 846 - struct doc_priv *doc = this->priv; 846 + struct doc_priv *doc = nand_get_controller_data(this); 847 847 void __iomem *docptr = doc->virtadr; 848 848 int i; 849 849 int emptymatch = 1; ··· 904 904 { 905 905 int i, ret = 0; 906 906 struct nand_chip *this = mtd_to_nand(mtd); 907 - struct doc_priv *doc = this->priv; 907 + struct doc_priv *doc = nand_get_controller_data(this); 908 908 void __iomem *docptr = doc->virtadr; 909 909 uint8_t calc_ecc[6]; 910 910 volatile u_char dummy; ··· 975 975 static int __init find_media_headers(struct mtd_info *mtd, u_char *buf, const char *id, int findmirror) 976 976 { 977 977 struct nand_chip *this = mtd_to_nand(mtd); 978 - struct doc_priv *doc = this->priv; 978 + struct doc_priv *doc = nand_get_controller_data(this); 979 979 unsigned offs; 980 980 int ret; 981 981 size_t retlen; ··· 1018 1018 static inline int __init nftl_partscan(struct mtd_info *mtd, struct mtd_partition *parts) 1019 1019 { 1020 1020 struct nand_chip *this = mtd_to_nand(mtd); 1021 - struct doc_priv *doc = this->priv; 1021 + struct doc_priv *doc = nand_get_controller_data(this); 1022 1022 int ret = 0; 1023 1023 u_char *buf; 1024 1024 struct NFTLMediaHeader *mh; ··· 1120 1120 static inline int __init inftl_partscan(struct mtd_info *mtd, struct mtd_partition *parts) 1121 1121 { 1122 1122 struct nand_chip *this = mtd_to_nand(mtd); 1123 - struct doc_priv *doc = this->priv; 1123 + struct doc_priv *doc = nand_get_controller_data(this); 1124 1124 int ret = 0; 1125 1125 u_char *buf; 1126 1126 struct INFTLMediaHeader *mh; ··· 1240 1240 { 1241 1241 int ret, numparts; 1242 1242 struct nand_chip *this = mtd_to_nand(mtd); 1243 - struct doc_priv *doc = this->priv; 1243 + struct doc_priv *doc = nand_get_controller_data(this); 1244 1244 struct mtd_partition parts[2]; 1245 1245 1246 1246 memset((char *)parts, 0, sizeof(parts)); ··· 1275 1275 { 1276 1276 int ret, numparts; 1277 1277 struct nand_chip *this = mtd_to_nand(mtd); 1278 - struct doc_priv *doc = this->priv; 1278 + struct doc_priv *doc = nand_get_controller_data(this); 1279 1279 struct mtd_partition parts[5]; 1280 1280 1281 1281 if (this->numchips > doc->chips_per_floor) { ··· 1328 1328 static inline int __init doc2000_init(struct mtd_info *mtd) 1329 1329 { 1330 1330 struct nand_chip *this = mtd_to_nand(mtd); 1331 - struct doc_priv *doc = this->priv; 1331 + struct doc_priv *doc = nand_get_controller_data(this); 1332 1332 1333 1333 this->read_byte = doc2000_read_byte; 1334 1334 this->write_buf = doc2000_writebuf; ··· 1344 1344 static inline int __init doc2001_init(struct mtd_info *mtd) 1345 1345 { 1346 1346 struct nand_chip *this = mtd_to_nand(mtd); 1347 - struct doc_priv *doc = this->priv; 1347 + struct doc_priv *doc = nand_get_controller_data(this); 1348 1348 1349 1349 this->read_byte = doc2001_read_byte; 1350 1350 this->write_buf = doc2001_writebuf; ··· 1374 1374 static inline int __init doc2001plus_init(struct mtd_info *mtd) 1375 1375 { 1376 1376 struct nand_chip *this = mtd_to_nand(mtd); 1377 - struct doc_priv *doc = this->priv; 1377 + struct doc_priv *doc = nand_get_controller_data(this); 1378 1378 1379 1379 this->read_byte = doc2001plus_read_byte; 1380 1380 this->write_buf = doc2001plus_writebuf; ··· 1491 1491 unsigned char oldval; 1492 1492 unsigned char newval; 1493 1493 nand = mtd_to_nand(mtd); 1494 - doc = nand->priv; 1494 + doc = nand_get_controller_data(nand); 1495 1495 /* Use the alias resolution register to determine if this is 1496 1496 in fact the same DOC aliased to a new address. If writes 1497 1497 to one chip's alias resolution register change the value on ··· 1538 1538 1539 1539 mtd->owner = THIS_MODULE; 1540 1540 1541 - nand->priv = doc; 1541 + nand_set_controller_data(nand, doc); 1542 1542 nand->select_chip = doc200x_select_chip; 1543 1543 nand->cmd_ctrl = doc200x_hwcontrol; 1544 1544 nand->dev_ready = doc200x_dev_ready; ··· 1611 1611 1612 1612 for (mtd = doclist; mtd; mtd = nextmtd) { 1613 1613 nand = mtd_to_nand(mtd); 1614 - doc = nand->priv; 1614 + doc = nand_get_controller_data(nand); 1615 1615 1616 1616 nextmtd = doc->nextdoc; 1617 1617 nand_release(mtd);
+20 -20
drivers/mtd/nand/docg4.c
··· 297 297 static int docg4_wait(struct mtd_info *mtd, struct nand_chip *nand) 298 298 { 299 299 300 - struct docg4_priv *doc = nand->priv; 300 + struct docg4_priv *doc = nand_get_controller_data(nand); 301 301 int status = NAND_STATUS_WP; /* inverse logic?? */ 302 302 dev_dbg(doc->dev, "%s...\n", __func__); 303 303 ··· 319 319 * not yet supported, so the only valid non-negative value is 0. 320 320 */ 321 321 struct nand_chip *nand = mtd_to_nand(mtd); 322 - struct docg4_priv *doc = nand->priv; 322 + struct docg4_priv *doc = nand_get_controller_data(nand); 323 323 void __iomem *docptr = doc->virtadr; 324 324 325 325 dev_dbg(doc->dev, "%s: chip %d\n", __func__, chip); ··· 338 338 /* full device reset */ 339 339 340 340 struct nand_chip *nand = mtd_to_nand(mtd); 341 - struct docg4_priv *doc = nand->priv; 341 + struct docg4_priv *doc = nand_get_controller_data(nand); 342 342 void __iomem *docptr = doc->virtadr; 343 343 344 344 writew(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN, ··· 376 376 */ 377 377 378 378 struct nand_chip *nand = mtd_to_nand(mtd); 379 - struct docg4_priv *doc = nand->priv; 379 + struct docg4_priv *doc = nand_get_controller_data(nand); 380 380 void __iomem *docptr = doc->virtadr; 381 381 int i, numerrs, errpos[4]; 382 382 const uint8_t blank_read_hwecc[8] = { ··· 465 465 static uint8_t docg4_read_byte(struct mtd_info *mtd) 466 466 { 467 467 struct nand_chip *nand = mtd_to_nand(mtd); 468 - struct docg4_priv *doc = nand->priv; 468 + struct docg4_priv *doc = nand_get_controller_data(nand); 469 469 470 470 dev_dbg(doc->dev, "%s\n", __func__); 471 471 ··· 546 546 */ 547 547 548 548 struct nand_chip *nand = mtd_to_nand(mtd); 549 - struct docg4_priv *doc = nand->priv; 549 + struct docg4_priv *doc = nand_get_controller_data(nand); 550 550 void __iomem *docptr = doc->virtadr; 551 551 int retval = 0; 552 552 ··· 583 583 /* common starting sequence for all operations */ 584 584 585 585 struct nand_chip *nand = mtd_to_nand(mtd); 586 - struct docg4_priv *doc = nand->priv; 586 + struct docg4_priv *doc = nand_get_controller_data(nand); 587 587 void __iomem *docptr = doc->virtadr; 588 588 589 589 writew(DOC_CTRL_UNKNOWN | DOC_CTRL_CE, docptr + DOC_FLASHCONTROL); ··· 600 600 /* first step in reading a page */ 601 601 602 602 struct nand_chip *nand = mtd_to_nand(mtd); 603 - struct docg4_priv *doc = nand->priv; 603 + struct docg4_priv *doc = nand_get_controller_data(nand); 604 604 void __iomem *docptr = doc->virtadr; 605 605 606 606 dev_dbg(doc->dev, ··· 627 627 /* first step in writing a page */ 628 628 629 629 struct nand_chip *nand = mtd_to_nand(mtd); 630 - struct docg4_priv *doc = nand->priv; 630 + struct docg4_priv *doc = nand_get_controller_data(nand); 631 631 void __iomem *docptr = doc->virtadr; 632 632 633 633 dev_dbg(doc->dev, ··· 692 692 /* handle standard nand commands */ 693 693 694 694 struct nand_chip *nand = mtd_to_nand(mtd); 695 - struct docg4_priv *doc = nand->priv; 695 + struct docg4_priv *doc = nand_get_controller_data(nand); 696 696 uint32_t g4_addr = mtd_to_docg4_address(page_addr, column); 697 697 698 698 dev_dbg(doc->dev, "%s %x, page_addr=%x, column=%x\n", ··· 756 756 static int read_page(struct mtd_info *mtd, struct nand_chip *nand, 757 757 uint8_t *buf, int page, bool use_ecc) 758 758 { 759 - struct docg4_priv *doc = nand->priv; 759 + struct docg4_priv *doc = nand_get_controller_data(nand); 760 760 void __iomem *docptr = doc->virtadr; 761 761 uint16_t status, edc_err, *buf16; 762 762 int bits_corrected = 0; ··· 836 836 static int docg4_read_oob(struct mtd_info *mtd, struct nand_chip *nand, 837 837 int page) 838 838 { 839 - struct docg4_priv *doc = nand->priv; 839 + struct docg4_priv *doc = nand_get_controller_data(nand); 840 840 void __iomem *docptr = doc->virtadr; 841 841 uint16_t status; 842 842 ··· 875 875 static int docg4_erase_block(struct mtd_info *mtd, int page) 876 876 { 877 877 struct nand_chip *nand = mtd_to_nand(mtd); 878 - struct docg4_priv *doc = nand->priv; 878 + struct docg4_priv *doc = nand_get_controller_data(nand); 879 879 void __iomem *docptr = doc->virtadr; 880 880 uint16_t g4_page; 881 881 ··· 923 923 static int write_page(struct mtd_info *mtd, struct nand_chip *nand, 924 924 const uint8_t *buf, bool use_ecc) 925 925 { 926 - struct docg4_priv *doc = nand->priv; 926 + struct docg4_priv *doc = nand_get_controller_data(nand); 927 927 void __iomem *docptr = doc->virtadr; 928 928 uint8_t ecc_buf[8]; 929 929 ··· 1003 1003 */ 1004 1004 1005 1005 /* note that bytes 7..14 are hw generated hamming/ecc and overwritten */ 1006 - struct docg4_priv *doc = nand->priv; 1006 + struct docg4_priv *doc = nand_get_controller_data(nand); 1007 1007 doc->oob_page = page; 1008 1008 memcpy(doc->oob_buf, nand->oob_poi, 16); 1009 1009 return 0; ··· 1017 1017 */ 1018 1018 1019 1019 struct nand_chip *nand = mtd_to_nand(mtd); 1020 - struct docg4_priv *doc = nand->priv; 1020 + struct docg4_priv *doc = nand_get_controller_data(nand); 1021 1021 uint32_t g4_addr = mtd_to_docg4_address(DOCG4_FACTORY_BBT_PAGE, 0); 1022 1022 uint8_t *buf; 1023 1023 int i, block; ··· 1090 1090 int ret, i; 1091 1091 uint8_t *buf; 1092 1092 struct nand_chip *nand = mtd_to_nand(mtd); 1093 - struct docg4_priv *doc = nand->priv; 1093 + struct docg4_priv *doc = nand_get_controller_data(nand); 1094 1094 struct nand_bbt_descr *bbtd = nand->badblock_pattern; 1095 1095 int page = (int)(ofs >> nand->page_shift); 1096 1096 uint32_t g4_addr = mtd_to_docg4_address(page, 0); ··· 1203 1203 */ 1204 1204 1205 1205 struct nand_chip *nand = mtd_to_nand(mtd); 1206 - struct docg4_priv *doc = nand->priv; 1206 + struct docg4_priv *doc = nand_get_controller_data(nand); 1207 1207 1208 1208 mtd->size = DOCG4_CHIP_SIZE; 1209 1209 mtd->name = "Msys_Diskonchip_G4"; ··· 1262 1262 static int __init read_id_reg(struct mtd_info *mtd) 1263 1263 { 1264 1264 struct nand_chip *nand = mtd_to_nand(mtd); 1265 - struct docg4_priv *doc = nand->priv; 1265 + struct docg4_priv *doc = nand_get_controller_data(nand); 1266 1266 void __iomem *docptr = doc->virtadr; 1267 1267 uint16_t id1, id2; 1268 1268 ··· 1314 1314 1315 1315 mtd = nand_to_mtd(nand); 1316 1316 doc = (struct docg4_priv *) (nand + 1); 1317 - nand->priv = doc; 1317 + nand_set_controller_data(nand, doc); 1318 1318 mtd->dev.parent = &pdev->dev; 1319 1319 doc->virtadr = virtadr; 1320 1320 doc->dev = dev;
+11 -11
drivers/mtd/nand/fsl_elbc_nand.c
··· 144 144 static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) 145 145 { 146 146 struct nand_chip *chip = mtd_to_nand(mtd); 147 - struct fsl_elbc_mtd *priv = chip->priv; 147 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 148 148 struct fsl_lbc_ctrl *ctrl = priv->ctrl; 149 149 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; 150 150 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; ··· 195 195 static int fsl_elbc_run_command(struct mtd_info *mtd) 196 196 { 197 197 struct nand_chip *chip = mtd_to_nand(mtd); 198 - struct fsl_elbc_mtd *priv = chip->priv; 198 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 199 199 struct fsl_lbc_ctrl *ctrl = priv->ctrl; 200 200 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; 201 201 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; ··· 267 267 268 268 static void fsl_elbc_do_read(struct nand_chip *chip, int oob) 269 269 { 270 - struct fsl_elbc_mtd *priv = chip->priv; 270 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 271 271 struct fsl_lbc_ctrl *ctrl = priv->ctrl; 272 272 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; 273 273 ··· 300 300 int column, int page_addr) 301 301 { 302 302 struct nand_chip *chip = mtd_to_nand(mtd); 303 - struct fsl_elbc_mtd *priv = chip->priv; 303 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 304 304 struct fsl_lbc_ctrl *ctrl = priv->ctrl; 305 305 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; 306 306 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; ··· 525 525 static void fsl_elbc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) 526 526 { 527 527 struct nand_chip *chip = mtd_to_nand(mtd); 528 - struct fsl_elbc_mtd *priv = chip->priv; 528 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 529 529 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; 530 530 unsigned int bufsize = mtd->writesize + mtd->oobsize; 531 531 ··· 563 563 static u8 fsl_elbc_read_byte(struct mtd_info *mtd) 564 564 { 565 565 struct nand_chip *chip = mtd_to_nand(mtd); 566 - struct fsl_elbc_mtd *priv = chip->priv; 566 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 567 567 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; 568 568 569 569 /* If there are still bytes in the FCM, then use the next byte. */ ··· 580 580 static void fsl_elbc_read_buf(struct mtd_info *mtd, u8 *buf, int len) 581 581 { 582 582 struct nand_chip *chip = mtd_to_nand(mtd); 583 - struct fsl_elbc_mtd *priv = chip->priv; 583 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 584 584 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; 585 585 int avail; 586 586 ··· 604 604 */ 605 605 static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip) 606 606 { 607 - struct fsl_elbc_mtd *priv = chip->priv; 607 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 608 608 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand; 609 609 610 610 if (elbc_fcm_ctrl->status != LTESR_CC) ··· 619 619 static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) 620 620 { 621 621 struct nand_chip *chip = mtd_to_nand(mtd); 622 - struct fsl_elbc_mtd *priv = chip->priv; 622 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 623 623 struct fsl_lbc_ctrl *ctrl = priv->ctrl; 624 624 struct fsl_lbc_regs __iomem *lbc = ctrl->regs; 625 625 unsigned int al; ··· 696 696 static int fsl_elbc_read_page(struct mtd_info *mtd, struct nand_chip *chip, 697 697 uint8_t *buf, int oob_required, int page) 698 698 { 699 - struct fsl_elbc_mtd *priv = chip->priv; 699 + struct fsl_elbc_mtd *priv = nand_get_controller_data(chip); 700 700 struct fsl_lbc_ctrl *ctrl = priv->ctrl; 701 701 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand; 702 702 ··· 770 770 chip->bbt_options = NAND_BBT_USE_FLASH; 771 771 772 772 chip->controller = &elbc_fcm_ctrl->controller; 773 - chip->priv = priv; 773 + nand_set_controller_data(chip, priv); 774 774 775 775 chip->ecc.read_page = fsl_elbc_read_page; 776 776 chip->ecc.write_page = fsl_elbc_write_page;
+13 -13
drivers/mtd/nand/fsl_ifc_nand.c
··· 230 230 static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) 231 231 { 232 232 struct nand_chip *chip = mtd_to_nand(mtd); 233 - struct fsl_ifc_mtd *priv = chip->priv; 233 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 234 234 struct fsl_ifc_ctrl *ctrl = priv->ctrl; 235 235 struct fsl_ifc_regs __iomem *ifc = ctrl->regs; 236 236 int buf_num; ··· 253 253 static int is_blank(struct mtd_info *mtd, unsigned int bufnum) 254 254 { 255 255 struct nand_chip *chip = mtd_to_nand(mtd); 256 - struct fsl_ifc_mtd *priv = chip->priv; 256 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 257 257 u8 __iomem *addr = priv->vbase + bufnum * (mtd->writesize * 2); 258 258 u32 __iomem *mainarea = (u32 __iomem *)addr; 259 259 u8 __iomem *oob = addr + mtd->writesize; ··· 292 292 static void fsl_ifc_run_command(struct mtd_info *mtd) 293 293 { 294 294 struct nand_chip *chip = mtd_to_nand(mtd); 295 - struct fsl_ifc_mtd *priv = chip->priv; 295 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 296 296 struct fsl_ifc_ctrl *ctrl = priv->ctrl; 297 297 struct fsl_ifc_nand_ctrl *nctrl = ifc_nand_ctrl; 298 298 struct fsl_ifc_regs __iomem *ifc = ctrl->regs; ··· 369 369 int oob, 370 370 struct mtd_info *mtd) 371 371 { 372 - struct fsl_ifc_mtd *priv = chip->priv; 372 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 373 373 struct fsl_ifc_ctrl *ctrl = priv->ctrl; 374 374 struct fsl_ifc_regs __iomem *ifc = ctrl->regs; 375 375 ··· 409 409 static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, 410 410 int column, int page_addr) { 411 411 struct nand_chip *chip = mtd_to_nand(mtd); 412 - struct fsl_ifc_mtd *priv = chip->priv; 412 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 413 413 struct fsl_ifc_ctrl *ctrl = priv->ctrl; 414 414 struct fsl_ifc_regs __iomem *ifc = ctrl->regs; 415 415 ··· 624 624 static void fsl_ifc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) 625 625 { 626 626 struct nand_chip *chip = mtd_to_nand(mtd); 627 - struct fsl_ifc_mtd *priv = chip->priv; 627 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 628 628 unsigned int bufsize = mtd->writesize + mtd->oobsize; 629 629 630 630 if (len <= 0) { ··· 650 650 static uint8_t fsl_ifc_read_byte(struct mtd_info *mtd) 651 651 { 652 652 struct nand_chip *chip = mtd_to_nand(mtd); 653 - struct fsl_ifc_mtd *priv = chip->priv; 653 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 654 654 unsigned int offset; 655 655 656 656 /* ··· 673 673 static uint8_t fsl_ifc_read_byte16(struct mtd_info *mtd) 674 674 { 675 675 struct nand_chip *chip = mtd_to_nand(mtd); 676 - struct fsl_ifc_mtd *priv = chip->priv; 676 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 677 677 uint16_t data; 678 678 679 679 /* ··· 696 696 static void fsl_ifc_read_buf(struct mtd_info *mtd, u8 *buf, int len) 697 697 { 698 698 struct nand_chip *chip = mtd_to_nand(mtd); 699 - struct fsl_ifc_mtd *priv = chip->priv; 699 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 700 700 int avail; 701 701 702 702 if (len < 0) { ··· 721 721 */ 722 722 static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip) 723 723 { 724 - struct fsl_ifc_mtd *priv = chip->priv; 724 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 725 725 struct fsl_ifc_ctrl *ctrl = priv->ctrl; 726 726 struct fsl_ifc_regs __iomem *ifc = ctrl->regs; 727 727 u32 nand_fsr; ··· 750 750 static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip, 751 751 uint8_t *buf, int oob_required, int page) 752 752 { 753 - struct fsl_ifc_mtd *priv = chip->priv; 753 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 754 754 struct fsl_ifc_ctrl *ctrl = priv->ctrl; 755 755 struct fsl_ifc_nand_ctrl *nctrl = ifc_nand_ctrl; 756 756 ··· 782 782 static int fsl_ifc_chip_init_tail(struct mtd_info *mtd) 783 783 { 784 784 struct nand_chip *chip = mtd_to_nand(mtd); 785 - struct fsl_ifc_mtd *priv = chip->priv; 785 + struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); 786 786 787 787 dev_dbg(priv->dev, "%s: nand->numchips = %d\n", __func__, 788 788 chip->numchips); ··· 914 914 } 915 915 916 916 chip->controller = &ifc_nand_ctrl->controller; 917 - chip->priv = priv; 917 + nand_set_controller_data(chip, priv); 918 918 919 919 chip->ecc.read_page = fsl_ifc_read_page; 920 920 chip->ecc.write_page = fsl_ifc_write_page;
+1 -1
drivers/mtd/nand/fsmc_nand.c
··· 1009 1009 /* Link all private pointers */ 1010 1010 mtd = nand_to_mtd(&host->nand); 1011 1011 nand = &host->nand; 1012 - nand->priv = host; 1012 + nand_set_controller_data(nand, host); 1013 1013 nand_set_flash_node(nand, np); 1014 1014 1015 1015 mtd->dev.parent = &pdev->dev;
+14 -14
drivers/mtd/nand/gpmi-nand/gpmi-nand.c
··· 857 857 static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) 858 858 { 859 859 struct nand_chip *chip = mtd_to_nand(mtd); 860 - struct gpmi_nand_data *this = chip->priv; 860 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 861 861 int ret; 862 862 863 863 /* ··· 891 891 static int gpmi_dev_ready(struct mtd_info *mtd) 892 892 { 893 893 struct nand_chip *chip = mtd_to_nand(mtd); 894 - struct gpmi_nand_data *this = chip->priv; 894 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 895 895 896 896 return gpmi_is_ready(this, this->current_chip); 897 897 } ··· 899 899 static void gpmi_select_chip(struct mtd_info *mtd, int chipnr) 900 900 { 901 901 struct nand_chip *chip = mtd_to_nand(mtd); 902 - struct gpmi_nand_data *this = chip->priv; 902 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 903 903 904 904 if ((this->current_chip < 0) && (chipnr >= 0)) 905 905 gpmi_begin(this); ··· 912 912 static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 913 913 { 914 914 struct nand_chip *chip = mtd_to_nand(mtd); 915 - struct gpmi_nand_data *this = chip->priv; 915 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 916 916 917 917 dev_dbg(this->dev, "len is %d\n", len); 918 918 this->upper_buf = buf; ··· 924 924 static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 925 925 { 926 926 struct nand_chip *chip = mtd_to_nand(mtd); 927 - struct gpmi_nand_data *this = chip->priv; 927 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 928 928 929 929 dev_dbg(this->dev, "len is %d\n", len); 930 930 this->upper_buf = (uint8_t *)buf; ··· 936 936 static uint8_t gpmi_read_byte(struct mtd_info *mtd) 937 937 { 938 938 struct nand_chip *chip = mtd_to_nand(mtd); 939 - struct gpmi_nand_data *this = chip->priv; 939 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 940 940 uint8_t *buf = this->data_buffer_dma; 941 941 942 942 gpmi_read_buf(mtd, buf, 1); ··· 994 994 static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip, 995 995 uint8_t *buf, int oob_required, int page) 996 996 { 997 - struct gpmi_nand_data *this = chip->priv; 997 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 998 998 struct bch_geometry *nfc_geo = &this->bch_geometry; 999 999 void *payload_virt; 1000 1000 dma_addr_t payload_phys; ··· 1074 1074 static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, 1075 1075 uint32_t offs, uint32_t len, uint8_t *buf, int page) 1076 1076 { 1077 - struct gpmi_nand_data *this = chip->priv; 1077 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 1078 1078 void __iomem *bch_regs = this->resources.bch_regs; 1079 1079 struct bch_geometry old_geo = this->bch_geometry; 1080 1080 struct bch_geometry *geo = &this->bch_geometry; ··· 1162 1162 static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip, 1163 1163 const uint8_t *buf, int oob_required, int page) 1164 1164 { 1165 - struct gpmi_nand_data *this = chip->priv; 1165 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 1166 1166 struct bch_geometry *nfc_geo = &this->bch_geometry; 1167 1167 const void *payload_virt; 1168 1168 dma_addr_t payload_phys; ··· 1298 1298 static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, 1299 1299 int page) 1300 1300 { 1301 - struct gpmi_nand_data *this = chip->priv; 1301 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 1302 1302 1303 1303 dev_dbg(this->dev, "page number is %d\n", page); 1304 1304 /* clear the OOB buffer */ ··· 1359 1359 struct nand_chip *chip, uint8_t *buf, 1360 1360 int oob_required, int page) 1361 1361 { 1362 - struct gpmi_nand_data *this = chip->priv; 1362 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 1363 1363 struct bch_geometry *nfc_geo = &this->bch_geometry; 1364 1364 int eccsize = nfc_geo->ecc_chunk_size; 1365 1365 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; ··· 1448 1448 const uint8_t *buf, 1449 1449 int oob_required, int page) 1450 1450 { 1451 - struct gpmi_nand_data *this = chip->priv; 1451 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 1452 1452 struct bch_geometry *nfc_geo = &this->bch_geometry; 1453 1453 int eccsize = nfc_geo->ecc_chunk_size; 1454 1454 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; ··· 1539 1539 static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs) 1540 1540 { 1541 1541 struct nand_chip *chip = mtd_to_nand(mtd); 1542 - struct gpmi_nand_data *this = chip->priv; 1542 + struct gpmi_nand_data *this = nand_get_controller_data(chip); 1543 1543 int ret = 0; 1544 1544 uint8_t *block_mark; 1545 1545 int column, page, status, chipnr; ··· 1897 1897 mtd->dev.parent = this->dev; 1898 1898 1899 1899 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ 1900 - chip->priv = this; 1900 + nand_set_controller_data(chip, this); 1901 1901 nand_set_flash_node(chip, this->pdev->dev.of_node); 1902 1902 chip->select_chip = gpmi_select_chip; 1903 1903 chip->cmd_ctrl = gpmi_cmd_ctrl;
+10 -10
drivers/mtd/nand/hisi504_nand.c
··· 357 357 static void hisi_nfc_select_chip(struct mtd_info *mtd, int chipselect) 358 358 { 359 359 struct nand_chip *chip = mtd_to_nand(mtd); 360 - struct hinfc_host *host = chip->priv; 360 + struct hinfc_host *host = nand_get_controller_data(chip); 361 361 362 362 if (chipselect < 0) 363 363 return; ··· 368 368 static uint8_t hisi_nfc_read_byte(struct mtd_info *mtd) 369 369 { 370 370 struct nand_chip *chip = mtd_to_nand(mtd); 371 - struct hinfc_host *host = chip->priv; 371 + struct hinfc_host *host = nand_get_controller_data(chip); 372 372 373 373 if (host->command == NAND_CMD_STATUS) 374 374 return *(uint8_t *)(host->mmio); ··· 384 384 static u16 hisi_nfc_read_word(struct mtd_info *mtd) 385 385 { 386 386 struct nand_chip *chip = mtd_to_nand(mtd); 387 - struct hinfc_host *host = chip->priv; 387 + struct hinfc_host *host = nand_get_controller_data(chip); 388 388 389 389 host->offset += 2; 390 390 return *(u16 *)(host->buffer + host->offset - 2); ··· 394 394 hisi_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 395 395 { 396 396 struct nand_chip *chip = mtd_to_nand(mtd); 397 - struct hinfc_host *host = chip->priv; 397 + struct hinfc_host *host = nand_get_controller_data(chip); 398 398 399 399 memcpy(host->buffer + host->offset, buf, len); 400 400 host->offset += len; ··· 403 403 static void hisi_nfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 404 404 { 405 405 struct nand_chip *chip = mtd_to_nand(mtd); 406 - struct hinfc_host *host = chip->priv; 406 + struct hinfc_host *host = nand_get_controller_data(chip); 407 407 408 408 memcpy(buf, host->buffer + host->offset, len); 409 409 host->offset += len; ··· 412 412 static void set_addr(struct mtd_info *mtd, int column, int page_addr) 413 413 { 414 414 struct nand_chip *chip = mtd_to_nand(mtd); 415 - struct hinfc_host *host = chip->priv; 415 + struct hinfc_host *host = nand_get_controller_data(chip); 416 416 unsigned int command = host->command; 417 417 418 418 host->addr_cycle = 0; ··· 448 448 int page_addr) 449 449 { 450 450 struct nand_chip *chip = mtd_to_nand(mtd); 451 - struct hinfc_host *host = chip->priv; 451 + struct hinfc_host *host = nand_get_controller_data(chip); 452 452 int is_cache_invalid = 1; 453 453 unsigned int flag = 0; 454 454 ··· 542 542 static int hisi_nand_read_page_hwecc(struct mtd_info *mtd, 543 543 struct nand_chip *chip, uint8_t *buf, int oob_required, int page) 544 544 { 545 - struct hinfc_host *host = chip->priv; 545 + struct hinfc_host *host = nand_get_controller_data(chip); 546 546 int max_bitflips = 0, stat = 0, stat_max = 0, status_ecc; 547 547 int stat_1, stat_2; 548 548 ··· 574 574 static int hisi_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip, 575 575 int page) 576 576 { 577 - struct hinfc_host *host = chip->priv; 577 + struct hinfc_host *host = nand_get_controller_data(chip); 578 578 579 579 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); 580 580 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); ··· 738 738 mtd->name = "hisi_nand"; 739 739 mtd->dev.parent = &pdev->dev; 740 740 741 - chip->priv = host; 741 + nand_set_controller_data(chip, host); 742 742 nand_set_flash_node(chip, np); 743 743 chip->cmdfunc = hisi_nfc_cmdfunc; 744 744 chip->select_chip = hisi_nfc_select_chip;
+10 -9
drivers/mtd/nand/lpc32xx_mlc.c
··· 275 275 unsigned int ctrl) 276 276 { 277 277 struct nand_chip *nand_chip = mtd_to_nand(mtd); 278 - struct lpc32xx_nand_host *host = nand_chip->priv; 278 + struct lpc32xx_nand_host *host = nand_get_controller_data(nand_chip); 279 279 280 280 if (cmd != NAND_CMD_NONE) { 281 281 if (ctrl & NAND_CLE) ··· 291 291 static int lpc32xx_nand_device_ready(struct mtd_info *mtd) 292 292 { 293 293 struct nand_chip *nand_chip = mtd_to_nand(mtd); 294 - struct lpc32xx_nand_host *host = nand_chip->priv; 294 + struct lpc32xx_nand_host *host = nand_get_controller_data(nand_chip); 295 295 296 296 if ((readb(MLC_ISR(host->io_base)) & 297 297 (MLCISR_CONTROLLER_READY | MLCISR_NAND_READY)) == ··· 317 317 318 318 static int lpc32xx_waitfunc_nand(struct mtd_info *mtd, struct nand_chip *chip) 319 319 { 320 - struct lpc32xx_nand_host *host = chip->priv; 320 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 321 321 322 322 if (readb(MLC_ISR(host->io_base)) & MLCISR_NAND_READY) 323 323 goto exit; ··· 337 337 static int lpc32xx_waitfunc_controller(struct mtd_info *mtd, 338 338 struct nand_chip *chip) 339 339 { 340 - struct lpc32xx_nand_host *host = chip->priv; 340 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 341 341 342 342 if (readb(MLC_ISR(host->io_base)) & MLCISR_CONTROLLER_READY) 343 343 goto exit; ··· 389 389 enum dma_transfer_direction dir) 390 390 { 391 391 struct nand_chip *chip = mtd_to_nand(mtd); 392 - struct lpc32xx_nand_host *host = chip->priv; 392 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 393 393 struct dma_async_tx_descriptor *desc; 394 394 int flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; 395 395 int res; ··· 430 430 static int lpc32xx_read_page(struct mtd_info *mtd, struct nand_chip *chip, 431 431 uint8_t *buf, int oob_required, int page) 432 432 { 433 - struct lpc32xx_nand_host *host = chip->priv; 433 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 434 434 int i, j; 435 435 uint8_t *oobbuf = chip->oob_poi; 436 436 uint32_t mlc_isr; ··· 497 497 const uint8_t *buf, int oob_required, 498 498 int page) 499 499 { 500 - struct lpc32xx_nand_host *host = chip->priv; 500 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 501 501 const uint8_t *oobbuf = chip->oob_poi; 502 502 uint8_t *dma_buf = (uint8_t *)buf; 503 503 int res; ··· 542 542 static int lpc32xx_read_oob(struct mtd_info *mtd, struct nand_chip *chip, 543 543 int page) 544 544 { 545 - struct lpc32xx_nand_host *host = chip->priv; 545 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 546 546 547 547 /* Read whole page - necessary with MLC controller! */ 548 548 lpc32xx_read_page(mtd, chip, host->dummy_buf, 1, page); ··· 679 679 680 680 host->pdata = dev_get_platdata(&pdev->dev); 681 681 682 - nand_chip->priv = host; /* link the private data structures */ 682 + /* link the private data structures */ 683 + nand_set_controller_data(nand_chip, host); 683 684 nand_set_flash_node(nand_chip, pdev->dev.of_node); 684 685 mtd->dev.parent = &pdev->dev; 685 686
+10 -10
drivers/mtd/nand/lpc32xx_slc.c
··· 260 260 { 261 261 uint32_t tmp; 262 262 struct nand_chip *chip = mtd_to_nand(mtd); 263 - struct lpc32xx_nand_host *host = chip->priv; 263 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 264 264 265 265 /* Does CE state need to be changed? */ 266 266 tmp = readl(SLC_CFG(host->io_base)); ··· 284 284 static int lpc32xx_nand_device_ready(struct mtd_info *mtd) 285 285 { 286 286 struct nand_chip *chip = mtd_to_nand(mtd); 287 - struct lpc32xx_nand_host *host = chip->priv; 287 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 288 288 int rdy = 0; 289 289 290 290 if ((readl(SLC_STAT(host->io_base)) & SLCSTAT_NAND_READY) != 0) ··· 339 339 static uint8_t lpc32xx_nand_read_byte(struct mtd_info *mtd) 340 340 { 341 341 struct nand_chip *chip = mtd_to_nand(mtd); 342 - struct lpc32xx_nand_host *host = chip->priv; 342 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 343 343 344 344 return (uint8_t)readl(SLC_DATA(host->io_base)); 345 345 } ··· 350 350 static void lpc32xx_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) 351 351 { 352 352 struct nand_chip *chip = mtd_to_nand(mtd); 353 - struct lpc32xx_nand_host *host = chip->priv; 353 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 354 354 355 355 /* Direct device read with no ECC */ 356 356 while (len-- > 0) ··· 363 363 static void lpc32xx_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 364 364 { 365 365 struct nand_chip *chip = mtd_to_nand(mtd); 366 - struct lpc32xx_nand_host *host = chip->priv; 366 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 367 367 368 368 /* Direct device write with no ECC */ 369 369 while (len-- > 0) ··· 428 428 void *mem, int len, enum dma_transfer_direction dir) 429 429 { 430 430 struct nand_chip *chip = mtd_to_nand(mtd); 431 - struct lpc32xx_nand_host *host = chip->priv; 431 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 432 432 struct dma_async_tx_descriptor *desc; 433 433 int flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; 434 434 int res; ··· 488 488 int read) 489 489 { 490 490 struct nand_chip *chip = mtd_to_nand(mtd); 491 - struct lpc32xx_nand_host *host = chip->priv; 491 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 492 492 int i, status = 0; 493 493 unsigned long timeout; 494 494 int res; ··· 603 603 struct nand_chip *chip, uint8_t *buf, 604 604 int oob_required, int page) 605 605 { 606 - struct lpc32xx_nand_host *host = chip->priv; 606 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 607 607 int stat, i, status; 608 608 uint8_t *oobecc, tmpecc[LPC32XX_ECC_SAVE_SIZE]; 609 609 ··· 665 665 const uint8_t *buf, 666 666 int oob_required, int page) 667 667 { 668 - struct lpc32xx_nand_host *host = chip->priv; 668 + struct lpc32xx_nand_host *host = nand_get_controller_data(chip); 669 669 uint8_t *pb = chip->oob_poi + chip->ecc.layout->eccpos[0]; 670 670 int error; 671 671 ··· 800 800 801 801 chip = &host->nand_chip; 802 802 mtd = nand_to_mtd(chip); 803 - chip->priv = host; 803 + nand_set_controller_data(chip, host); 804 804 nand_set_flash_node(chip, pdev->dev.of_node); 805 805 mtd->owner = THIS_MODULE; 806 806 mtd->dev.parent = &pdev->dev;
+12 -12
drivers/mtd/nand/mpc5121_nfc.c
··· 135 135 static inline u16 nfc_read(struct mtd_info *mtd, uint reg) 136 136 { 137 137 struct nand_chip *chip = mtd_to_nand(mtd); 138 - struct mpc5121_nfc_prv *prv = chip->priv; 138 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 139 139 140 140 return in_be16(prv->regs + reg); 141 141 } ··· 144 144 static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val) 145 145 { 146 146 struct nand_chip *chip = mtd_to_nand(mtd); 147 - struct mpc5121_nfc_prv *prv = chip->priv; 147 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 148 148 149 149 out_be16(prv->regs + reg, val); 150 150 } ··· 214 214 { 215 215 struct mtd_info *mtd = data; 216 216 struct nand_chip *chip = mtd_to_nand(mtd); 217 - struct mpc5121_nfc_prv *prv = chip->priv; 217 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 218 218 219 219 nfc_set(mtd, NFC_CONFIG1, NFC_INT_MASK); 220 220 wake_up(&prv->irq_waitq); ··· 226 226 static void mpc5121_nfc_done(struct mtd_info *mtd) 227 227 { 228 228 struct nand_chip *chip = mtd_to_nand(mtd); 229 - struct mpc5121_nfc_prv *prv = chip->priv; 229 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 230 230 int rv; 231 231 232 232 if ((nfc_read(mtd, NFC_CONFIG2) & NFC_INT) == 0) { ··· 281 281 static int ads5121_chipselect_init(struct mtd_info *mtd) 282 282 { 283 283 struct nand_chip *chip = mtd_to_nand(mtd); 284 - struct mpc5121_nfc_prv *prv = chip->priv; 284 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 285 285 struct device_node *dn; 286 286 287 287 dn = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld"); ··· 303 303 static void ads5121_select_chip(struct mtd_info *mtd, int chip) 304 304 { 305 305 struct nand_chip *nand = mtd_to_nand(mtd); 306 - struct mpc5121_nfc_prv *prv = nand->priv; 306 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand); 307 307 u8 v; 308 308 309 309 v = in_8(prv->csreg); ··· 333 333 int column, int page) 334 334 { 335 335 struct nand_chip *chip = mtd_to_nand(mtd); 336 - struct mpc5121_nfc_prv *prv = chip->priv; 336 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 337 337 338 338 prv->column = (column >= 0) ? column : 0; 339 339 prv->spareonly = 0; ··· 406 406 u8 *buffer, uint size, int wr) 407 407 { 408 408 struct nand_chip *nand = mtd_to_nand(mtd); 409 - struct mpc5121_nfc_prv *prv = nand->priv; 409 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand); 410 410 uint o, s, sbsize, blksize; 411 411 412 412 /* ··· 458 458 int wr) 459 459 { 460 460 struct nand_chip *chip = mtd_to_nand(mtd); 461 - struct mpc5121_nfc_prv *prv = chip->priv; 461 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 462 462 uint c = prv->column; 463 463 uint l; 464 464 ··· 536 536 static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd) 537 537 { 538 538 struct nand_chip *chip = mtd_to_nand(mtd); 539 - struct mpc5121_nfc_prv *prv = chip->priv; 539 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 540 540 struct mpc512x_reset_module *rm; 541 541 struct device_node *rmnode; 542 542 uint rcw_pagesize = 0; ··· 615 615 static void mpc5121_nfc_free(struct device *dev, struct mtd_info *mtd) 616 616 { 617 617 struct nand_chip *chip = mtd_to_nand(mtd); 618 - struct mpc5121_nfc_prv *prv = chip->priv; 618 + struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip); 619 619 620 620 if (prv->clk) 621 621 clk_disable_unprepare(prv->clk); ··· 657 657 mtd = nand_to_mtd(chip); 658 658 659 659 mtd->dev.parent = dev; 660 - chip->priv = prv; 660 + nand_set_controller_data(chip, prv); 661 661 nand_set_flash_node(chip, dn); 662 662 prv->dev = dev; 663 663
+18 -18
drivers/mtd/nand/mxc_nand.c
··· 532 532 static void send_page_v3(struct mtd_info *mtd, unsigned int ops) 533 533 { 534 534 struct nand_chip *nand_chip = mtd_to_nand(mtd); 535 - struct mxc_nand_host *host = nand_chip->priv; 535 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 536 536 uint32_t tmp; 537 537 538 538 tmp = readl(NFC_V3_CONFIG1); ··· 548 548 static void send_page_v2(struct mtd_info *mtd, unsigned int ops) 549 549 { 550 550 struct nand_chip *nand_chip = mtd_to_nand(mtd); 551 - struct mxc_nand_host *host = nand_chip->priv; 551 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 552 552 553 553 /* NANDFC buffer 0 is used for page read/write */ 554 554 writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR); ··· 562 562 static void send_page_v1(struct mtd_info *mtd, unsigned int ops) 563 563 { 564 564 struct nand_chip *nand_chip = mtd_to_nand(mtd); 565 - struct mxc_nand_host *host = nand_chip->priv; 565 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 566 566 int bufs, i; 567 567 568 568 if (mtd->writesize > 512) ··· 663 663 u_char *read_ecc, u_char *calc_ecc) 664 664 { 665 665 struct nand_chip *nand_chip = mtd_to_nand(mtd); 666 - struct mxc_nand_host *host = nand_chip->priv; 666 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 667 667 668 668 /* 669 669 * 1-Bit errors are automatically corrected in HW. No need for ··· 684 684 u_char *read_ecc, u_char *calc_ecc) 685 685 { 686 686 struct nand_chip *nand_chip = mtd_to_nand(mtd); 687 - struct mxc_nand_host *host = nand_chip->priv; 687 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 688 688 u32 ecc_stat, err; 689 689 int no_subpages = 1; 690 690 int ret = 0; ··· 722 722 static u_char mxc_nand_read_byte(struct mtd_info *mtd) 723 723 { 724 724 struct nand_chip *nand_chip = mtd_to_nand(mtd); 725 - struct mxc_nand_host *host = nand_chip->priv; 725 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 726 726 uint8_t ret; 727 727 728 728 /* Check for status request */ ··· 746 746 static uint16_t mxc_nand_read_word(struct mtd_info *mtd) 747 747 { 748 748 struct nand_chip *nand_chip = mtd_to_nand(mtd); 749 - struct mxc_nand_host *host = nand_chip->priv; 749 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 750 750 uint16_t ret; 751 751 752 752 ret = *(uint16_t *)(host->data_buf + host->buf_start); ··· 762 762 const u_char *buf, int len) 763 763 { 764 764 struct nand_chip *nand_chip = mtd_to_nand(mtd); 765 - struct mxc_nand_host *host = nand_chip->priv; 765 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 766 766 u16 col = host->buf_start; 767 767 int n = mtd->oobsize + mtd->writesize - col; 768 768 ··· 780 780 static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) 781 781 { 782 782 struct nand_chip *nand_chip = mtd_to_nand(mtd); 783 - struct mxc_nand_host *host = nand_chip->priv; 783 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 784 784 u16 col = host->buf_start; 785 785 int n = mtd->oobsize + mtd->writesize - col; 786 786 ··· 796 796 static void mxc_nand_select_chip_v1_v3(struct mtd_info *mtd, int chip) 797 797 { 798 798 struct nand_chip *nand_chip = mtd_to_nand(mtd); 799 - struct mxc_nand_host *host = nand_chip->priv; 799 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 800 800 801 801 if (chip == -1) { 802 802 /* Disable the NFC clock */ ··· 817 817 static void mxc_nand_select_chip_v2(struct mtd_info *mtd, int chip) 818 818 { 819 819 struct nand_chip *nand_chip = mtd_to_nand(mtd); 820 - struct mxc_nand_host *host = nand_chip->priv; 820 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 821 821 822 822 if (chip == -1) { 823 823 /* Disable the NFC clock */ ··· 850 850 static void copy_spare(struct mtd_info *mtd, bool bfrom) 851 851 { 852 852 struct nand_chip *this = mtd_to_nand(mtd); 853 - struct mxc_nand_host *host = this->priv; 853 + struct mxc_nand_host *host = nand_get_controller_data(this); 854 854 u16 i, oob_chunk_size; 855 855 u16 num_chunks = mtd->writesize / 512; 856 856 ··· 893 893 static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr) 894 894 { 895 895 struct nand_chip *nand_chip = mtd_to_nand(mtd); 896 - struct mxc_nand_host *host = nand_chip->priv; 896 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 897 897 898 898 /* Write out column address, if necessary */ 899 899 if (column != -1) { ··· 979 979 static void preset_v1(struct mtd_info *mtd) 980 980 { 981 981 struct nand_chip *nand_chip = mtd_to_nand(mtd); 982 - struct mxc_nand_host *host = nand_chip->priv; 982 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 983 983 uint16_t config1 = 0; 984 984 985 985 if (nand_chip->ecc.mode == NAND_ECC_HW && mtd->writesize) ··· 1007 1007 static void preset_v2(struct mtd_info *mtd) 1008 1008 { 1009 1009 struct nand_chip *nand_chip = mtd_to_nand(mtd); 1010 - struct mxc_nand_host *host = nand_chip->priv; 1010 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 1011 1011 uint16_t config1 = 0; 1012 1012 1013 1013 config1 |= NFC_V2_CONFIG1_FP_INT; ··· 1053 1053 static void preset_v3(struct mtd_info *mtd) 1054 1054 { 1055 1055 struct nand_chip *chip = mtd_to_nand(mtd); 1056 - struct mxc_nand_host *host = chip->priv; 1056 + struct mxc_nand_host *host = nand_get_controller_data(chip); 1057 1057 uint32_t config2, config3; 1058 1058 int i, addr_phases; 1059 1059 ··· 1124 1124 int column, int page_addr) 1125 1125 { 1126 1126 struct nand_chip *nand_chip = mtd_to_nand(mtd); 1127 - struct mxc_nand_host *host = nand_chip->priv; 1127 + struct mxc_nand_host *host = nand_get_controller_data(nand_chip); 1128 1128 1129 1129 pr_debug("mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n", 1130 1130 command, column, page_addr); ··· 1520 1520 /* 50 us command delay time */ 1521 1521 this->chip_delay = 5; 1522 1522 1523 - this->priv = host; 1523 + nand_set_controller_data(this, host); 1524 1524 nand_set_flash_node(this, pdev->dev.of_node), 1525 1525 this->dev_ready = mxc_nand_dev_ready; 1526 1526 this->cmdfunc = mxc_nand_command;
+2 -2
drivers/mtd/nand/nandsim.c
··· 667 667 static int init_nandsim(struct mtd_info *mtd) 668 668 { 669 669 struct nand_chip *chip = mtd_to_nand(mtd); 670 - struct nandsim *ns = chip->priv; 670 + struct nandsim *ns = nand_get_controller_data(chip); 671 671 int i, ret = 0; 672 672 uint64_t remains; 673 673 uint64_t next_offset; ··· 2244 2244 } 2245 2245 nsmtd = nand_to_mtd(chip); 2246 2246 nand = (struct nandsim *)(chip + 1); 2247 - chip->priv = (void *)nand; 2247 + nand_set_controller_data(chip, (void *)nand); 2248 2248 2249 2249 /* 2250 2250 * Register simulator's callbacks.
+8 -8
drivers/mtd/nand/ndfc.c
··· 48 48 { 49 49 uint32_t ccr; 50 50 struct nand_chip *nchip = mtd_to_nand(mtd); 51 - struct ndfc_controller *ndfc = nchip->priv; 51 + struct ndfc_controller *ndfc = nand_get_controller_data(nchip); 52 52 53 53 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); 54 54 if (chip >= 0) { ··· 62 62 static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) 63 63 { 64 64 struct nand_chip *chip = mtd_to_nand(mtd); 65 - struct ndfc_controller *ndfc = chip->priv; 65 + struct ndfc_controller *ndfc = nand_get_controller_data(chip); 66 66 67 67 if (cmd == NAND_CMD_NONE) 68 68 return; ··· 76 76 static int ndfc_ready(struct mtd_info *mtd) 77 77 { 78 78 struct nand_chip *chip = mtd_to_nand(mtd); 79 - struct ndfc_controller *ndfc = chip->priv; 79 + struct ndfc_controller *ndfc = nand_get_controller_data(chip); 80 80 81 81 return in_be32(ndfc->ndfcbase + NDFC_STAT) & NDFC_STAT_IS_READY; 82 82 } ··· 85 85 { 86 86 uint32_t ccr; 87 87 struct nand_chip *chip = mtd_to_nand(mtd); 88 - struct ndfc_controller *ndfc = chip->priv; 88 + struct ndfc_controller *ndfc = nand_get_controller_data(chip); 89 89 90 90 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); 91 91 ccr |= NDFC_CCR_RESET_ECC; ··· 97 97 const u_char *dat, u_char *ecc_code) 98 98 { 99 99 struct nand_chip *chip = mtd_to_nand(mtd); 100 - struct ndfc_controller *ndfc = chip->priv; 100 + struct ndfc_controller *ndfc = nand_get_controller_data(chip); 101 101 uint32_t ecc; 102 102 uint8_t *p = (uint8_t *)&ecc; 103 103 ··· 121 121 static void ndfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 122 122 { 123 123 struct nand_chip *chip = mtd_to_nand(mtd); 124 - struct ndfc_controller *ndfc = chip->priv; 124 + struct ndfc_controller *ndfc = nand_get_controller_data(chip); 125 125 uint32_t *p = (uint32_t *) buf; 126 126 127 127 for(;len > 0; len -= 4) ··· 131 131 static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 132 132 { 133 133 struct nand_chip *chip = mtd_to_nand(mtd); 134 - struct ndfc_controller *ndfc = chip->priv; 134 + struct ndfc_controller *ndfc = nand_get_controller_data(chip); 135 135 uint32_t *p = (uint32_t *) buf; 136 136 137 137 for(;len > 0; len -= 4) ··· 165 165 chip->ecc.size = 256; 166 166 chip->ecc.bytes = 3; 167 167 chip->ecc.strength = 1; 168 - chip->priv = ndfc; 168 + nand_set_controller_data(chip, ndfc); 169 169 170 170 mtd->dev.parent = &ndfc->ofdev->dev; 171 171
+2 -2
drivers/mtd/nand/orion_nand.c
··· 26 26 static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 27 27 { 28 28 struct nand_chip *nc = mtd_to_nand(mtd); 29 - struct orion_nand_data *board = nc->priv; 29 + struct orion_nand_data *board = nand_get_controller_data(nc); 30 30 u32 offs; 31 31 32 32 if (cmd == NAND_CMD_NONE) ··· 124 124 125 125 mtd->dev.parent = &pdev->dev; 126 126 127 - nc->priv = board; 127 + nand_set_controller_data(nc, board); 128 128 nand_set_flash_node(nc, pdev->dev.of_node); 129 129 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base; 130 130 nc->cmd_ctrl = orion_nand_cmd_ctrl;
+11 -11
drivers/mtd/nand/pxa3xx_nand.c
··· 1114 1114 int column, int page_addr) 1115 1115 { 1116 1116 struct nand_chip *chip = mtd_to_nand(mtd); 1117 - struct pxa3xx_nand_host *host = chip->priv; 1117 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1118 1118 struct pxa3xx_nand_info *info = host->info_data; 1119 1119 int exec_cmd; 1120 1120 ··· 1163 1163 int column, int page_addr) 1164 1164 { 1165 1165 struct nand_chip *chip = mtd_to_nand(mtd); 1166 - struct pxa3xx_nand_host *host = chip->priv; 1166 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1167 1167 struct pxa3xx_nand_info *info = host->info_data; 1168 1168 int exec_cmd, ext_cmd_type; 1169 1169 ··· 1283 1283 struct nand_chip *chip, uint8_t *buf, int oob_required, 1284 1284 int page) 1285 1285 { 1286 - struct pxa3xx_nand_host *host = chip->priv; 1286 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1287 1287 struct pxa3xx_nand_info *info = host->info_data; 1288 1288 1289 1289 chip->read_buf(mtd, buf, mtd->writesize); ··· 1310 1310 static uint8_t pxa3xx_nand_read_byte(struct mtd_info *mtd) 1311 1311 { 1312 1312 struct nand_chip *chip = mtd_to_nand(mtd); 1313 - struct pxa3xx_nand_host *host = chip->priv; 1313 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1314 1314 struct pxa3xx_nand_info *info = host->info_data; 1315 1315 char retval = 0xFF; 1316 1316 ··· 1324 1324 static u16 pxa3xx_nand_read_word(struct mtd_info *mtd) 1325 1325 { 1326 1326 struct nand_chip *chip = mtd_to_nand(mtd); 1327 - struct pxa3xx_nand_host *host = chip->priv; 1327 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1328 1328 struct pxa3xx_nand_info *info = host->info_data; 1329 1329 u16 retval = 0xFFFF; 1330 1330 ··· 1338 1338 static void pxa3xx_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 1339 1339 { 1340 1340 struct nand_chip *chip = mtd_to_nand(mtd); 1341 - struct pxa3xx_nand_host *host = chip->priv; 1341 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1342 1342 struct pxa3xx_nand_info *info = host->info_data; 1343 1343 int real_len = min_t(size_t, len, info->buf_count - info->buf_start); 1344 1344 ··· 1350 1350 const uint8_t *buf, int len) 1351 1351 { 1352 1352 struct nand_chip *chip = mtd_to_nand(mtd); 1353 - struct pxa3xx_nand_host *host = chip->priv; 1353 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1354 1354 struct pxa3xx_nand_info *info = host->info_data; 1355 1355 int real_len = min_t(size_t, len, info->buf_count - info->buf_start); 1356 1356 ··· 1366 1366 static int pxa3xx_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this) 1367 1367 { 1368 1368 struct nand_chip *chip = mtd_to_nand(mtd); 1369 - struct pxa3xx_nand_host *host = chip->priv; 1369 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1370 1370 struct pxa3xx_nand_info *info = host->info_data; 1371 1371 1372 1372 if (info->need_wait) { ··· 1573 1573 static int pxa3xx_nand_scan(struct mtd_info *mtd) 1574 1574 { 1575 1575 struct nand_chip *chip = mtd_to_nand(mtd); 1576 - struct pxa3xx_nand_host *host = chip->priv; 1576 + struct pxa3xx_nand_host *host = nand_get_controller_data(chip); 1577 1577 struct pxa3xx_nand_info *info = host->info_data; 1578 1578 struct platform_device *pdev = info->pdev; 1579 1579 struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(&pdev->dev); ··· 1704 1704 for (cs = 0; cs < pdata->num_cs; cs++) { 1705 1705 host = (void *)&info[1] + sizeof(*host) * cs; 1706 1706 chip = &host->chip; 1707 - chip->priv = host; 1707 + nand_set_controller_data(chip, host); 1708 1708 mtd = nand_to_mtd(chip); 1709 1709 info->host[cs] = host; 1710 1710 host->cs = cs; ··· 1713 1713 /* FIXME: all chips use the same device tree partitions */ 1714 1714 nand_set_flash_node(chip, np); 1715 1715 1716 - chip->priv = host; 1716 + nand_set_controller_data(chip, host); 1717 1717 chip->ecc.read_page = pxa3xx_nand_read_page_hwecc; 1718 1718 chip->ecc.write_page = pxa3xx_nand_write_page_hwecc; 1719 1719 chip->controller = &info->controller;
+3 -3
drivers/mtd/nand/r852.c
··· 65 65 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd) 66 66 { 67 67 struct nand_chip *chip = mtd_to_nand(mtd); 68 - return chip->priv; 68 + return nand_get_controller_data(chip); 69 69 } 70 70 71 71 ··· 361 361 */ 362 362 static int r852_wait(struct mtd_info *mtd, struct nand_chip *chip) 363 363 { 364 - struct r852_device *dev = chip->priv; 364 + struct r852_device *dev = nand_get_controller_data(chip); 365 365 366 366 unsigned long timeout; 367 367 int status; ··· 879 879 if (!dev) 880 880 goto error5; 881 881 882 - chip->priv = dev; 882 + nand_set_controller_data(chip, dev); 883 883 dev->chip = chip; 884 884 dev->pci_dev = pci_dev; 885 885 pci_set_drvdata(pci_dev, dev);
+2 -2
drivers/mtd/nand/s3c2410.c
··· 385 385 struct nand_chip *this = mtd_to_nand(mtd); 386 386 unsigned long cur; 387 387 388 - nmtd = this->priv; 388 + nmtd = nand_get_controller_data(this); 389 389 info = nmtd->info; 390 390 391 391 if (chip != -1) ··· 794 794 chip->read_buf = s3c2410_nand_read_buf; 795 795 chip->select_chip = s3c2410_nand_select_chip; 796 796 chip->chip_delay = 50; 797 - chip->priv = nmtd; 797 + nand_set_controller_data(chip, nmtd); 798 798 chip->options = set->options; 799 799 chip->controller = &info->controller; 800 800
+6 -5
drivers/mtd/nand/socrates_nand.c
··· 45 45 { 46 46 int i; 47 47 struct nand_chip *this = mtd_to_nand(mtd); 48 - struct socrates_nand_host *host = this->priv; 48 + struct socrates_nand_host *host = nand_get_controller_data(this); 49 49 50 50 for (i = 0; i < len; i++) { 51 51 out_be32(host->io_base, FPGA_NAND_ENABLE | ··· 64 64 { 65 65 int i; 66 66 struct nand_chip *this = mtd_to_nand(mtd); 67 - struct socrates_nand_host *host = this->priv; 67 + struct socrates_nand_host *host = nand_get_controller_data(this); 68 68 uint32_t val; 69 69 70 70 val = FPGA_NAND_ENABLE | FPGA_NAND_CMD_READ; ··· 105 105 unsigned int ctrl) 106 106 { 107 107 struct nand_chip *nand_chip = mtd_to_nand(mtd); 108 - struct socrates_nand_host *host = nand_chip->priv; 108 + struct socrates_nand_host *host = nand_get_controller_data(nand_chip); 109 109 uint32_t val; 110 110 111 111 if (cmd == NAND_CMD_NONE) ··· 130 130 static int socrates_nand_device_ready(struct mtd_info *mtd) 131 131 { 132 132 struct nand_chip *nand_chip = mtd_to_nand(mtd); 133 - struct socrates_nand_host *host = nand_chip->priv; 133 + struct socrates_nand_host *host = nand_get_controller_data(nand_chip); 134 134 135 135 if (in_be32(host->io_base) & FPGA_NAND_BUSY) 136 136 return 0; /* busy */ ··· 162 162 mtd = nand_to_mtd(nand_chip); 163 163 host->dev = &ofdev->dev; 164 164 165 - nand_chip->priv = host; /* link the private data structures */ 165 + /* link the private data structures */ 166 + nand_set_controller_data(nand_chip, host); 166 167 nand_set_flash_node(nand_chip, ofdev->dev.of_node); 167 168 mtd->name = "socrates_nand"; 168 169 mtd->dev.parent = &ofdev->dev;
+4 -4
drivers/mtd/nand/txx9ndfmc.c
··· 79 79 static struct platform_device *mtd_to_platdev(struct mtd_info *mtd) 80 80 { 81 81 struct nand_chip *chip = mtd_to_nand(mtd); 82 - struct txx9ndfmc_priv *txx9_priv = chip->priv; 82 + struct txx9ndfmc_priv *txx9_priv = nand_get_controller_data(chip); 83 83 return txx9_priv->dev; 84 84 } 85 85 ··· 135 135 unsigned int ctrl) 136 136 { 137 137 struct nand_chip *chip = mtd_to_nand(mtd); 138 - struct txx9ndfmc_priv *txx9_priv = chip->priv; 138 + struct txx9ndfmc_priv *txx9_priv = nand_get_controller_data(chip); 139 139 struct platform_device *dev = txx9_priv->dev; 140 140 struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev); 141 141 ··· 340 340 chip->chip_delay = 100; 341 341 chip->controller = &drvdata->hw_control; 342 342 343 - chip->priv = txx9_priv; 343 + nand_set_controller_data(chip, txx9_priv); 344 344 txx9_priv->dev = dev; 345 345 346 346 if (plat->ch_mask != 1) { ··· 389 389 if (!mtd) 390 390 continue; 391 391 chip = mtd_to_nand(mtd); 392 - txx9_priv = chip->priv; 392 + txx9_priv = nand_get_controller_data(chip); 393 393 394 394 nand_release(mtd); 395 395 kfree(txx9_priv->mtdname);