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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/rockchip: Add RK3588 DPTX output support
Add driver extension for Synopsys DesignWare DPTX IP used
on Rockchip RK3588 SoC.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Dmitry Baryshkov <lumag@kernel.org>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250822063959.692098-4-andyshrk@163.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
authored by
Andy Yan
and committed by
Dmitry Baryshkov
d68ba7ba
86eecc3a
+162
+9
drivers/gpu/drm/rockchip/Kconfig
+9
drivers/gpu/drm/rockchip/Kconfig
···
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select VIDEOMODE_HELPERS
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select DRM_ANALOGIX_DP if ROCKCHIP_ANALOGIX_DP
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select DRM_DISPLAY_DP_AUX_BUS if ROCKCHIP_ANALOGIX_DP
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+
select DRM_DW_DP if ROCKCHIP_DW_DP
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select DRM_DW_HDMI if ROCKCHIP_DW_HDMI
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select DRM_DW_HDMI_QP if ROCKCHIP_DW_HDMI_QP
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select DRM_DW_MIPI_DSI if ROCKCHIP_DW_MIPI_DSI
···
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for the cdn DP driver. If you want to enable Dp on
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RK3399 based SoC, you should select this
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option.
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config ROCKCHIP_DW_DP
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bool "Rockchip specific extensions for Synopsys DW DP"
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help
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This selects support for Rockchip SoC specific extensions
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to enable Synopsys DesignWare Cores based DisplayPort transmit
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controller support on Rockchip SoC, If you want to enable DP on
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rk3588 based SoC, you should select this option.
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config ROCKCHIP_DW_HDMI
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bool "Rockchip specific extensions for Synopsys DW HDMI"
+1
drivers/gpu/drm/rockchip/Makefile
+1
drivers/gpu/drm/rockchip/Makefile
···
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rockchipdrm-$(CONFIG_ROCKCHIP_DW_HDMI_QP) += dw_hdmi_qp-rockchip.o
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rockchipdrm-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw-mipi-dsi-rockchip.o
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rockchipdrm-$(CONFIG_ROCKCHIP_DW_MIPI_DSI2) += dw-mipi-dsi2-rockchip.o
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rockchipdrm-$(CONFIG_ROCKCHIP_DW_DP) += dw_dp-rockchip.o
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rockchipdrm-$(CONFIG_ROCKCHIP_INNO_HDMI) += inno_hdmi.o
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rockchipdrm-$(CONFIG_ROCKCHIP_LVDS) += rockchip_lvds.o
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rockchipdrm-$(CONFIG_ROCKCHIP_RGB) += rockchip_rgb.o
+150
drivers/gpu/drm/rockchip/dw_dp-rockchip.c
+150
drivers/gpu/drm/rockchip/dw_dp-rockchip.c
···
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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* Author: Zhang Yubing <yubing.zhang@rock-chips.com>
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* Author: Andy Yan <andy.yan@rock-chips.com>
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*/
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#include <linux/component.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <drm/bridge/dw_dp.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_bridge.h>
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#include <drm/drm_bridge_connector.h>
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#include <drm/drm_of.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_simple_kms_helper.h>
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+
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#include <linux/media-bus-format.h>
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#include <linux/videodev2.h>
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#include "rockchip_drm_drv.h"
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#include "rockchip_drm_vop.h"
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+
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struct rockchip_dw_dp {
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struct dw_dp *base;
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struct device *dev;
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struct rockchip_encoder encoder;
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};
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static int dw_dp_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
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struct drm_atomic_state *state = conn_state->state;
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struct drm_display_info *di = &conn_state->connector->display_info;
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struct drm_bridge *bridge = drm_bridge_chain_get_first_bridge(encoder);
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struct drm_bridge_state *bridge_state = drm_atomic_get_new_bridge_state(state, bridge);
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u32 bus_format = bridge_state->input_bus_cfg.format;
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switch (bus_format) {
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case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
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case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
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s->output_mode = ROCKCHIP_OUT_MODE_YUV420;
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break;
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case MEDIA_BUS_FMT_YUYV10_1X20:
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case MEDIA_BUS_FMT_YUYV8_1X16:
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s->output_mode = ROCKCHIP_OUT_MODE_S888_DUMMY;
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break;
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case MEDIA_BUS_FMT_RGB101010_1X30:
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case MEDIA_BUS_FMT_RGB888_1X24:
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case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
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case MEDIA_BUS_FMT_YUV10_1X30:
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case MEDIA_BUS_FMT_YUV8_1X24:
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default:
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s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
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break;
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}
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s->output_type = DRM_MODE_CONNECTOR_DisplayPort;
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s->bus_format = bus_format;
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s->bus_flags = di->bus_flags;
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s->color_space = V4L2_COLORSPACE_DEFAULT;
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return 0;
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}
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static const struct drm_encoder_helper_funcs dw_dp_encoder_helper_funcs = {
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.atomic_check = dw_dp_encoder_atomic_check,
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};
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static int dw_dp_rockchip_bind(struct device *dev, struct device *master, void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dw_dp_plat_data plat_data;
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struct drm_device *drm_dev = data;
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struct rockchip_dw_dp *dp;
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struct drm_encoder *encoder;
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struct drm_connector *connector;
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int ret;
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dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
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if (!dp)
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return -ENOMEM;
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dp->dev = dev;
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platform_set_drvdata(pdev, dp);
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plat_data.max_link_rate = 810000;
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encoder = &dp->encoder.encoder;
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encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, dev->of_node);
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rockchip_drm_encoder_set_crtc_endpoint_id(&dp->encoder, dev->of_node, 0, 0);
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ret = drmm_encoder_init(drm_dev, encoder, NULL, DRM_MODE_ENCODER_TMDS, NULL);
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if (ret)
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return ret;
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drm_encoder_helper_add(encoder, &dw_dp_encoder_helper_funcs);
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dp->base = dw_dp_bind(dev, encoder, &plat_data);
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if (IS_ERR(dp->base)) {
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ret = PTR_ERR(dp->base);
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return ret;
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}
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connector = drm_bridge_connector_init(drm_dev, encoder);
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if (IS_ERR(connector)) {
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ret = PTR_ERR(connector);
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return dev_err_probe(dev, ret, "Failed to init bridge connector");
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}
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drm_connector_attach_encoder(connector, encoder);
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return 0;
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}
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static const struct component_ops dw_dp_rockchip_component_ops = {
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.bind = dw_dp_rockchip_bind,
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};
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static int dw_dp_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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return component_add(dev, &dw_dp_rockchip_component_ops);
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}
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static void dw_dp_remove(struct platform_device *pdev)
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{
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struct rockchip_dw_dp *dp = platform_get_drvdata(pdev);
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component_del(dp->dev, &dw_dp_rockchip_component_ops);
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}
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static const struct of_device_id dw_dp_of_match[] = {
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{ .compatible = "rockchip,rk3588-dp", },
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{}
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};
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MODULE_DEVICE_TABLE(of, dw_dp_of_match);
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struct platform_driver dw_dp_driver = {
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.probe = dw_dp_probe,
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.remove = dw_dp_remove,
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.driver = {
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.name = "dw-dp",
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.of_match_table = dw_dp_of_match,
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},
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};
+1
drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+1
drivers/gpu/drm/rockchip/rockchip_drm_drv.c
···
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ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver,
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CONFIG_ROCKCHIP_ANALOGIX_DP);
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ADD_ROCKCHIP_SUB_DRIVER(cdn_dp_driver, CONFIG_ROCKCHIP_CDN_DP);
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ADD_ROCKCHIP_SUB_DRIVER(dw_dp_driver, CONFIG_ROCKCHIP_DW_DP);
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ADD_ROCKCHIP_SUB_DRIVER(dw_hdmi_rockchip_pltfm_driver,
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CONFIG_ROCKCHIP_DW_HDMI);
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ADD_ROCKCHIP_SUB_DRIVER(dw_hdmi_qp_rockchip_pltfm_driver,
+1
drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+1
drivers/gpu/drm/rockchip/rockchip_drm_drv.h
···
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struct device_node *np, int port, int reg);
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int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
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extern struct platform_driver cdn_dp_driver;
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extern struct platform_driver dw_dp_driver;
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extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;
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extern struct platform_driver dw_hdmi_qp_rockchip_pltfm_driver;
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extern struct platform_driver dw_mipi_dsi_rockchip_driver;