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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: samsung-ufs: support exynosauto ufs phy driver
This patch adds to support phy-exynosautov9-ufs driver for ExynosAuto v9
series SoCs. The patch adds "samsung,exynosautov9-ufs-phy" compatible.
Unlike previous exynos ufs phy, the chip uses 0x50 offset as
PHY_TRSV_REG_CFG_OFFSET.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210709094524.110193-3-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Chanho Park
and committed by
Vinod Koul
d6451924
b95637e2
+78
-2
+1
Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+1
Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml
+1
drivers/phy/samsung/Makefile
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drivers/phy/samsung/Makefile
···
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obj-$(CONFIG_PHY_SAMSUNG_UFS) += phy-exynos-ufs.o
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phy-exynos-ufs-y += phy-samsung-ufs.o
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phy-exynos-ufs-y += phy-exynos7-ufs.o
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phy-exynos-ufs-y += phy-exynosautov9-ufs.o
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obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o
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phy-exynos-usb2-y += phy-samsung-usb2.o
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phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o
+67
drivers/phy/samsung/phy-exynosautov9-ufs.c
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drivers/phy/samsung/phy-exynosautov9-ufs.c
···
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* UFS PHY driver data for Samsung EXYNOSAUTO v9 SoC
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*
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* Copyright (C) 2021 Samsung Electronics Co., Ltd.
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*/
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#include "phy-samsung-ufs.h"
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#define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL 0x728
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#define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
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#define EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
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+
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#define PHY_TRSV_REG_CFG_AUTOV9(o, v, d) \
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PHY_TRSV_REG_CFG_OFFSET(o, v, d, 0x50)
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/* Calibration for phy initialization */
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static const struct samsung_ufs_phy_cfg exynosautov9_pre_init_cfg[] = {
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PHY_COMN_REG_CFG(0x023, 0x80, PWR_MODE_ANY),
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PHY_COMN_REG_CFG(0x01d, 0x10, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x044, 0xb5, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x04d, 0x43, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x05b, 0x20, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x05e, 0xc0, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x038, 0x12, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x059, 0x58, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x06c, 0x18, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG_AUTOV9(0x06d, 0x02, PWR_MODE_ANY),
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PHY_COMN_REG_CFG(0x023, 0xc0, PWR_MODE_ANY),
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PHY_COMN_REG_CFG(0x023, 0x00, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG(0x042, 0x5d, PWR_MODE_ANY),
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PHY_TRSV_REG_CFG(0x043, 0x80, PWR_MODE_ANY),
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END_UFS_PHY_CFG,
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};
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/* Calibration for HS mode series A/B */
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static const struct samsung_ufs_phy_cfg exynosautov9_pre_pwr_hs_cfg[] = {
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PHY_TRSV_REG_CFG(0x032, 0xbc, PWR_MODE_HS_ANY),
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PHY_TRSV_REG_CFG(0x03c, 0x7f, PWR_MODE_HS_ANY),
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PHY_TRSV_REG_CFG(0x048, 0xc0, PWR_MODE_HS_ANY),
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PHY_TRSV_REG_CFG(0x04a, 0x00, PWR_MODE_HS_G3_SER_B),
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PHY_TRSV_REG_CFG(0x04b, 0x10, PWR_MODE_HS_G1_SER_B |
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PWR_MODE_HS_G3_SER_B),
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PHY_TRSV_REG_CFG(0x04d, 0x63, PWR_MODE_HS_G3_SER_B),
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END_UFS_PHY_CFG,
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};
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static const struct samsung_ufs_phy_cfg *exynosautov9_ufs_phy_cfgs[CFG_TAG_MAX] = {
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[CFG_PRE_INIT] = exynosautov9_pre_init_cfg,
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[CFG_PRE_PWR_HS] = exynosautov9_pre_pwr_hs_cfg,
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};
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const struct samsung_ufs_phy_drvdata exynosautov9_ufs_phy = {
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.cfg = exynosautov9_ufs_phy_cfgs,
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.isol = {
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.offset = EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL,
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.mask = EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_MASK,
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.en = EXYNOSAUTOV9_EMBEDDED_COMBO_PHY_CTRL_EN,
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},
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.has_symbol_clk = 0,
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};
+3
drivers/phy/samsung/phy-samsung-ufs.c
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drivers/phy/samsung/phy-samsung-ufs.c
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-2
drivers/phy/samsung/phy-samsung-ufs.h
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-2
drivers/phy/samsung/phy-samsung-ufs.h
···
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.id = PHY_COMN_BLK, \
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}
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-
#define PHY_TRSV_REG_CFG(o, v, d) { \
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#define PHY_TRSV_REG_CFG_OFFSET(o, v, d, c) { \
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.off_0 = PHY_APB_ADDR((o)), \
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.off_1 = PHY_APB_ADDR((o) + PHY_TRSV_CH_OFFSET), \
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.off_1 = PHY_APB_ADDR((o) + (c)), \
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.val = (v), \
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.desc = (d), \
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.id = PHY_TRSV_BLK, \
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}
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#define PHY_TRSV_REG_CFG(o, v, d) \
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PHY_TRSV_REG_CFG_OFFSET(o, v, d, PHY_TRSV_CH_OFFSET)
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/* UFS PHY registers */
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#define PHY_PLL_LOCK_STATUS 0x1e
···
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}
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extern const struct samsung_ufs_phy_drvdata exynos7_ufs_phy;
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extern const struct samsung_ufs_phy_drvdata exynosautov9_ufs_phy;
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#endif /* _PHY_SAMSUNG_UFS_ */