alpha: use set_irq_chip and push down __do_IRQ to the machine types

Also kill superfluous IRQ_DISABLED initialization, since that's the
default state of the irq_desc[i].status field.

Tested-by: Michael Cree <[e-mail]>
Signed-off-by: Kyle McMartin <[e-mail]>
Signed-off-by: Matt Turner <[e-mail]>

arch/alpha/include/asm/irq.h

···
 struct pt_regs;
 extern void (*perf_irq)(unsigned long, struct pt_regs *);
 
+struct irq_desc;
+extern void alpha_do_IRQ(unsigned int irq, struct irq_desc *desc);
+
 #endif /* _ALPHA_IRQ_H */

arch/alpha/kernel/irq.c

···
 	 * at IPL 0.
 	 */
 	local_irq_disable();
-	__do_IRQ(irq);
+	generic_handle_irq(irq);
 	irq_exit();
+}
+
+void alpha_do_IRQ(unsigned int irq, struct irq_desc *desc)
+{
+	__do_IRQ(irq);
 }

arch/alpha/kernel/irq_i8259.c

···
 	outb(0xff, 0xA1);	/* mask all of 8259A-2 */
 
 	for (i = 0; i < 16; i++) {
-		irq_desc[i].status = IRQ_DISABLED;
-		irq_desc[i].chip = &i8259a_irq_type;
+		set_irq_chip_and_handler(i, &i8259a_irq_type, alpha_do_IRQ);
 	}
 
 	setup_irq(2, &cascade);

arch/alpha/kernel/irq_pyxis.c

···
 	for (i = 16; i < 48; ++i) {
 		if ((ignore_mask >> i) & 1)
 			continue;
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &pyxis_irq_type;
+		set_irq_chip_and_handler(i, &pyxis_irq_type, alpha_do_IRQ);
+		irq_desc[i].status |= IRQ_LEVEL;
 	}
 
 	setup_irq(16+7, &isa_cascade_irqaction);

arch/alpha/kernel/irq_srm.c

···
 	for (i = 16; i < max; ++i) {
 		if (i < 64 && ((ignore_mask >> i) & 1))
 			continue;
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &srm_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &srm_irq_type, alpha_do_IRQ);
 	}
 }
 

arch/alpha/kernel/sys_alcor.c

···
 		   on while IRQ probing.  */
 		if (i >= 16+20 && i <= 16+30)
 			continue;
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &alcor_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &alcor_irq_type, alpha_do_IRQ);
 	}
 	i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;
 

arch/alpha/kernel/sys_cabriolet.c

···
 		outb(0xff, 0x806);
 
 		for (i = 16; i < 35; ++i) {
-			irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-			irq_desc[i].chip = &cabriolet_irq_type;
+			set_irq_chip_and_handler(i, &cabriolet_irq_type,
+				alpha_do_IRQ);
+			irq_desc[i].status |= IRQ_LEVEL;
 		}
 	}
 

arch/alpha/kernel/sys_dp264.c

···
 {
 	long i;
 	for (i = imin; i <= imax; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = ops;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, ops, alpha_do_IRQ);
 	}
 }
 

arch/alpha/kernel/sys_eb64p.c

···
 	init_i8259a_irqs();
 
 	for (i = 16; i < 32; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &eb64p_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &eb64p_irq_type, alpha_do_IRQ);
 	}		
 
 	common_init_isa_dma();

arch/alpha/kernel/sys_eiger.c

···
 	init_i8259a_irqs();
 
 	for (i = 16; i < 128; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &eiger_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &eiger_irq_type, alpha_do_IRQ);
 	}
 }
 

arch/alpha/kernel/sys_jensen.c

···
 {
 	init_i8259a_irqs();
 
-	irq_desc[1].chip = &jensen_local_irq_type;
-	irq_desc[4].chip = &jensen_local_irq_type;
-	irq_desc[3].chip = &jensen_local_irq_type;
-	irq_desc[7].chip = &jensen_local_irq_type;
-	irq_desc[9].chip = &jensen_local_irq_type;
+	set_irq_chip_and_handler(1, &jensen_local_irq_type, alpha_do_IRQ);
+	set_irq_chip_and_handler(4, &jensen_local_irq_type, alpha_do_IRQ);
+	set_irq_chip_and_handler(3, &jensen_local_irq_type, alpha_do_IRQ);
+	set_irq_chip_and_handler(7, &jensen_local_irq_type, alpha_do_IRQ);
+	set_irq_chip_and_handler(9, &jensen_local_irq_type, alpha_do_IRQ);
 
 	common_init_isa_dma();
 }

arch/alpha/kernel/sys_marvel.c

···
 
 	/* Set up the lsi irqs.  */
 	for (i = 0; i < 128; ++i) {
-		irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[base + i].chip = lsi_ops;
+		irq_desc[base + i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(base + i, lsi_ops, alpha_do_IRQ);
 	}
 
 	/* Disable the implemented irqs in hardware.  */
···
 
 	/* Set up the msi irqs.  */
 	for (i = 128; i < (128 + 512); ++i) {
-		irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[base + i].chip = msi_ops;
+		irq_desc[base + i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(base + i, msi_ops, alpha_do_IRQ);
 	}
 
 	for (i = 0; i < 16; ++i)
···
 
 	/* Reserve the legacy irqs.  */
 	for (i = 0; i < 16; ++i) {
-		irq_desc[i].status = IRQ_DISABLED;
-		irq_desc[i].chip = &marvel_legacy_irq_type;
+		set_irq_chip_and_handler(i, &marvel_legacy_irq_type,
+			alpha_do_IRQ);
 	}
 
 	/* Init the io7 irqs.  */

arch/alpha/kernel/sys_mikasa.c

···
 	mikasa_update_irq_hw(0);
 
 	for (i = 16; i < 32; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &mikasa_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &mikasa_irq_type, alpha_do_IRQ);
 	}
 
 	init_i8259a_irqs();

arch/alpha/kernel/sys_noritake.c

···
 	outw(0, 0x54c);
 
 	for (i = 16; i < 48; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &noritake_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &noritake_irq_type, alpha_do_IRQ);
 	}
 
 	init_i8259a_irqs();

arch/alpha/kernel/sys_rawhide.c

···
 	}
 
 	for (i = 16; i < 128; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &rawhide_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &rawhide_irq_type, alpha_do_IRQ);
 	}
 
 	init_i8259a_irqs();

arch/alpha/kernel/sys_rx164.c

···
 
 	rx164_update_irq_hw(0);
 	for (i = 16; i < 40; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &rx164_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &rx164_irq_type, alpha_do_IRQ);
 	}
 
 	init_i8259a_irqs();

arch/alpha/kernel/sys_sable.c

···
 	long i;
 
 	for (i = 0; i < nr_of_irqs; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &sable_lynx_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &sable_lynx_irq_type,
+			alpha_do_IRQ);
 	}
 
 	common_init_isa_dma();

arch/alpha/kernel/sys_takara.c

···
 		takara_update_irq_hw(i, -1);
 
 	for (i = 16; i < 128; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = &takara_irq_type;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, &takara_irq_type, alpha_do_IRQ);
 	}
 
 	common_init_isa_dma();

arch/alpha/kernel/sys_titan.c

···
 {
 	long i;
 	for (i = imin; i <= imax; ++i) {
-		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i].chip = ops;
+		irq_desc[i].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i, ops, alpha_do_IRQ);
 	}
 }
 

arch/alpha/kernel/sys_wildfire.c

···
 	for (i = 0; i < 16; ++i) {
 		if (i == 2)
 			continue;
-		irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i+irq_bias].chip = &wildfire_irq_type;
+		irq_desc[i+irq_bias].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
+			alpha_do_IRQ);
 	}
 
-	irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-	irq_desc[36+irq_bias].chip = &wildfire_irq_type;
+	irq_desc[36+irq_bias].status |= IRQ_LEVEL;
+	set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, alpha_do_IRQ);
 	for (i = 40; i < 64; ++i) {
-		irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-		irq_desc[i+irq_bias].chip = &wildfire_irq_type;
+		irq_desc[i+irq_bias].status |= IRQ_LEVEL;
+		set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
+			alpha_do_IRQ);
 	}
 
 	setup_irq(32+irq_bias, &isa_enable);