tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

mfd: Cleanup irq namespace

Converted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

authored by

Thomas Gleixner and committed by
Samuel Ortiz d5bb1221 c22435a3

+131 -131
+4 -4
drivers/mfd/88pm860x-core.c
··· 470 470 /* register IRQ by genirq */ 471 471 for (i = 0; i < ARRAY_SIZE(pm860x_irqs); i++) { 472 472 __irq = i + chip->irq_base; 473 - set_irq_chip_data(__irq, chip); 474 - set_irq_chip_and_handler(__irq, &pm860x_irq_chip, 473 + irq_set_chip_data(__irq, chip); 474 + irq_set_chip_and_handler(__irq, &pm860x_irq_chip, 475 475 handle_edge_irq); 476 - set_irq_nested_thread(__irq, 1); 476 + irq_set_nested_thread(__irq, 1); 477 477 #ifdef CONFIG_ARM 478 478 set_irq_flags(__irq, IRQF_VALID); 479 479 #else 480 - set_irq_noprobe(__irq); 480 + irq_set_noprobe(__irq); 481 481 #endif 482 482 } 483 483
+6 -6
drivers/mfd/ab3550-core.c
··· 668 668 struct ab3550_platform_data *plf_data; 669 669 bool val; 670 670 671 - ab = get_irq_chip_data(irq); 671 + ab = irq_get_chip_data(irq); 672 672 plf_data = ab->i2c_client[0]->dev.platform_data; 673 673 irq -= plf_data->irq.base; 674 674 val = ((ab->startup_events[irq / 8] & BIT(irq % 8)) != 0); ··· 1296 1296 unsigned int irq; 1297 1297 1298 1298 irq = ab3550_plf_data->irq.base + i; 1299 - set_irq_chip_data(irq, ab); 1300 - set_irq_chip_and_handler(irq, &ab3550_irq_chip, 1301 - handle_simple_irq); 1302 - set_irq_nested_thread(irq, 1); 1299 + irq_set_chip_data(irq, ab); 1300 + irq_set_chip_and_handler(irq, &ab3550_irq_chip, 1301 + handle_simple_irq); 1302 + irq_set_nested_thread(irq, 1); 1303 1303 #ifdef CONFIG_ARM 1304 1304 set_irq_flags(irq, IRQF_VALID); 1305 1305 #else 1306 - set_irq_noprobe(irq); 1306 + irq_set_noprobe(irq); 1307 1307 #endif 1308 1308 } 1309 1309
+6 -6
drivers/mfd/ab8500-core.c
··· 334 334 int irq; 335 335 336 336 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 337 - set_irq_chip_data(irq, ab8500); 338 - set_irq_chip_and_handler(irq, &ab8500_irq_chip, 337 + irq_set_chip_data(irq, ab8500); 338 + irq_set_chip_and_handler(irq, &ab8500_irq_chip, 339 339 handle_simple_irq); 340 - set_irq_nested_thread(irq, 1); 340 + irq_set_nested_thread(irq, 1); 341 341 #ifdef CONFIG_ARM 342 342 set_irq_flags(irq, IRQF_VALID); 343 343 #else 344 - set_irq_noprobe(irq); 344 + irq_set_noprobe(irq); 345 345 #endif 346 346 } 347 347 ··· 357 357 #ifdef CONFIG_ARM 358 358 set_irq_flags(irq, 0); 359 359 #endif 360 - set_irq_chip_and_handler(irq, NULL, NULL); 361 - set_irq_chip_data(irq, NULL); 360 + irq_set_chip_and_handler(irq, NULL, NULL); 361 + irq_set_chip_data(irq, NULL); 362 362 } 363 363 } 364 364
+11 -11
drivers/mfd/asic3.c
··· 388 388 389 389 for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { 390 390 if (irq < asic->irq_base + ASIC3_NUM_GPIOS) 391 - set_irq_chip(irq, &asic3_gpio_irq_chip); 391 + irq_set_chip(irq, &asic3_gpio_irq_chip); 392 392 else 393 - set_irq_chip(irq, &asic3_irq_chip); 393 + irq_set_chip(irq, &asic3_irq_chip); 394 394 395 - set_irq_chip_data(irq, asic); 396 - set_irq_handler(irq, handle_level_irq); 395 + irq_set_chip_data(irq, asic); 396 + irq_set_handler(irq, handle_level_irq); 397 397 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 398 398 } 399 399 400 400 asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK), 401 401 ASIC3_INTMASK_GINTMASK); 402 402 403 - set_irq_chained_handler(asic->irq_nr, asic3_irq_demux); 404 - set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); 405 - set_irq_data(asic->irq_nr, asic); 403 + irq_set_chained_handler(asic->irq_nr, asic3_irq_demux); 404 + irq_set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); 405 + irq_set_handler_data(asic->irq_nr, asic); 406 406 407 407 return 0; 408 408 } ··· 416 416 417 417 for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { 418 418 set_irq_flags(irq, 0); 419 - set_irq_handler(irq, NULL); 420 - set_irq_chip(irq, NULL); 421 - set_irq_chip_data(irq, NULL); 419 + irq_set_handler(irq, NULL); 420 + irq_set_chip(irq, NULL); 421 + irq_set_chip_data(irq, NULL); 422 422 } 423 - set_irq_chained_handler(asic->irq_nr, NULL); 423 + irq_set_chained_handler(asic->irq_nr, NULL); 424 424 } 425 425 426 426 /* GPIOs */
+10 -10
drivers/mfd/ezx-pcap.c
··· 207 207 208 208 static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) 209 209 { 210 - struct pcap_chip *pcap = get_irq_data(irq); 210 + struct pcap_chip *pcap = irq_get_handler_data(irq); 211 211 212 212 desc->irq_data.chip->irq_ack(&desc->irq_data); 213 213 queue_work(pcap->workqueue, &pcap->isr_work); ··· 411 411 412 412 /* cleanup irqchip */ 413 413 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) 414 - set_irq_chip_and_handler(i, NULL, NULL); 414 + irq_set_chip_and_handler(i, NULL, NULL); 415 415 416 416 destroy_workqueue(pcap->workqueue); 417 417 ··· 468 468 469 469 /* setup irq chip */ 470 470 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) { 471 - set_irq_chip_and_handler(i, &pcap_irq_chip, handle_simple_irq); 472 - set_irq_chip_data(i, pcap); 471 + irq_set_chip_and_handler(i, &pcap_irq_chip, handle_simple_irq); 472 + irq_set_chip_data(i, pcap); 473 473 #ifdef CONFIG_ARM 474 474 set_irq_flags(i, IRQF_VALID); 475 475 #else 476 - set_irq_noprobe(i); 476 + irq_set_noprobe(i); 477 477 #endif 478 478 } 479 479 ··· 482 482 ezx_pcap_write(pcap, PCAP_REG_ISR, PCAP_CLEAR_INTERRUPT_REGISTER); 483 483 pcap->msr = PCAP_MASK_ALL_INTERRUPT; 484 484 485 - set_irq_type(spi->irq, IRQ_TYPE_EDGE_RISING); 486 - set_irq_data(spi->irq, pcap); 487 - set_irq_chained_handler(spi->irq, pcap_irq_handler); 488 - set_irq_wake(spi->irq, 1); 485 + irq_set_irq_type(spi->irq, IRQ_TYPE_EDGE_RISING); 486 + irq_set_handler_data(spi->irq, pcap); 487 + irq_set_chained_handler(spi->irq, pcap_irq_handler); 488 + irq_set_irq_wake(spi->irq, 1); 489 489 490 490 /* ADC */ 491 491 adc_irq = pcap_to_irq(pcap, (pdata->config & PCAP_SECOND_PORT) ? ··· 514 514 free_irq(adc_irq, pcap); 515 515 free_irqchip: 516 516 for (i = pcap->irq_base; i < (pcap->irq_base + PCAP_NIRQS); i++) 517 - set_irq_chip_and_handler(i, NULL, NULL); 517 + irq_set_chip_and_handler(i, NULL, NULL); 518 518 /* destroy_workqueue: */ 519 519 destroy_workqueue(pcap->workqueue); 520 520 free_pcap:
+9 -9
drivers/mfd/htc-egpio.c
··· 344 344 ei->ack_write = 0; 345 345 irq_end = ei->irq_start + ei->nirqs; 346 346 for (irq = ei->irq_start; irq < irq_end; irq++) { 347 - set_irq_chip(irq, &egpio_muxed_chip); 348 - set_irq_chip_data(irq, ei); 349 - set_irq_handler(irq, handle_simple_irq); 347 + irq_set_chip(irq, &egpio_muxed_chip); 348 + irq_set_chip_data(irq, ei); 349 + irq_set_handler(irq, handle_simple_irq); 350 350 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 351 351 } 352 - set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING); 353 - set_irq_data(ei->chained_irq, ei); 354 - set_irq_chained_handler(ei->chained_irq, egpio_handler); 352 + irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING); 353 + irq_set_handler_data(ei->chained_irq, ei); 354 + irq_set_chained_handler(ei->chained_irq, egpio_handler); 355 355 ack_irqs(ei); 356 356 357 357 device_init_wakeup(&pdev->dev, 1); ··· 373 373 if (ei->chained_irq) { 374 374 irq_end = ei->irq_start + ei->nirqs; 375 375 for (irq = ei->irq_start; irq < irq_end; irq++) { 376 - set_irq_chip(irq, NULL); 377 - set_irq_handler(irq, NULL); 376 + irq_set_chip(irq, NULL); 377 + irq_set_handler(irq, NULL); 378 378 set_irq_flags(irq, 0); 379 379 } 380 - set_irq_chained_handler(ei->chained_irq, NULL); 380 + irq_set_chained_handler(ei->chained_irq, NULL); 381 381 device_init_wakeup(&pdev->dev, 0); 382 382 } 383 383 iounmap(ei->base_addr);
+4 -4
drivers/mfd/htc-i2cpld.c
··· 348 348 /* Setup irq handlers */ 349 349 irq_end = chip->irq_start + chip->nirqs; 350 350 for (irq = chip->irq_start; irq < irq_end; irq++) { 351 - set_irq_chip(irq, &htcpld_muxed_chip); 352 - set_irq_chip_data(irq, chip); 353 - set_irq_handler(irq, handle_simple_irq); 351 + irq_set_chip(irq, &htcpld_muxed_chip); 352 + irq_set_chip_data(irq, chip); 353 + irq_set_handler(irq, handle_simple_irq); 354 354 #ifdef CONFIG_ARM 355 355 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 356 356 #else 357 - set_irq_probe(irq); 357 + irq_set_probe(irq); 358 358 #endif 359 359 } 360 360
+8 -8
drivers/mfd/jz4740-adc.c
··· 112 112 113 113 static void jz4740_adc_irq_demux(unsigned int irq, struct irq_desc *desc) 114 114 { 115 - struct jz4740_adc *adc = get_irq_desc_data(desc); 115 + struct jz4740_adc *adc = irq_desc_get_handler_data(desc); 116 116 uint8_t status; 117 117 unsigned int i; 118 118 ··· 310 310 platform_set_drvdata(pdev, adc); 311 311 312 312 for (irq = adc->irq_base; irq < adc->irq_base + 5; ++irq) { 313 - set_irq_chip_data(irq, adc); 314 - set_irq_chip_and_handler(irq, &jz4740_adc_irq_chip, 315 - handle_level_irq); 313 + irq_set_chip_data(irq, adc); 314 + irq_set_chip_and_handler(irq, &jz4740_adc_irq_chip, 315 + handle_level_irq); 316 316 } 317 317 318 - set_irq_data(adc->irq, adc); 319 - set_irq_chained_handler(adc->irq, jz4740_adc_irq_demux); 318 + irq_set_handler_data(adc->irq, adc); 319 + irq_set_chained_handler(adc->irq, jz4740_adc_irq_demux); 320 320 321 321 writeb(0x00, adc->base + JZ_REG_ADC_ENABLE); 322 322 writeb(0xff, adc->base + JZ_REG_ADC_CTRL); ··· 347 347 348 348 mfd_remove_devices(&pdev->dev); 349 349 350 - set_irq_data(adc->irq, NULL); 351 - set_irq_chained_handler(adc->irq, NULL); 350 + irq_set_handler_data(adc->irq, NULL); 351 + irq_set_chained_handler(adc->irq, NULL); 352 352 353 353 iounmap(adc->base); 354 354 release_mem_region(adc->mem->start, resource_size(adc->mem));
+4 -4
drivers/mfd/max8925-core.c
··· 547 547 /* register with genirq */ 548 548 for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) { 549 549 __irq = i + chip->irq_base; 550 - set_irq_chip_data(__irq, chip); 551 - set_irq_chip_and_handler(__irq, &max8925_irq_chip, 550 + irq_set_chip_data(__irq, chip); 551 + irq_set_chip_and_handler(__irq, &max8925_irq_chip, 552 552 handle_edge_irq); 553 - set_irq_nested_thread(__irq, 1); 553 + irq_set_nested_thread(__irq, 1); 554 554 #ifdef CONFIG_ARM 555 555 set_irq_flags(__irq, IRQF_VALID); 556 556 #else 557 - set_irq_noprobe(__irq); 557 + irq_set_noprobe(__irq); 558 558 #endif 559 559 } 560 560 if (!irq) {
+4 -4
drivers/mfd/max8998-irq.c
··· 224 224 /* register with genirq */ 225 225 for (i = 0; i < MAX8998_IRQ_NR; i++) { 226 226 cur_irq = i + max8998->irq_base; 227 - set_irq_chip_data(cur_irq, max8998); 228 - set_irq_chip_and_handler(cur_irq, &max8998_irq_chip, 227 + irq_set_chip_data(cur_irq, max8998); 228 + irq_set_chip_and_handler(cur_irq, &max8998_irq_chip, 229 229 handle_edge_irq); 230 - set_irq_nested_thread(cur_irq, 1); 230 + irq_set_nested_thread(cur_irq, 1); 231 231 #ifdef CONFIG_ARM 232 232 set_irq_flags(cur_irq, IRQF_VALID); 233 233 #else 234 - set_irq_noprobe(cur_irq); 234 + irq_set_noprobe(cur_irq); 235 235 #endif 236 236 } 237 237
+2 -2
drivers/mfd/max8998.c
··· 209 209 struct max8998_dev *max8998 = i2c_get_clientdata(i2c); 210 210 211 211 if (max8998->wakeup) 212 - set_irq_wake(max8998->irq, 1); 212 + irq_set_irq_wake(max8998->irq, 1); 213 213 return 0; 214 214 } 215 215 ··· 219 219 struct max8998_dev *max8998 = i2c_get_clientdata(i2c); 220 220 221 221 if (max8998->wakeup) 222 - set_irq_wake(max8998->irq, 0); 222 + irq_set_irq_wake(max8998->irq, 0); 223 223 /* 224 224 * In LP3974, if IRQ registers are not "read & clear" 225 225 * when it's set during sleep, the interrupt becomes
+6 -6
drivers/mfd/stmpe.c
··· 762 762 int irq; 763 763 764 764 for (irq = base; irq < base + num_irqs; irq++) { 765 - set_irq_chip_data(irq, stmpe); 766 - set_irq_chip_and_handler(irq, &stmpe_irq_chip, 765 + irq_set_chip_data(irq, stmpe); 766 + irq_set_chip_and_handler(irq, &stmpe_irq_chip, 767 767 handle_edge_irq); 768 - set_irq_nested_thread(irq, 1); 768 + irq_set_nested_thread(irq, 1); 769 769 #ifdef CONFIG_ARM 770 770 set_irq_flags(irq, IRQF_VALID); 771 771 #else 772 - set_irq_noprobe(irq); 772 + irq_set_noprobe(irq); 773 773 #endif 774 774 } 775 775 ··· 786 786 #ifdef CONFIG_ARM 787 787 set_irq_flags(irq, 0); 788 788 #endif 789 - set_irq_chip_and_handler(irq, NULL, NULL); 790 - set_irq_chip_data(irq, NULL); 789 + irq_set_chip_and_handler(irq, NULL, NULL); 790 + irq_set_chip_data(irq, NULL); 791 791 } 792 792 } 793 793
+11 -11
drivers/mfd/t7l66xb.c
··· 186 186 /* Handle the T7L66XB interrupt mux */ 187 187 static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc) 188 188 { 189 - struct t7l66xb *t7l66xb = get_irq_data(irq); 189 + struct t7l66xb *t7l66xb = irq_get_handler_data(irq); 190 190 unsigned int isr; 191 191 unsigned int i, irq_base; 192 192 ··· 243 243 irq_base = t7l66xb->irq_base; 244 244 245 245 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { 246 - set_irq_chip(irq, &t7l66xb_chip); 247 - set_irq_chip_data(irq, t7l66xb); 248 - set_irq_handler(irq, handle_level_irq); 246 + irq_set_chip(irq, &t7l66xb_chip); 247 + irq_set_chip_data(irq, t7l66xb); 248 + irq_set_handler(irq, handle_level_irq); 249 249 #ifdef CONFIG_ARM 250 250 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 251 251 #endif 252 252 } 253 253 254 - set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); 255 - set_irq_data(t7l66xb->irq, t7l66xb); 256 - set_irq_chained_handler(t7l66xb->irq, t7l66xb_irq); 254 + irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); 255 + irq_set_handler_data(t7l66xb->irq, t7l66xb); 256 + irq_set_chained_handler(t7l66xb->irq, t7l66xb_irq); 257 257 } 258 258 259 259 static void t7l66xb_detach_irq(struct platform_device *dev) ··· 263 263 264 264 irq_base = t7l66xb->irq_base; 265 265 266 - set_irq_chained_handler(t7l66xb->irq, NULL); 267 - set_irq_data(t7l66xb->irq, NULL); 266 + irq_set_chained_handler(t7l66xb->irq, NULL); 267 + irq_set_handler_data(t7l66xb->irq, NULL); 268 268 269 269 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { 270 270 #ifdef CONFIG_ARM 271 271 set_irq_flags(irq, 0); 272 272 #endif 273 - set_irq_chip(irq, NULL); 274 - set_irq_chip_data(irq, NULL); 273 + irq_set_chip(irq, NULL); 274 + irq_set_chip_data(irq, NULL); 275 275 } 276 276 } 277 277
+6 -6
drivers/mfd/tc3589x.c
··· 192 192 int irq; 193 193 194 194 for (irq = base; irq < base + TC3589x_NR_INTERNAL_IRQS; irq++) { 195 - set_irq_chip_data(irq, tc3589x); 196 - set_irq_chip_and_handler(irq, &dummy_irq_chip, 195 + irq_set_chip_data(irq, tc3589x); 196 + irq_set_chip_and_handler(irq, &dummy_irq_chip, 197 197 handle_edge_irq); 198 - set_irq_nested_thread(irq, 1); 198 + irq_set_nested_thread(irq, 1); 199 199 #ifdef CONFIG_ARM 200 200 set_irq_flags(irq, IRQF_VALID); 201 201 #else 202 - set_irq_noprobe(irq); 202 + irq_set_noprobe(irq); 203 203 #endif 204 204 } 205 205 ··· 215 215 #ifdef CONFIG_ARM 216 216 set_irq_flags(irq, 0); 217 217 #endif 218 - set_irq_chip_and_handler(irq, NULL, NULL); 219 - set_irq_chip_data(irq, NULL); 218 + irq_set_chip_and_handler(irq, NULL, NULL); 219 + irq_set_chip_data(irq, NULL); 220 220 } 221 221 } 222 222
+11 -11
drivers/mfd/tc6393xb.c
··· 513 513 static void 514 514 tc6393xb_irq(unsigned int irq, struct irq_desc *desc) 515 515 { 516 - struct tc6393xb *tc6393xb = get_irq_data(irq); 516 + struct tc6393xb *tc6393xb = irq_get_handler_data(irq); 517 517 unsigned int isr; 518 518 unsigned int i, irq_base; 519 519 ··· 572 572 irq_base = tc6393xb->irq_base; 573 573 574 574 for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) { 575 - set_irq_chip(irq, &tc6393xb_chip); 576 - set_irq_chip_data(irq, tc6393xb); 577 - set_irq_handler(irq, handle_edge_irq); 575 + irq_set_chip(irq, &tc6393xb_chip); 576 + irq_set_chip_data(irq, tc6393xb); 577 + irq_set_handler(irq, handle_edge_irq); 578 578 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 579 579 } 580 580 581 - set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING); 582 - set_irq_data(tc6393xb->irq, tc6393xb); 583 - set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq); 581 + irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING); 582 + irq_set_handler_data(tc6393xb->irq, tc6393xb); 583 + irq_set_chained_handler(tc6393xb->irq, tc6393xb_irq); 584 584 } 585 585 586 586 static void tc6393xb_detach_irq(struct platform_device *dev) ··· 588 588 struct tc6393xb *tc6393xb = platform_get_drvdata(dev); 589 589 unsigned int irq, irq_base; 590 590 591 - set_irq_chained_handler(tc6393xb->irq, NULL); 592 - set_irq_data(tc6393xb->irq, NULL); 591 + irq_set_chained_handler(tc6393xb->irq, NULL); 592 + irq_set_handler_data(tc6393xb->irq, NULL); 593 593 594 594 irq_base = tc6393xb->irq_base; 595 595 596 596 for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) { 597 597 set_irq_flags(irq, 0); 598 - set_irq_chip(irq, NULL); 599 - set_irq_chip_data(irq, NULL); 598 + irq_set_chip(irq, NULL); 599 + irq_set_chip_data(irq, NULL); 600 600 } 601 601 } 602 602
+3 -3
drivers/mfd/tps6586x.c
··· 422 422 423 423 for (i = 0; i < ARRAY_SIZE(tps6586x_irqs); i++) { 424 424 int __irq = i + tps6586x->irq_base; 425 - set_irq_chip_data(__irq, tps6586x); 426 - set_irq_chip_and_handler(__irq, &tps6586x->irq_chip, 425 + irq_set_chip_data(__irq, tps6586x); 426 + irq_set_chip_and_handler(__irq, &tps6586x->irq_chip, 427 427 handle_simple_irq); 428 - set_irq_nested_thread(__irq, 1); 428 + irq_set_nested_thread(__irq, 1); 429 429 #ifdef CONFIG_ARM 430 430 set_irq_flags(__irq, IRQF_VALID); 431 431 #endif
+10 -10
drivers/mfd/twl4030-irq.c
··· 454 454 set_irq_flags(irq, IRQF_VALID); 455 455 #else 456 456 /* same effect on other architectures */ 457 - set_irq_noprobe(irq); 457 + irq_set_noprobe(irq); 458 458 #endif 459 459 } 460 460 ··· 650 650 */ 651 651 static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc) 652 652 { 653 - struct sih_agent *agent = get_irq_data(irq); 653 + struct sih_agent *agent = irq_get_handler_data(irq); 654 654 const struct sih *sih = agent->sih; 655 655 int isr; 656 656 ··· 724 724 for (i = 0; i < sih->bits; i++) { 725 725 irq = irq_base + i; 726 726 727 - set_irq_chip_and_handler(irq, &twl4030_sih_irq_chip, 728 - handle_edge_irq); 729 - set_irq_chip_data(irq, agent); 727 + irq_set_chip_and_handler(irq, &twl4030_sih_irq_chip, 728 + handle_edge_irq); 729 + irq_set_chip_data(irq, agent); 730 730 activate_irq(irq); 731 731 } 732 732 ··· 735 735 736 736 /* replace generic PIH handler (handle_simple_irq) */ 737 737 irq = sih_mod + twl4030_irq_base; 738 - set_irq_data(irq, agent); 739 - set_irq_chained_handler(irq, handle_twl4030_sih); 738 + irq_set_handler_data(irq, agent); 739 + irq_set_chained_handler(irq, handle_twl4030_sih); 740 740 741 741 pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name, 742 742 irq, irq_base, twl4030_irq_next - 1); ··· 785 785 twl4030_sih_irq_chip.irq_ack = dummy_irq_chip.irq_ack; 786 786 787 787 for (i = irq_base; i < irq_end; i++) { 788 - set_irq_chip_and_handler(i, &twl4030_irq_chip, 789 - handle_simple_irq); 788 + irq_set_chip_and_handler(i, &twl4030_irq_chip, 789 + handle_simple_irq); 790 790 activate_irq(i); 791 791 } 792 792 twl4030_irq_next = i; ··· 826 826 /* clean up twl4030_sih_setup */ 827 827 fail: 828 828 for (i = irq_base; i < irq_end; i++) 829 - set_irq_chip_and_handler(i, NULL, NULL); 829 + irq_set_chip_and_handler(i, NULL, NULL); 830 830 destroy_workqueue(wq); 831 831 wq = NULL; 832 832 return status;
+4 -4
drivers/mfd/twl6030-irq.c
··· 183 183 set_irq_flags(irq, IRQF_VALID); 184 184 #else 185 185 /* same effect on other architectures */ 186 - set_irq_noprobe(irq); 186 + irq_set_noprobe(irq); 187 187 #endif 188 188 } 189 189 ··· 320 320 twl6030_irq_chip.irq_set_type = NULL; 321 321 322 322 for (i = irq_base; i < irq_end; i++) { 323 - set_irq_chip_and_handler(i, &twl6030_irq_chip, 324 - handle_simple_irq); 323 + irq_set_chip_and_handler(i, &twl6030_irq_chip, 324 + handle_simple_irq); 325 325 activate_irq(i); 326 326 } 327 327 ··· 350 350 351 351 fail_kthread: 352 352 for (i = irq_base; i < irq_end; i++) 353 - set_irq_chip_and_handler(i, NULL, NULL); 353 + irq_set_chip_and_handler(i, NULL, NULL); 354 354 return status; 355 355 } 356 356
+4 -4
drivers/mfd/wm831x-irq.c
··· 553 553 for (cur_irq = wm831x->irq_base; 554 554 cur_irq < ARRAY_SIZE(wm831x_irqs) + wm831x->irq_base; 555 555 cur_irq++) { 556 - set_irq_chip_data(cur_irq, wm831x); 557 - set_irq_chip_and_handler(cur_irq, &wm831x_irq_chip, 556 + irq_set_chip_data(cur_irq, wm831x); 557 + irq_set_chip_and_handler(cur_irq, &wm831x_irq_chip, 558 558 handle_edge_irq); 559 - set_irq_nested_thread(cur_irq, 1); 559 + irq_set_nested_thread(cur_irq, 1); 560 560 561 561 /* ARM needs us to explicitly flag the IRQ as valid 562 562 * and will set them noprobe when we do so. */ 563 563 #ifdef CONFIG_ARM 564 564 set_irq_flags(cur_irq, IRQF_VALID); 565 565 #else 566 - set_irq_noprobe(cur_irq); 566 + irq_set_noprobe(cur_irq); 567 567 #endif 568 568 } 569 569
+4 -4
drivers/mfd/wm8350-irq.c
··· 518 518 for (cur_irq = wm8350->irq_base; 519 519 cur_irq < ARRAY_SIZE(wm8350_irqs) + wm8350->irq_base; 520 520 cur_irq++) { 521 - set_irq_chip_data(cur_irq, wm8350); 522 - set_irq_chip_and_handler(cur_irq, &wm8350_irq_chip, 521 + irq_set_chip_data(cur_irq, wm8350); 522 + irq_set_chip_and_handler(cur_irq, &wm8350_irq_chip, 523 523 handle_edge_irq); 524 - set_irq_nested_thread(cur_irq, 1); 524 + irq_set_nested_thread(cur_irq, 1); 525 525 526 526 /* ARM needs us to explicitly flag the IRQ as valid 527 527 * and will set them noprobe when we do so. */ 528 528 #ifdef CONFIG_ARM 529 529 set_irq_flags(cur_irq, IRQF_VALID); 530 530 #else 531 - set_irq_noprobe(cur_irq); 531 + irq_set_noprobe(cur_irq); 532 532 #endif 533 533 } 534 534
+4 -4
drivers/mfd/wm8994-irq.c
··· 278 278 for (cur_irq = wm8994->irq_base; 279 279 cur_irq < ARRAY_SIZE(wm8994_irqs) + wm8994->irq_base; 280 280 cur_irq++) { 281 - set_irq_chip_data(cur_irq, wm8994); 282 - set_irq_chip_and_handler(cur_irq, &wm8994_irq_chip, 281 + irq_set_chip_data(cur_irq, wm8994); 282 + irq_set_chip_and_handler(cur_irq, &wm8994_irq_chip, 283 283 handle_edge_irq); 284 - set_irq_nested_thread(cur_irq, 1); 284 + irq_set_nested_thread(cur_irq, 1); 285 285 286 286 /* ARM needs us to explicitly flag the IRQ as valid 287 287 * and will set them noprobe when we do so. */ 288 288 #ifdef CONFIG_ARM 289 289 set_irq_flags(cur_irq, IRQF_VALID); 290 290 #else 291 - set_irq_noprobe(cur_irq); 291 + irq_set_noprobe(cur_irq); 292 292 #endif 293 293 } 294 294