Merge branch 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6

* 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] Correct definition of handle_IPI
[IA64] move SAL_CACHE_FLUSH check later in boot
[IA64] MCA recovery: Montecito support
[IA64] cpu-hotplug: Fixing confliction between CPU hot-add and IPI
[IA64] don't double >> PAGE_SHIFT pointer for /dev/kmem access

+85 -36
+67 -26
arch/ia64/kernel/mca_drv.c
··· 435 435 } 436 436 437 437 /** 438 + * get_target_identifier - Get the valid Cache or Bus check target identifier. 439 + * @peidx: pointer of index of processor error section 440 + * 441 + * Return value: 442 + * target address on Success / 0 on Failue 443 + */ 444 + static u64 445 + get_target_identifier(peidx_table_t *peidx) 446 + { 447 + u64 target_address = 0; 448 + sal_log_mod_error_info_t *smei; 449 + pal_cache_check_info_t *pcci; 450 + int i, level = 9; 451 + 452 + /* 453 + * Look through the cache checks for a valid target identifier 454 + * If more than one valid target identifier, return the one 455 + * with the lowest cache level. 456 + */ 457 + for (i = 0; i < peidx_cache_check_num(peidx); i++) { 458 + smei = (sal_log_mod_error_info_t *)peidx_cache_check(peidx, i); 459 + if (smei->valid.target_identifier && smei->target_identifier) { 460 + pcci = (pal_cache_check_info_t *)&(smei->check_info); 461 + if (!target_address || (pcci->level < level)) { 462 + target_address = smei->target_identifier; 463 + level = pcci->level; 464 + continue; 465 + } 466 + } 467 + } 468 + if (target_address) 469 + return target_address; 470 + 471 + /* 472 + * Look at the bus check for a valid target identifier 473 + */ 474 + smei = peidx_bus_check(peidx, 0); 475 + if (smei && smei->valid.target_identifier) 476 + return smei->target_identifier; 477 + 478 + return 0; 479 + } 480 + 481 + /** 438 482 * recover_from_read_error - Try to recover the errors which type are "read"s. 439 483 * @slidx: pointer of index of SAL error record 440 484 * @peidx: pointer of index of processor error section ··· 494 450 peidx_table_t *peidx, pal_bus_check_info_t *pbci, 495 451 struct ia64_sal_os_state *sos) 496 452 { 497 - sal_log_mod_error_info_t *smei; 453 + u64 target_identifier; 498 454 pal_min_state_area_t *pmsa; 499 455 struct ia64_psr *psr1, *psr2; 500 456 ia64_fptr_t *mca_hdlr_bh = (ia64_fptr_t*)mca_handler_bhhook; 501 457 502 458 /* Is target address valid? */ 503 - if (!pbci->tv) 459 + target_identifier = get_target_identifier(peidx); 460 + if (!target_identifier) 504 461 return fatal_mca("target address not valid"); 505 462 506 463 /* ··· 532 487 pmsa = sos->pal_min_state; 533 488 if (psr1->cpl != 0 || 534 489 ((psr2->cpl != 0) && mca_recover_range(pmsa->pmsa_iip))) { 535 - smei = peidx_bus_check(peidx, 0); 536 - if (smei->valid.target_identifier) { 537 - /* 538 - * setup for resume to bottom half of MCA, 539 - * "mca_handler_bhhook" 540 - */ 541 - /* pass to bhhook as argument (gr8, ...) */ 542 - pmsa->pmsa_gr[8-1] = smei->target_identifier; 543 - pmsa->pmsa_gr[9-1] = pmsa->pmsa_iip; 544 - pmsa->pmsa_gr[10-1] = pmsa->pmsa_ipsr; 545 - /* set interrupted return address (but no use) */ 546 - pmsa->pmsa_br0 = pmsa->pmsa_iip; 547 - /* change resume address to bottom half */ 548 - pmsa->pmsa_iip = mca_hdlr_bh->fp; 549 - pmsa->pmsa_gr[1-1] = mca_hdlr_bh->gp; 550 - /* set cpl with kernel mode */ 551 - psr2 = (struct ia64_psr *)&pmsa->pmsa_ipsr; 552 - psr2->cpl = 0; 553 - psr2->ri = 0; 554 - psr2->bn = 1; 555 - psr2->i = 0; 490 + /* 491 + * setup for resume to bottom half of MCA, 492 + * "mca_handler_bhhook" 493 + */ 494 + /* pass to bhhook as argument (gr8, ...) */ 495 + pmsa->pmsa_gr[8-1] = target_identifier; 496 + pmsa->pmsa_gr[9-1] = pmsa->pmsa_iip; 497 + pmsa->pmsa_gr[10-1] = pmsa->pmsa_ipsr; 498 + /* set interrupted return address (but no use) */ 499 + pmsa->pmsa_br0 = pmsa->pmsa_iip; 500 + /* change resume address to bottom half */ 501 + pmsa->pmsa_iip = mca_hdlr_bh->fp; 502 + pmsa->pmsa_gr[1-1] = mca_hdlr_bh->gp; 503 + /* set cpl with kernel mode */ 504 + psr2 = (struct ia64_psr *)&pmsa->pmsa_ipsr; 505 + psr2->cpl = 0; 506 + psr2->ri = 0; 507 + psr2->bn = 1; 508 + psr2->i = 0; 556 509 557 - return mca_recovered("user memory corruption. " 510 + return mca_recovered("user memory corruption. " 558 511 "kill affected process - recovered."); 559 - } 560 - 561 512 } 562 513 563 514 return fatal_mca("kernel context not recovered, iip 0x%lx\n",
+7 -4
arch/ia64/kernel/sal.c
··· 223 223 */ 224 224 static int sal_cache_flush_drops_interrupts; 225 225 226 - static void __init 226 + void __init 227 227 check_sal_cache_flush (void) 228 228 { 229 229 unsigned long flags; 230 230 int cpu; 231 - u64 vector; 231 + u64 vector, cache_type = 3; 232 + struct ia64_sal_retval isrv; 232 233 233 234 cpu = get_cpu(); 234 235 local_irq_save(flags); ··· 244 243 while (!ia64_get_irr(IA64_TIMER_VECTOR)) 245 244 cpu_relax(); 246 245 247 - ia64_sal_cache_flush(3); 246 + SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0); 247 + 248 + if (isrv.status) 249 + printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status); 248 250 249 251 if (ia64_get_irr(IA64_TIMER_VECTOR)) { 250 252 vector = ia64_get_ivr(); ··· 335 331 p += SAL_DESC_SIZE(*p); 336 332 } 337 333 338 - check_sal_cache_flush(); 339 334 } 340 335 341 336 int
+2
arch/ia64/kernel/setup.c
··· 457 457 cpu_init(); /* initialize the bootstrap CPU */ 458 458 mmu_context_init(); /* initialize context_id bitmap */ 459 459 460 + check_sal_cache_flush(); 461 + 460 462 #ifdef CONFIG_ACPI 461 463 acpi_boot_init(); 462 464 #endif
+7 -5
arch/ia64/kernel/smp.c
··· 108 108 } 109 109 110 110 irqreturn_t 111 - handle_IPI (int irq, void *dev_id, struct pt_regs *regs) 111 + handle_IPI (int irq, void *dev_id) 112 112 { 113 113 int this_cpu = get_cpu(); 114 114 unsigned long *pending_ipis = &__ia64_per_cpu_var(ipi_operation); ··· 328 328 smp_call_function (void (*func) (void *info), void *info, int nonatomic, int wait) 329 329 { 330 330 struct call_data_struct data; 331 - int cpus = num_online_cpus()-1; 331 + int cpus; 332 332 333 - if (!cpus) 333 + spin_lock(&call_lock); 334 + cpus = num_online_cpus() - 1; 335 + if (!cpus) { 336 + spin_unlock(&call_lock); 334 337 return 0; 338 + } 335 339 336 340 /* Can deadlock when called with interrupts disabled */ 337 341 WARN_ON(irqs_disabled()); ··· 346 342 data.wait = wait; 347 343 if (wait) 348 344 atomic_set(&data.finished, 0); 349 - 350 - spin_lock(&call_lock); 351 345 352 346 call_data = &data; 353 347 mb(); /* ensure store to call_data precedes setting of IPI_CALL_FUNC */
+1
include/asm-ia64/sal.h
··· 659 659 } 660 660 661 661 extern s64 ia64_sal_cache_flush (u64 cache_type); 662 + extern void __init check_sal_cache_flush (void); 662 663 663 664 /* Initialize all the processor and platform level instruction and data caches */ 664 665 static inline s64
+1 -1
include/asm-ia64/uaccess.h
··· 389 389 struct page *page; 390 390 char * ptr; 391 391 392 - page = virt_to_page((unsigned long)p >> PAGE_SHIFT); 392 + page = virt_to_page((unsigned long)p); 393 393 if (PageUncached(page)) 394 394 ptr = (char *)__pa(p) + __IA64_UNCACHED_OFFSET; 395 395 else