Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

tools/include: Sync arm64 headers with the kernel sources

To pick up changes from:

9ef54a384526 arm64: cputype: Add Cortex-A725 definitions
58d245e03c32 arm64: cputype: Add Cortex-X1C definitions
fd2ff5f0b320 arm64: cputype: Add Cortex-X925 definitions
add332c40328 arm64: cputype: Add Cortex-A720 definitions
be5a6f238700 arm64: cputype: Add Cortex-X3 definitions

This should be used to beautify x86 syscall arguments and it addresses
these tools/perf build warnings:

Warning: Kernel ABI header differences:
diff -u tools/arch/arm64/include/asm/cputype.h arch/arm64/include/asm/cputype.h

Please see tools/include/uapi/README for details (it's in the first patch
of this series).

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Namhyung Kim <namhyung@kernel.org>

+10
+10
tools/arch/arm64/include/asm/cputype.h
··· 86 86 #define ARM_CPU_PART_CORTEX_X2 0xD48 87 87 #define ARM_CPU_PART_NEOVERSE_N2 0xD49 88 88 #define ARM_CPU_PART_CORTEX_A78C 0xD4B 89 + #define ARM_CPU_PART_CORTEX_X1C 0xD4C 90 + #define ARM_CPU_PART_CORTEX_X3 0xD4E 89 91 #define ARM_CPU_PART_NEOVERSE_V2 0xD4F 92 + #define ARM_CPU_PART_CORTEX_A720 0xD81 90 93 #define ARM_CPU_PART_CORTEX_X4 0xD82 91 94 #define ARM_CPU_PART_NEOVERSE_V3 0xD84 95 + #define ARM_CPU_PART_CORTEX_X925 0xD85 96 + #define ARM_CPU_PART_CORTEX_A725 0xD87 92 97 93 98 #define APM_CPU_PART_XGENE 0x000 94 99 #define APM_CPU_VAR_POTENZA 0x00 ··· 167 162 #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) 168 163 #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) 169 164 #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) 165 + #define MIDR_CORTEX_X1C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C) 166 + #define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3) 170 167 #define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2) 168 + #define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720) 171 169 #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4) 172 170 #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3) 171 + #define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925) 172 + #define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725) 173 173 #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) 174 174 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) 175 175 #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)