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dt-bindings: display: rockchip: convert rockchip-lvds.txt to YAML

Convert rockchip-lvds.txt to YAML.

Changed:
Add power-domains property.
Requirements between PX30 and RK3288

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/67771143-fd83-383d-41b2-68e8707134e8@gmail.com

authored by

Johan Jonker and committed by
Heiko Stuebner
d567ca6e 8094d717

+170 -92
+170
Documentation/devicetree/bindings/display/rockchip/rockchip,lvds.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Rockchip low-voltage differential signal (LVDS) transmitter 8 + 9 + maintainers: 10 + - Sandy Huang <hjc@rock-chips.com> 11 + - Heiko Stuebner <heiko@sntech.de> 12 + 13 + properties: 14 + compatible: 15 + enum: 16 + - rockchip,px30-lvds 17 + - rockchip,rk3288-lvds 18 + 19 + reg: 20 + maxItems: 1 21 + 22 + clocks: 23 + maxItems: 1 24 + 25 + clock-names: 26 + const: pclk_lvds 27 + 28 + avdd1v0-supply: 29 + description: 1.0V analog power. 30 + 31 + avdd1v8-supply: 32 + description: 1.8V analog power. 33 + 34 + avdd3v3-supply: 35 + description: 3.3V analog power. 36 + 37 + rockchip,grf: 38 + $ref: /schemas/types.yaml#/definitions/phandle 39 + description: Phandle to the general register files syscon. 40 + 41 + rockchip,output: 42 + $ref: /schemas/types.yaml#/definitions/string 43 + enum: [rgb, lvds, duallvds] 44 + description: This describes the output interface. 45 + 46 + phys: 47 + maxItems: 1 48 + 49 + phy-names: 50 + const: dphy 51 + 52 + pinctrl-names: 53 + const: lcdc 54 + 55 + pinctrl-0: true 56 + 57 + power-domains: 58 + maxItems: 1 59 + 60 + ports: 61 + $ref: /schemas/graph.yaml#/properties/ports 62 + 63 + properties: 64 + port@0: 65 + $ref: /schemas/graph.yaml#/properties/port 66 + description: 67 + Video port 0 for the VOP input. 68 + The remote endpoint maybe vopb or vopl. 69 + 70 + port@1: 71 + $ref: /schemas/graph.yaml#/properties/port 72 + description: 73 + Video port 1 for either a panel or subsequent encoder. 74 + 75 + required: 76 + - port@0 77 + - port@1 78 + 79 + required: 80 + - compatible 81 + - rockchip,grf 82 + - rockchip,output 83 + - ports 84 + 85 + allOf: 86 + - if: 87 + properties: 88 + compatible: 89 + contains: 90 + const: rockchip,px30-lvds 91 + 92 + then: 93 + properties: 94 + reg: false 95 + clocks: false 96 + clock-names: false 97 + avdd1v0-supply: false 98 + avdd1v8-supply: false 99 + avdd3v3-supply: false 100 + 101 + required: 102 + - phys 103 + - phy-names 104 + 105 + - if: 106 + properties: 107 + compatible: 108 + contains: 109 + const: rockchip,rk3288-lvds 110 + 111 + then: 112 + properties: 113 + phys: false 114 + phy-names: false 115 + 116 + required: 117 + - reg 118 + - clocks 119 + - clock-names 120 + - avdd1v0-supply 121 + - avdd1v8-supply 122 + - avdd3v3-supply 123 + 124 + additionalProperties: false 125 + 126 + examples: 127 + - | 128 + #include <dt-bindings/clock/rk3288-cru.h> 129 + 130 + lvds: lvds@ff96c000 { 131 + compatible = "rockchip,rk3288-lvds"; 132 + reg = <0xff96c000 0x4000>; 133 + clocks = <&cru PCLK_LVDS_PHY>; 134 + clock-names = "pclk_lvds"; 135 + avdd1v0-supply = <&vdd10_lcd>; 136 + avdd1v8-supply = <&vcc18_lcd>; 137 + avdd3v3-supply = <&vcca_33>; 138 + pinctrl-names = "lcdc"; 139 + pinctrl-0 = <&lcdc_ctl>; 140 + rockchip,grf = <&grf>; 141 + rockchip,output = "rgb"; 142 + 143 + ports { 144 + #address-cells = <1>; 145 + #size-cells = <0>; 146 + 147 + lvds_in: port@0 { 148 + reg = <0>; 149 + #address-cells = <1>; 150 + #size-cells = <0>; 151 + 152 + lvds_in_vopb: endpoint@0 { 153 + reg = <0>; 154 + remote-endpoint = <&vopb_out_lvds>; 155 + }; 156 + lvds_in_vopl: endpoint@1 { 157 + reg = <1>; 158 + remote-endpoint = <&vopl_out_lvds>; 159 + }; 160 + }; 161 + 162 + lvds_out: port@1 { 163 + reg = <1>; 164 + 165 + lvds_out_panel: endpoint { 166 + remote-endpoint = <&panel_in_lvds>; 167 + }; 168 + }; 169 + }; 170 + };
-92
Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
··· 1 - Rockchip RK3288 LVDS interface 2 - ================================ 3 - 4 - Required properties: 5 - - compatible: matching the soc type, one of 6 - - "rockchip,rk3288-lvds"; 7 - - "rockchip,px30-lvds"; 8 - 9 - - reg: physical base address of the controller and length 10 - of memory mapped region. 11 - - clocks: must include clock specifiers corresponding to entries in the 12 - clock-names property. 13 - - clock-names: must contain "pclk_lvds" 14 - 15 - - avdd1v0-supply: regulator phandle for 1.0V analog power 16 - - avdd1v8-supply: regulator phandle for 1.8V analog power 17 - - avdd3v3-supply: regulator phandle for 3.3V analog power 18 - 19 - - rockchip,grf: phandle to the general register files syscon 20 - - rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface 21 - 22 - - phys: LVDS/DSI DPHY (px30 only) 23 - - phy-names: name of the PHY, must be "dphy" (px30 only) 24 - 25 - Optional properties: 26 - - pinctrl-names: must contain a "lcdc" entry. 27 - - pinctrl-0: pin control group to be used for this controller. 28 - 29 - Required nodes: 30 - 31 - The lvds has two video ports as described by 32 - Documentation/devicetree/bindings/media/video-interfaces.txt 33 - Their connections are modeled using the OF graph bindings specified in 34 - Documentation/devicetree/bindings/graph.txt. 35 - 36 - - video port 0 for the VOP input, the remote endpoint maybe vopb or vopl 37 - - video port 1 for either a panel or subsequent encoder 38 - 39 - Example: 40 - 41 - lvds_panel: lvds-panel { 42 - compatible = "auo,b101ean01"; 43 - enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; 44 - data-mapping = "jeida-24"; 45 - 46 - ports { 47 - panel_in_lvds: endpoint { 48 - remote-endpoint = <&lvds_out_panel>; 49 - }; 50 - }; 51 - }; 52 - 53 - For Rockchip RK3288: 54 - 55 - lvds: lvds@ff96c000 { 56 - compatible = "rockchip,rk3288-lvds"; 57 - rockchip,grf = <&grf>; 58 - reg = <0xff96c000 0x4000>; 59 - clocks = <&cru PCLK_LVDS_PHY>; 60 - clock-names = "pclk_lvds"; 61 - pinctrl-names = "lcdc"; 62 - pinctrl-0 = <&lcdc_ctl>; 63 - avdd1v0-supply = <&vdd10_lcd>; 64 - avdd1v8-supply = <&vcc18_lcd>; 65 - avdd3v3-supply = <&vcca_33>; 66 - rockchip,output = "rgb"; 67 - ports { 68 - #address-cells = <1>; 69 - #size-cells = <0>; 70 - 71 - lvds_in: port@0 { 72 - reg = <0>; 73 - 74 - lvds_in_vopb: endpoint@0 { 75 - reg = <0>; 76 - remote-endpoint = <&vopb_out_lvds>; 77 - }; 78 - lvds_in_vopl: endpoint@1 { 79 - reg = <1>; 80 - remote-endpoint = <&vopl_out_lvds>; 81 - }; 82 - }; 83 - 84 - lvds_out: port@1 { 85 - reg = <1>; 86 - 87 - lvds_out_panel: endpoint { 88 - remote-endpoint = <&panel_in_lvds>; 89 - }; 90 - }; 91 - }; 92 - };