[POWERPC] prpmc2800: Convert DTS to v1 and add labels

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Update the prpmc2800 DTS file to version 1 and add labels.
I verified that there was no change in the resulting dtb file.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

authored by

Mark A. Greer and committed by

Paul Mackerras 18 years ago d528be50 53bcddb9

+134 -130

1 changed file

expand all

arch

powerpc

boot

dts

prpmc2800.dts

+134 -130

arch/powerpc/boot/dts/prpmc2800.dts

··· 11 11 * if it can determine the exact PrPMC type. 12 12 */ 13 13 14 + /dts-v1/; 15 + 14 16 / { 15 17 #address-cells = <1>; 16 18 #size-cells = <1>; ··· 27 25 PowerPC,7447 { 28 26 device_type = "cpu"; 29 27 reg = <0>; 30 - clock-frequency = <2bb0b140>; /* Default (733 MHz) */ 31 - bus-frequency = <7f28155>; /* 133.333333 MHz */ 32 - timebase-frequency = <1fca055>; /* 33.333333 MHz */ 33 - i-cache-line-size = <20>; 34 - d-cache-line-size = <20>; 35 - i-cache-size = <8000>; 36 - d-cache-size = <8000>; 28 + clock-frequency = <733000000>; /* Default */ 29 + bus-frequency = <133333333>; 30 + timebase-frequency = <33333333>; 31 + i-cache-line-size = <32>; 32 + d-cache-line-size = <32>; 33 + i-cache-size = <32768>; 34 + d-cache-size = <32768>; 37 35 }; 38 36 }; 39 37 40 38 memory { 41 39 device_type = "memory"; 42 - reg = <00000000 20000000>; /* Default (512MB) */ 40 + reg = <0x0 0x20000000>; /* Default (512MB) */ 43 41 }; 44 42 45 43 mv64x60@f1000000 { /* Marvell Discovery */ ··· 47 45 #size-cells = <1>; 48 46 model = "mv64360"; /* Default */ 49 47 compatible = "marvell,mv64x60"; 50 - clock-frequency = <7f28155>; /* 133.333333 MHz */ 51 - reg = <f1000000 00010000>; 52 - virtual-reg = <f1000000>; 53 - ranges = <88000000 88000000 01000000 /* PCI 0 I/O Space */ 54 - 80000000 80000000 08000000 /* PCI 0 MEM Space */ 55 - a0000000 a0000000 04000000 /* User FLASH */ 56 - 00000000 f1000000 00010000 /* Bridge's regs */ 57 - f2000000 f2000000 00040000>; /* Integrated SRAM */ 48 + clock-frequency = <133333333>; 49 + reg = <0xf1000000 0x10000>; 50 + virtual-reg = <0xf1000000>; 51 + ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */ 52 + 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */ 53 + 0xa0000000 0xa0000000 0x4000000 /* User FLASH */ 54 + 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */ 55 + 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */ 58 56 59 57 flash@a0000000 { 60 58 device_type = "rom"; 61 59 compatible = "direct-mapped"; 62 - reg = <a0000000 4000000>; /* Default (64MB) */ 60 + reg = <0xa0000000 0x4000000>; /* Default (64MB) */ 63 61 probe-type = "CFI"; 64 62 bank-width = <4>; 65 - partitions = <00000000 00100000 /* RO */ 66 - 00100000 00040001 /* RW */ 67 - 00140000 00400000 /* RO */ 68 - 00540000 039c0000 /* RO */ 69 - 03f00000 00100000>; /* RO */ 63 + partitions = <0x00000000 0x00100000 /* RO */ 64 + 0x00100000 0x00040001 /* RW */ 65 + 0x00140000 0x00400000 /* RO */ 66 + 0x00540000 0x039c0000 /* RO */ 67 + 0x03f00000 0x00100000>; /* RO */ 70 68 partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B"; 71 69 }; 72 70 ··· 75 73 #size-cells = <0>; 76 74 device_type = "mdio"; 77 75 compatible = "marvell,mv64x60-mdio"; 78 - ethernet-phy@1 { 76 + PHY0: ethernet-phy@1 { 79 77 device_type = "ethernet-phy"; 80 78 compatible = "broadcom,bcm5421"; 81 - interrupts = <4c>; /* GPP 12 */ 82 - interrupt-parent = <&/mv64x60/pic>; 79 + interrupts = <76>; /* GPP 12 */ 80 + interrupt-parent = <&PIC>; 83 81 reg = <1>; 84 82 }; 85 - ethernet-phy@3 { 83 + PHY1: ethernet-phy@3 { 86 84 device_type = "ethernet-phy"; 87 85 compatible = "broadcom,bcm5421"; 88 - interrupts = <4c>; /* GPP 12 */ 89 - interrupt-parent = <&/mv64x60/pic>; 86 + interrupts = <76>; /* GPP 12 */ 87 + interrupt-parent = <&PIC>; 90 88 reg = <3>; 91 89 }; 92 90 }; 93 91 94 92 ethernet@2000 { 95 - reg = <2000 2000>; 93 + reg = <0x2000 0x2000>; 96 94 eth0 { 97 95 device_type = "network"; 98 96 compatible = "marvell,mv64x60-eth"; 99 97 block-index = <0>; 100 - interrupts = <20>; 101 - interrupt-parent = <&/mv64x60/pic>; 102 - phy = <&/mv64x60/mdio/ethernet-phy@1>; 98 + interrupts = <32>; 99 + interrupt-parent = <&PIC>; 100 + phy = <&PHY0>; 103 101 local-mac-address = [ 00 00 00 00 00 00 ]; 104 102 }; 105 103 eth1 { 106 104 device_type = "network"; 107 105 compatible = "marvell,mv64x60-eth"; 108 106 block-index = <1>; 109 - interrupts = <21>; 110 - interrupt-parent = <&/mv64x60/pic>; 111 - phy = <&/mv64x60/mdio/ethernet-phy@3>; 107 + interrupts = <33>; 108 + interrupt-parent = <&PIC>; 109 + phy = <&PHY1>; 112 110 local-mac-address = [ 00 00 00 00 00 00 ]; 113 111 }; 114 112 }; 115 113 116 - sdma@4000 { 114 + SDMA0: sdma@4000 { 117 115 device_type = "dma"; 118 116 compatible = "marvell,mv64x60-sdma"; 119 - reg = <4000 c18>; 120 - virtual-reg = <f1004000>; 117 + reg = <0x4000 0xc18>; 118 + virtual-reg = <0xf1004000>; 121 119 interrupt-base = <0>; 122 - interrupts = <24>; 123 - interrupt-parent = <&/mv64x60/pic>; 120 + interrupts = <36>; 121 + interrupt-parent = <&PIC>; 124 122 }; 125 123 126 - sdma@6000 { 124 + SDMA1: sdma@6000 { 127 125 device_type = "dma"; 128 126 compatible = "marvell,mv64x60-sdma"; 129 - reg = <6000 c18>; 130 - virtual-reg = <f1006000>; 127 + reg = <0x6000 0xc18>; 128 + virtual-reg = <0xf1006000>; 131 129 interrupt-base = <0>; 132 - interrupts = <26>; 133 - interrupt-parent = <&/mv64x60/pic>; 130 + interrupts = <38>; 131 + interrupt-parent = <&PIC>; 134 132 }; 135 133 136 - brg@b200 { 134 + BRG0: brg@b200 { 137 135 compatible = "marvell,mv64x60-brg"; 138 - reg = <b200 8>; 136 + reg = <0xb200 0x8>; 139 137 clock-src = <8>; 140 - clock-frequency = <7ed6b40>; 141 - current-speed = <2580>; 138 + clock-frequency = <133000000>; 139 + current-speed = <9600>; 142 140 bcr = <0>; 143 141 }; 144 142 145 - brg@b208 { 143 + BRG1: brg@b208 { 146 144 compatible = "marvell,mv64x60-brg"; 147 - reg = <b208 8>; 145 + reg = <0xb208 0x8>; 148 146 clock-src = <8>; 149 - clock-frequency = <7ed6b40>; 150 - current-speed = <2580>; 147 + clock-frequency = <133000000>; 148 + current-speed = <9600>; 151 149 bcr = <0>; 152 150 }; 153 151 154 - cunit@f200 { 155 - reg = <f200 200>; 152 + CUNIT: cunit@f200 { 153 + reg = <0xf200 0x200>; 156 154 }; 157 155 158 - mpscrouting@b400 { 159 - reg = <b400 c>; 156 + MPSCROUTING: mpscrouting@b400 { 157 + reg = <0xb400 0xc>; 160 158 }; 161 159 162 - mpscintr@b800 { 163 - reg = <b800 100>; 164 - virtual-reg = <f100b800>; 160 + MPSCINTR: mpscintr@b800 { 161 + reg = <0xb800 0x100>; 162 + virtual-reg = <0xf100b800>; 165 163 }; 166 164 167 - mpsc@8000 { 165 + MPSC0: mpsc@8000 { 168 166 device_type = "serial"; 169 167 compatible = "marvell,mpsc"; 170 - reg = <8000 38>; 171 - virtual-reg = <f1008000>; 172 - sdma = <&/mv64x60/sdma@4000>; 173 - brg = <&/mv64x60/brg@b200>; 174 - cunit = <&/mv64x60/cunit@f200>; 175 - mpscrouting = <&/mv64x60/mpscrouting@b400>; 176 - mpscintr = <&/mv64x60/mpscintr@b800>; 168 + reg = <0x8000 0x38>; 169 + virtual-reg = <0xf1008000>; 170 + sdma = <&SDMA0>; 171 + brg = <&BRG0>; 172 + cunit = <&CUNIT>; 173 + mpscrouting = <&MPSCROUTING>; 174 + mpscintr = <&MPSCINTR>; 177 175 block-index = <0>; 178 - max_idle = <28>; 176 + max_idle = <40>; 179 177 chr_1 = <0>; 180 178 chr_2 = <0>; 181 179 chr_10 = <3>; 182 180 mpcr = <0>; 183 - interrupts = <28>; 184 - interrupt-parent = <&/mv64x60/pic>; 181 + interrupts = <40>; 182 + interrupt-parent = <&PIC>; 185 183 }; 186 184 187 - mpsc@9000 { 185 + MPSC1: mpsc@9000 { 188 186 device_type = "serial"; 189 187 compatible = "marvell,mpsc"; 190 - reg = <9000 38>; 191 - virtual-reg = <f1009000>; 192 - sdma = <&/mv64x60/sdma@6000>; 193 - brg = <&/mv64x60/brg@b208>; 194 - cunit = <&/mv64x60/cunit@f200>; 195 - mpscrouting = <&/mv64x60/mpscrouting@b400>; 196 - mpscintr = <&/mv64x60/mpscintr@b800>; 188 + reg = <0x9000 0x38>; 189 + virtual-reg = <0xf1009000>; 190 + sdma = <&SDMA1>; 191 + brg = <&BRG1>; 192 + cunit = <&CUNIT>; 193 + mpscrouting = <&MPSCROUTING>; 194 + mpscintr = <&MPSCINTR>; 197 195 block-index = <1>; 198 - max_idle = <28>; 196 + max_idle = <40>; 199 197 chr_1 = <0>; 200 198 chr_2 = <0>; 201 199 chr_10 = <3>; 202 200 mpcr = <0>; 203 - interrupts = <2a>; 204 - interrupt-parent = <&/mv64x60/pic>; 201 + interrupts = <42>; 202 + interrupt-parent = <&PIC>; 205 203 }; 206 204 207 205 wdt@b410 { /* watchdog timer */ 208 206 compatible = "marvell,mv64x60-wdt"; 209 - reg = <b410 8>; 210 - timeout = <a>; /* wdt timeout in seconds */ 207 + reg = <0xb410 0x8>; 208 + timeout = <10>; /* wdt timeout in seconds */ 211 209 }; 212 210 213 211 i2c@c000 { 214 212 device_type = "i2c"; 215 213 compatible = "marvell,mv64x60-i2c"; 216 - reg = <c000 20>; 217 - virtual-reg = <f100c000>; 214 + reg = <0xc000 0x20>; 215 + virtual-reg = <0xf100c000>; 218 216 freq_m = <8>; 219 217 freq_n = <3>; 220 - timeout = <3e8>; /* 1000 = 1 second */ 218 + timeout = <1000>; /* 1000 = 1 second */ 221 219 retries = <1>; 222 - interrupts = <25>; 223 - interrupt-parent = <&/mv64x60/pic>; 220 + interrupts = <37>; 221 + interrupt-parent = <&PIC>; 224 222 }; 225 223 226 - pic { 224 + PIC: pic { 227 225 #interrupt-cells = <1>; 228 226 #address-cells = <0>; 229 227 compatible = "marvell,mv64x60-pic"; 230 - reg = <0000 88>; 228 + reg = <0x0 0x88>; 231 229 interrupt-controller; 232 230 }; 233 231 234 232 mpp@f000 { 235 233 compatible = "marvell,mv64x60-mpp"; 236 - reg = <f000 10>; 234 + reg = <0xf000 0x10>; 237 235 }; 238 236 239 237 gpp@f100 { 240 238 compatible = "marvell,mv64x60-gpp"; 241 - reg = <f100 20>; 239 + reg = <0xf100 0x20>; 242 240 }; 243 241 244 242 pci@80000000 { ··· 247 245 #interrupt-cells = <1>; 248 246 device_type = "pci"; 249 247 compatible = "marvell,mv64x60-pci"; 250 - reg = <0cf8 8>; 251 - ranges = <01000000 0 0 88000000 0 01000000 252 - 02000000 0 80000000 80000000 0 08000000>; 253 - bus-range = <0 ff>; 254 - clock-frequency = <3EF1480>; 255 - interrupt-pci-iack = <0c34>; 256 - interrupt-parent = <&/mv64x60/pic>; 257 - interrupt-map-mask = <f800 0 0 7>; 248 + reg = <0xcf8 0x8>; 249 + ranges = <0x01000000 0x0 0x0 250 + 0x88000000 0x0 0x01000000 251 + 0x02000000 0x0 0x80000000 252 + 0x80000000 0x0 0x08000000>; 253 + bus-range = <0 255>; 254 + clock-frequency = <66000000>; 255 + interrupt-pci-iack = <0xc34>; 256 + interrupt-parent = <&PIC>; 257 + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 258 258 interrupt-map = < 259 259 /* IDSEL 0x0a */ 260 - 5000 0 0 1 &/mv64x60/pic 50 261 - 5000 0 0 2 &/mv64x60/pic 51 262 - 5000 0 0 3 &/mv64x60/pic 5b 263 - 5000 0 0 4 &/mv64x60/pic 5d 260 + 0x5000 0 0 1 &PIC 80 261 + 0x5000 0 0 2 &PIC 81 262 + 0x5000 0 0 3 &PIC 91 263 + 0x5000 0 0 4 &PIC 93 264 264 265 265 /* IDSEL 0x0b */ 266 - 5800 0 0 1 &/mv64x60/pic 5b 267 - 5800 0 0 2 &/mv64x60/pic 5d 268 - 5800 0 0 3 &/mv64x60/pic 50 269 - 5800 0 0 4 &/mv64x60/pic 51 266 + 0x5800 0 0 1 &PIC 91 267 + 0x5800 0 0 2 &PIC 93 268 + 0x5800 0 0 3 &PIC 80 269 + 0x5800 0 0 4 &PIC 81 270 270 271 271 /* IDSEL 0x0c */ 272 - 6000 0 0 1 &/mv64x60/pic 5b 273 - 6000 0 0 2 &/mv64x60/pic 5d 274 - 6000 0 0 3 &/mv64x60/pic 50 275 - 6000 0 0 4 &/mv64x60/pic 51 272 + 0x6000 0 0 1 &PIC 91 273 + 0x6000 0 0 2 &PIC 93 274 + 0x6000 0 0 3 &PIC 80 275 + 0x6000 0 0 4 &PIC 81 276 276 277 277 /* IDSEL 0x0d */ 278 - 6800 0 0 1 &/mv64x60/pic 5d 279 - 6800 0 0 2 &/mv64x60/pic 50 280 - 6800 0 0 3 &/mv64x60/pic 51 281 - 6800 0 0 4 &/mv64x60/pic 5b 278 + 0x6800 0 0 1 &PIC 93 279 + 0x6800 0 0 2 &PIC 80 280 + 0x6800 0 0 3 &PIC 81 281 + 0x6800 0 0 4 &PIC 91 282 282 >; 283 283 }; 284 284 285 285 cpu-error@0070 { 286 286 compatible = "marvell,mv64x60-cpu-error"; 287 - reg = <0070 10 0128 28>; 288 - interrupts = <03>; 289 - interrupt-parent = <&/mv64x60/pic>; 287 + reg = <0x70 0x10 0x128 0x28>; 288 + interrupts = <3>; 289 + interrupt-parent = <&PIC>; 290 290 }; 291 291 292 292 sram-ctrl@0380 { 293 293 compatible = "marvell,mv64x60-sram-ctrl"; 294 - reg = <0380 80>; 295 - interrupts = <0d>; 296 - interrupt-parent = <&/mv64x60/pic>; 294 + reg = <0x380 0x80>; 295 + interrupts = <13>; 296 + interrupt-parent = <&PIC>; 297 297 }; 298 298 299 299 pci-error@1d40 { 300 300 compatible = "marvell,mv64x60-pci-error"; 301 - reg = <1d40 40 0c28 4>; 302 - interrupts = <0c>; 303 - interrupt-parent = <&/mv64x60/pic>; 301 + reg = <0x1d40 0x40 0xc28 0x4>; 302 + interrupts = <12>; 303 + interrupt-parent = <&PIC>; 304 304 }; 305 305 306 306 mem-ctrl@1400 { 307 307 compatible = "marvell,mv64x60-mem-ctrl"; 308 - reg = <1400 60>; 309 - interrupts = <11>; 310 - interrupt-parent = <&/mv64x60/pic>; 308 + reg = <0x1400 0x60>; 309 + interrupts = <17>; 310 + interrupt-parent = <&PIC>; 311 311 }; 312 312 }; 313 313 314 314 chosen { 315 315 bootargs = "ip=on"; 316 - linux,stdout-path = "/mv64x60@f1000000/mpsc@8000"; 316 + linux,stdout-path = &MPSC0; 317 317 }; 318 318 };