tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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dmaengine: qcom_bam_dma: Add support for BAM v1.7.0

Add register offset table entry for the newer (v1.7.0) version of the BAM IP
found on MSM8916. Update the DT bindings documentation.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

authored by

Archit Taneja and committed by
Vinod Koul d51da4d4 b2607227

+31
+1
Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
··· 4 4 - compatible: must be one of the following: 5 5 * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084 6 6 * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960 7 + * "qcom,bam-v1.7.0" for MSM8916 7 8 - reg: Address range for DMA registers 8 9 - interrupts: Should contain the one interrupt shared by all channels 9 10 - #dma-cells: must be <1>, the cell in the dmas property of the client device
+30
drivers/dma/qcom_bam_dma.c
··· 171 171 [BAM_P_FIFO_SIZES] = { 0x1820, 0x00, 0x1000, 0x00 }, 172 172 }; 173 173 174 + static const struct reg_offset_data bam_v1_7_reg_info[] = { 175 + [BAM_CTRL] = { 0x00000, 0x00, 0x00, 0x00 }, 176 + [BAM_REVISION] = { 0x01000, 0x00, 0x00, 0x00 }, 177 + [BAM_NUM_PIPES] = { 0x01008, 0x00, 0x00, 0x00 }, 178 + [BAM_DESC_CNT_TRSHLD] = { 0x00008, 0x00, 0x00, 0x00 }, 179 + [BAM_IRQ_SRCS] = { 0x03010, 0x00, 0x00, 0x00 }, 180 + [BAM_IRQ_SRCS_MSK] = { 0x03014, 0x00, 0x00, 0x00 }, 181 + [BAM_IRQ_SRCS_UNMASKED] = { 0x03018, 0x00, 0x00, 0x00 }, 182 + [BAM_IRQ_STTS] = { 0x00014, 0x00, 0x00, 0x00 }, 183 + [BAM_IRQ_CLR] = { 0x00018, 0x00, 0x00, 0x00 }, 184 + [BAM_IRQ_EN] = { 0x0001C, 0x00, 0x00, 0x00 }, 185 + [BAM_CNFG_BITS] = { 0x0007C, 0x00, 0x00, 0x00 }, 186 + [BAM_IRQ_SRCS_EE] = { 0x03000, 0x00, 0x00, 0x1000 }, 187 + [BAM_IRQ_SRCS_MSK_EE] = { 0x03004, 0x00, 0x00, 0x1000 }, 188 + [BAM_P_CTRL] = { 0x13000, 0x1000, 0x00, 0x00 }, 189 + [BAM_P_RST] = { 0x13004, 0x1000, 0x00, 0x00 }, 190 + [BAM_P_HALT] = { 0x13008, 0x1000, 0x00, 0x00 }, 191 + [BAM_P_IRQ_STTS] = { 0x13010, 0x1000, 0x00, 0x00 }, 192 + [BAM_P_IRQ_CLR] = { 0x13014, 0x1000, 0x00, 0x00 }, 193 + [BAM_P_IRQ_EN] = { 0x13018, 0x1000, 0x00, 0x00 }, 194 + [BAM_P_EVNT_DEST_ADDR] = { 0x1382C, 0x00, 0x1000, 0x00 }, 195 + [BAM_P_EVNT_REG] = { 0x13818, 0x00, 0x1000, 0x00 }, 196 + [BAM_P_SW_OFSTS] = { 0x13800, 0x00, 0x1000, 0x00 }, 197 + [BAM_P_DATA_FIFO_ADDR] = { 0x13824, 0x00, 0x1000, 0x00 }, 198 + [BAM_P_DESC_FIFO_ADDR] = { 0x1381C, 0x00, 0x1000, 0x00 }, 199 + [BAM_P_EVNT_GEN_TRSHLD] = { 0x13828, 0x00, 0x1000, 0x00 }, 200 + [BAM_P_FIFO_SIZES] = { 0x13820, 0x00, 0x1000, 0x00 }, 201 + }; 202 + 174 203 /* BAM CTRL */ 175 204 #define BAM_SW_RST BIT(0) 176 205 #define BAM_EN BIT(1) ··· 1080 1051 static const struct of_device_id bam_of_match[] = { 1081 1052 { .compatible = "qcom,bam-v1.3.0", .data = &bam_v1_3_reg_info }, 1082 1053 { .compatible = "qcom,bam-v1.4.0", .data = &bam_v1_4_reg_info }, 1054 + { .compatible = "qcom,bam-v1.7.0", .data = &bam_v1_7_reg_info }, 1083 1055 {} 1084 1056 }; 1085 1057