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dt-bindings: arm: mediatek: sgmiisys: Convert to DT schema

Convert mediatek,sgmiiisys bindings to DT schema format.
Add maintainer Matthias Brugger, no maintainers were listed in the
original documentation.
As this node is also referenced by the Ethernet controller and used
as SGMII PCS add this fact to the description.
Move the file to Documentation/devicetree/bindings/net/pcs/ which seems
more appropriate given that the great majority of registers are related
to SGMII PCS functionality and only one register represents clock bits.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Daniel Golle and committed by
Jakub Kicinski
d4f08a70 e3ac1c27

+49 -27
-27
Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt
··· 1 - MediaTek SGMIISYS controller 2 - ============================ 3 - 4 - The MediaTek SGMIISYS controller provides various clocks to the system. 5 - 6 - Required Properties: 7 - 8 - - compatible: Should be: 9 - - "mediatek,mt7622-sgmiisys", "syscon" 10 - - "mediatek,mt7629-sgmiisys", "syscon" 11 - - "mediatek,mt7981-sgmiisys_0", "syscon" 12 - - "mediatek,mt7981-sgmiisys_1", "syscon" 13 - - "mediatek,mt7986-sgmiisys_0", "syscon" 14 - - "mediatek,mt7986-sgmiisys_1", "syscon" 15 - - #clock-cells: Must be 1 16 - 17 - The SGMIISYS controller uses the common clk binding from 18 - Documentation/devicetree/bindings/clock/clock-bindings.txt 19 - The available clocks are defined in dt-bindings/clock/mt*-clk.h. 20 - 21 - Example: 22 - 23 - sgmiisys: sgmiisys@1b128000 { 24 - compatible = "mediatek,mt7622-sgmiisys", "syscon"; 25 - reg = <0 0x1b128000 0 0x1000>; 26 - #clock-cells = <1>; 27 - };
+49
Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/net/pcs/mediatek,sgmiisys.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: MediaTek SGMIISYS Controller 8 + 9 + maintainers: 10 + - Matthias Brugger <matthias.bgg@gmail.com> 11 + 12 + description: 13 + The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks 14 + to the ethernet subsystem to which it is attached. 15 + 16 + properties: 17 + compatible: 18 + items: 19 + - enum: 20 + - mediatek,mt7622-sgmiisys 21 + - mediatek,mt7629-sgmiisys 22 + - mediatek,mt7986-sgmiisys_0 23 + - mediatek,mt7986-sgmiisys_1 24 + - const: syscon 25 + 26 + reg: 27 + maxItems: 1 28 + 29 + '#clock-cells': 30 + const: 1 31 + 32 + required: 33 + - compatible 34 + - reg 35 + - '#clock-cells' 36 + 37 + additionalProperties: false 38 + 39 + examples: 40 + - | 41 + soc { 42 + #address-cells = <2>; 43 + #size-cells = <2>; 44 + sgmiisys: syscon@1b128000 { 45 + compatible = "mediatek,mt7622-sgmiisys", "syscon"; 46 + reg = <0 0x1b128000 0 0x1000>; 47 + #clock-cells = <1>; 48 + }; 49 + };