arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes

The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs)
to manage/generate Industrial Ethernet functions such as time stamping.
Each IEP sub-module is sourced from an internal clock mux that can be
derived from either of the IP instance's ICSSG_IEP_GCLK or from another
internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG
instances. The IEP clock is currently configured to be derived
indirectly from the ICSSG_ICLK running at 250 MHz.

Signed-off-by: Grygorii Strashko <[e-mail]>
Signed-off-by: Suman Anna <[e-mail]>
Reviewed-by: Ravi Gunasekaran <[e-mail]>
Reviewed-by: Roger Quadros <[e-mail]>
Signed-off-by: MD Danish Anwar <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]
Signed-off-by: Vignesh Raghavendra <[e-mail]>

arch/arm64/boot/dts/ti/k3-am64-main.dtsi

···
 			};
 		};
 
+		icssg0_iep0: iep@2e000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2e000 0x1000>;
+			clocks = <&icssg0_iepclk_mux>;
+		};
+
+		icssg0_iep1: iep@2f000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2f000 0x1000>;
+			clocks = <&icssg0_iepclk_mux>;
+		};
+
 		icssg0_mii_rt: mii-rt@32000 {
 			compatible = "ti,pruss-mii", "syscon";
 			reg = <0x32000 0x100>;
···
 					assigned-clock-parents = <&icssg1_coreclk_mux>;
 				};
 			};
+		};
+
+		icssg1_iep0: iep@2e000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2e000 0x1000>;
+			clocks = <&icssg1_iepclk_mux>;
+		};
+
+		icssg1_iep1: iep@2f000 {
+			compatible = "ti,am654-icss-iep";
+			reg = <0x2f000 0x1000>;
+			clocks = <&icssg1_iepclk_mux>;
 		};
 
 		icssg1_mii_rt: mii-rt@32000 {