Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'drm-next-2020-06-11-1' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
"One sun4i fix and a connector hotplug race The ast fix is for a
regression in 5.6, and one of the i915 ones fixes an oops reported by
dhowells.

core:
- fix race in connectors sending hotplug

i915:
- Avoid use after free in cmdparser
- Avoid NULL dereference when probing all display encoders
- Fixup to module parameter type

sun4i:
- clock divider fix

ast:
- 24/32 bpp mode setting fix"

* tag 'drm-next-2020-06-11-1' of git://anongit.freedesktop.org/drm/drm:
drm/ast: fix missing break in switch statement for format->cpp[0] case 4
drm/sun4i: hdmi ddc clk: Fix size of m divider
drm/i915/display: Only query DP state of a DDI encoder
drm/i915/params: fix i915.reset module param type
drm/i915/gem: Mark the buffer pool as active for the cmdparser
drm/connector: notify userspace on hotplug after register complete

+60 -14
+1
drivers/gpu/drm/ast/ast_mode.c
··· 226 226 case 3: 227 227 case 4: 228 228 color_index = TrueCModeIndex; 229 + break; 229 230 default: 230 231 return; 231 232 }
+5
drivers/gpu/drm/drm_connector.c
··· 27 27 #include <drm/drm_print.h> 28 28 #include <drm/drm_drv.h> 29 29 #include <drm/drm_file.h> 30 + #include <drm/drm_sysfs.h> 30 31 31 32 #include <linux/uaccess.h> 32 33 ··· 524 523 drm_mode_object_register(connector->dev, &connector->base); 525 524 526 525 connector->registration_state = DRM_CONNECTOR_REGISTERED; 526 + 527 + /* Let userspace know we have a new connector */ 528 + drm_sysfs_hotplug_event(connector->dev); 529 + 527 530 goto unlock; 528 531 529 532 err_debugfs:
-3
drivers/gpu/drm/drm_sysfs.c
··· 291 291 return PTR_ERR(connector->kdev); 292 292 } 293 293 294 - /* Let userspace know we have a new connector */ 295 - drm_sysfs_hotplug_event(dev); 296 - 297 294 if (connector->ddc) 298 295 return sysfs_create_link(&connector->kdev->kobj, 299 296 &connector->ddc->dev.kobj, "ddc");
+3
drivers/gpu/drm/i915/display/intel_dp.c
··· 5206 5206 struct intel_crtc_state *crtc_state, 5207 5207 unsigned int type) 5208 5208 { 5209 + if (encoder->type != INTEL_OUTPUT_DDI) 5210 + return; 5211 + 5209 5212 switch (type) { 5210 5213 case DP_SDP_VSC: 5211 5214 intel_read_dp_vsc_sdp(encoder, crtc_state,
+48 -8
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
··· 1988 1988 .release = __eb_parse_release, 1989 1989 }; 1990 1990 1991 + static inline int 1992 + __parser_mark_active(struct i915_vma *vma, 1993 + struct intel_timeline *tl, 1994 + struct dma_fence *fence) 1995 + { 1996 + struct intel_gt_buffer_pool_node *node = vma->private; 1997 + 1998 + return i915_active_ref(&node->active, tl, fence); 1999 + } 2000 + 2001 + static int 2002 + parser_mark_active(struct eb_parse_work *pw, struct intel_timeline *tl) 2003 + { 2004 + int err; 2005 + 2006 + mutex_lock(&tl->mutex); 2007 + 2008 + err = __parser_mark_active(pw->shadow, tl, &pw->base.dma); 2009 + if (err) 2010 + goto unlock; 2011 + 2012 + if (pw->trampoline) { 2013 + err = __parser_mark_active(pw->trampoline, tl, &pw->base.dma); 2014 + if (err) 2015 + goto unlock; 2016 + } 2017 + 2018 + unlock: 2019 + mutex_unlock(&tl->mutex); 2020 + return err; 2021 + } 2022 + 1991 2023 static int eb_parse_pipeline(struct i915_execbuffer *eb, 1992 2024 struct i915_vma *shadow, 1993 2025 struct i915_vma *trampoline) ··· 2054 2022 pw->shadow = shadow; 2055 2023 pw->trampoline = trampoline; 2056 2024 2025 + /* Mark active refs early for this worker, in case we get interrupted */ 2026 + err = parser_mark_active(pw, eb->context->timeline); 2027 + if (err) 2028 + goto err_commit; 2029 + 2057 2030 err = dma_resv_lock_interruptible(pw->batch->resv, NULL); 2058 2031 if (err) 2059 - goto err_trampoline; 2032 + goto err_commit; 2060 2033 2061 2034 err = dma_resv_reserve_shared(pw->batch->resv, 1); 2062 2035 if (err) 2063 - goto err_batch_unlock; 2036 + goto err_commit_unlock; 2064 2037 2065 2038 /* Wait for all writes (and relocs) into the batch to complete */ 2066 2039 err = i915_sw_fence_await_reservation(&pw->base.chain, 2067 2040 pw->batch->resv, NULL, false, 2068 2041 0, I915_FENCE_GFP); 2069 2042 if (err < 0) 2070 - goto err_batch_unlock; 2043 + goto err_commit_unlock; 2071 2044 2072 2045 /* Keep the batch alive and unwritten as we parse */ 2073 2046 dma_resv_add_shared_fence(pw->batch->resv, &pw->base.dma); ··· 2087 2050 dma_fence_work_commit_imm(&pw->base); 2088 2051 return 0; 2089 2052 2090 - err_batch_unlock: 2053 + err_commit_unlock: 2091 2054 dma_resv_unlock(pw->batch->resv); 2092 - err_trampoline: 2093 - if (trampoline) 2094 - i915_active_release(&trampoline->active); 2055 + err_commit: 2056 + i915_sw_fence_set_error_once(&pw->base.chain, err); 2057 + dma_fence_work_commit_imm(&pw->base); 2058 + return err; 2059 + 2095 2060 err_shadow: 2096 2061 i915_active_release(&shadow->active); 2097 2062 err_batch: ··· 2139 2100 goto err; 2140 2101 } 2141 2102 i915_gem_object_set_readonly(shadow->obj); 2103 + shadow->private = pool; 2142 2104 2143 2105 trampoline = NULL; 2144 2106 if (CMDPARSER_USES_GGTT(eb->i915)) { ··· 2153 2113 shadow = trampoline; 2154 2114 goto err_shadow; 2155 2115 } 2116 + shadow->private = pool; 2156 2117 2157 2118 eb->batch_flags |= I915_DISPATCH_SECURE; 2158 2119 } ··· 2170 2129 eb->trampoline = trampoline; 2171 2130 eb->batch_start_offset = 0; 2172 2131 2173 - shadow->private = pool; 2174 2132 return 0; 2175 2133 2176 2134 err_trampoline:
+1 -1
drivers/gpu/drm/i915/i915_params.c
··· 65 65 "Override/Ignore selection of SDVO panel mode in the VBT " 66 66 "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); 67 67 68 - i915_param_named_unsafe(reset, int, 0600, 68 + i915_param_named_unsafe(reset, uint, 0600, 69 69 "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])"); 70 70 71 71 i915_param_named_unsafe(vbt_firmware, charp, 0400,
+1 -1
drivers/gpu/drm/sun4i/sun4i_hdmi.h
··· 148 148 #define SUN4I_HDMI_DDC_CMD_IMPLICIT_WRITE 3 149 149 150 150 #define SUN4I_HDMI_DDC_CLK_REG 0x528 151 - #define SUN4I_HDMI_DDC_CLK_M(m) (((m) & 0x7) << 3) 151 + #define SUN4I_HDMI_DDC_CLK_M(m) (((m) & 0xf) << 3) 152 152 #define SUN4I_HDMI_DDC_CLK_N(n) ((n) & 0x7) 153 153 154 154 #define SUN4I_HDMI_DDC_LINE_CTRL_REG 0x540
+1 -1
drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c
··· 33 33 unsigned long best_rate = 0; 34 34 u8 best_m = 0, best_n = 0, _m, _n; 35 35 36 - for (_m = 0; _m < 8; _m++) { 36 + for (_m = 0; _m < 16; _m++) { 37 37 for (_n = 0; _n < 8; _n++) { 38 38 unsigned long tmp_rate; 39 39