Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

serial: max310x: Try to get crystal clock rate from property

In some configurations, mainly ACPI-based, the clock frequency of the device
is supplied by very well established 'clock-frequency' property. Hence, try
to get it from the property at last if no other providers are available.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210517172930.83353-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Andy Shevchenko and committed by
Greg Kroah-Hartman
d4d6f03c 18ee37e1

+26 -14
+26 -14
drivers/tty/serial/max310x.c
··· 552 552 return 1; 553 553 } 554 554 555 - static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s, 555 + static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s, 556 556 unsigned long freq, bool xtal) 557 557 { 558 558 unsigned int div, clksrc, pllcfg = 0; ··· 618 618 } 619 619 } 620 620 621 - return (int)bestfreq; 621 + return bestfreq; 622 622 } 623 623 624 624 static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len) ··· 1253 1253 static int max310x_probe(struct device *dev, const struct max310x_devtype *devtype, 1254 1254 struct regmap *regmap, int irq) 1255 1255 { 1256 - int i, ret, fmin, fmax, freq, uartclk; 1256 + int i, ret, fmin, fmax, freq; 1257 1257 struct max310x_port *s; 1258 - bool xtal = false; 1258 + u32 uartclk = 0; 1259 + bool xtal; 1259 1260 1260 1261 if (IS_ERR(regmap)) 1261 1262 return PTR_ERR(regmap); ··· 1268 1267 return -ENOMEM; 1269 1268 } 1270 1269 1270 + /* Always ask for fixed clock rate from a property. */ 1271 + device_property_read_u32(dev, "clock-frequency", &uartclk); 1272 + 1271 1273 s->clk = devm_clk_get_optional(dev, "osc"); 1272 1274 if (IS_ERR(s->clk)) 1273 1275 return PTR_ERR(s->clk); 1274 1276 if (s->clk) { 1275 - fmin = 500000; 1276 - fmax = 35000000; 1277 + xtal = false; 1277 1278 } else { 1278 1279 s->clk = devm_clk_get_optional(dev, "xtal"); 1279 1280 if (IS_ERR(s->clk)) 1280 1281 return PTR_ERR(s->clk); 1281 - if (s->clk) { 1282 - fmin = 1000000; 1283 - fmax = 4000000; 1284 - xtal = true; 1285 - } else { 1286 - dev_err(dev, "Cannot get clock\n"); 1287 - return -EINVAL; 1288 - } 1282 + 1283 + xtal = true; 1289 1284 } 1290 1285 1291 1286 ret = clk_prepare_enable(s->clk); ··· 1289 1292 return ret; 1290 1293 1291 1294 freq = clk_get_rate(s->clk); 1295 + if (freq == 0) 1296 + freq = uartclk; 1297 + if (freq == 0) { 1298 + dev_err(dev, "Cannot get clock rate\n"); 1299 + return -EINVAL; 1300 + } 1301 + 1302 + if (xtal) { 1303 + fmin = 1000000; 1304 + fmax = 4000000; 1305 + } else { 1306 + fmin = 500000; 1307 + fmax = 35000000; 1308 + } 1309 + 1292 1310 /* Check frequency limits */ 1293 1311 if (freq < fmin || freq > fmax) { 1294 1312 ret = -ERANGE;