Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915: add ibx_irq_postinstall

So we can remove duplicated code. Note that this function is used not
only on IBX, but also CPT and LPT.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Also bikeshed s/ironlake_enable_pch_hotplug/ibx_enable_hotplug
to keep consistent with our ibx for pch naming scheme.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

authored by

Paulo Zanoni and committed by
Daniel Vetter
d46da437 2c6602df

+25 -43
+25 -43
drivers/gpu/drm/i915/i915_irq.c
··· 1924 1924 * This register is the same on all known PCH chips. 1925 1925 */ 1926 1926 1927 - static void ironlake_enable_pch_hotplug(struct drm_device *dev) 1927 + static void ibx_enable_hotplug(struct drm_device *dev) 1928 1928 { 1929 1929 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1930 1930 u32 hotplug; ··· 1937 1937 I915_WRITE(PCH_PORT_HOTPLUG, hotplug); 1938 1938 } 1939 1939 1940 + static void ibx_irq_postinstall(struct drm_device *dev) 1941 + { 1942 + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1943 + u32 mask; 1944 + 1945 + if (HAS_PCH_IBX(dev)) 1946 + mask = SDE_HOTPLUG_MASK | 1947 + SDE_GMBUS | 1948 + SDE_AUX_MASK; 1949 + else 1950 + mask = SDE_HOTPLUG_MASK_CPT | 1951 + SDE_GMBUS_CPT | 1952 + SDE_AUX_MASK_CPT; 1953 + 1954 + I915_WRITE(SDEIIR, I915_READ(SDEIIR)); 1955 + I915_WRITE(SDEIMR, ~mask); 1956 + I915_WRITE(SDEIER, mask); 1957 + POSTING_READ(SDEIER); 1958 + 1959 + ibx_enable_hotplug(dev); 1960 + } 1961 + 1940 1962 static int ironlake_irq_postinstall(struct drm_device *dev) 1941 1963 { 1942 1964 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; ··· 1967 1945 DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE | 1968 1946 DE_AUX_CHANNEL_A; 1969 1947 u32 render_irqs; 1970 - u32 hotplug_mask; 1971 - u32 pch_irq_mask; 1972 1948 1973 1949 dev_priv->irq_mask = ~display_mask; 1974 1950 ··· 1994 1974 I915_WRITE(GTIER, render_irqs); 1995 1975 POSTING_READ(GTIER); 1996 1976 1997 - if (HAS_PCH_CPT(dev)) { 1998 - hotplug_mask = (SDE_CRT_HOTPLUG_CPT | 1999 - SDE_PORTB_HOTPLUG_CPT | 2000 - SDE_PORTC_HOTPLUG_CPT | 2001 - SDE_PORTD_HOTPLUG_CPT | 2002 - SDE_GMBUS_CPT | 2003 - SDE_AUX_MASK_CPT); 2004 - } else { 2005 - hotplug_mask = (SDE_CRT_HOTPLUG | 2006 - SDE_PORTB_HOTPLUG | 2007 - SDE_PORTC_HOTPLUG | 2008 - SDE_PORTD_HOTPLUG | 2009 - SDE_GMBUS | 2010 - SDE_AUX_MASK); 2011 - } 2012 - 2013 - pch_irq_mask = ~hotplug_mask; 2014 - 2015 - I915_WRITE(SDEIIR, I915_READ(SDEIIR)); 2016 - I915_WRITE(SDEIMR, pch_irq_mask); 2017 - I915_WRITE(SDEIER, hotplug_mask); 2018 - POSTING_READ(SDEIER); 2019 - 2020 - ironlake_enable_pch_hotplug(dev); 1977 + ibx_irq_postinstall(dev); 2021 1978 2022 1979 if (IS_IRONLAKE_M(dev)) { 2023 1980 /* Clear & enable PCU event interrupts */ ··· 2017 2020 DE_PLANEA_FLIP_DONE_IVB | 2018 2021 DE_AUX_CHANNEL_A_IVB; 2019 2022 u32 render_irqs; 2020 - u32 hotplug_mask; 2021 - u32 pch_irq_mask; 2022 2023 2023 2024 dev_priv->irq_mask = ~display_mask; 2024 2025 ··· 2040 2045 I915_WRITE(GTIER, render_irqs); 2041 2046 POSTING_READ(GTIER); 2042 2047 2043 - hotplug_mask = (SDE_CRT_HOTPLUG_CPT | 2044 - SDE_PORTB_HOTPLUG_CPT | 2045 - SDE_PORTC_HOTPLUG_CPT | 2046 - SDE_PORTD_HOTPLUG_CPT | 2047 - SDE_GMBUS_CPT | 2048 - SDE_AUX_MASK_CPT); 2049 - pch_irq_mask = ~hotplug_mask; 2050 - 2051 - I915_WRITE(SDEIIR, I915_READ(SDEIIR)); 2052 - I915_WRITE(SDEIMR, pch_irq_mask); 2053 - I915_WRITE(SDEIER, hotplug_mask); 2054 - POSTING_READ(SDEIER); 2055 - 2056 - ironlake_enable_pch_hotplug(dev); 2048 + ibx_irq_postinstall(dev); 2057 2049 2058 2050 return 0; 2059 2051 }