Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

crypto: cavium/zip - Remove driver

Remove cavium/zip as it is obsolete and stands in the way of
acomp API work. If this is ever resurrected, please turn it
into an acomp driver.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

-3690
-7
drivers/crypto/Kconfig
··· 530 530 source "drivers/crypto/marvell/Kconfig" 531 531 source "drivers/crypto/intel/Kconfig" 532 532 533 - config CRYPTO_DEV_CAVIUM_ZIP 534 - tristate "Cavium ZIP driver" 535 - depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 536 - help 537 - Select this option if you want to enable compression/decompression 538 - acceleration on Cavium's ARM based SoCs 539 - 540 533 config CRYPTO_DEV_QCE 541 534 tristate "Qualcomm crypto engine accelerator" 542 535 depends on ARCH_QCOM || COMPILE_TEST
-1
drivers/crypto/cavium/Makefile
··· 4 4 # 5 5 obj-$(CONFIG_CRYPTO_DEV_CPT) += cpt/ 6 6 obj-$(CONFIG_CRYPTO_DEV_NITROX) += nitrox/ 7 - obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += zip/
-12
drivers/crypto/cavium/zip/Makefile
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - # 3 - # Makefile for Cavium's ZIP Driver. 4 - # 5 - 6 - obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += thunderx_zip.o 7 - thunderx_zip-y := zip_main.o \ 8 - zip_device.o \ 9 - zip_crypto.o \ 10 - zip_mem.o \ 11 - zip_deflate.o \ 12 - zip_inflate.o
-222
drivers/crypto/cavium/zip/common.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __COMMON_H__ 47 - #define __COMMON_H__ 48 - 49 - #include <linux/delay.h> 50 - #include <linux/init.h> 51 - #include <linux/interrupt.h> 52 - #include <linux/io.h> 53 - #include <linux/kernel.h> 54 - #include <linux/module.h> 55 - #include <linux/pci.h> 56 - #include <linux/seq_file.h> 57 - #include <linux/string.h> 58 - #include <linux/types.h> 59 - 60 - /* Device specific zlib function definitions */ 61 - #include "zip_device.h" 62 - 63 - /* ZIP device definitions */ 64 - #include "zip_main.h" 65 - 66 - /* ZIP memory allocation/deallocation related definitions */ 67 - #include "zip_mem.h" 68 - 69 - /* Device specific structure definitions */ 70 - #include "zip_regs.h" 71 - 72 - #define ZIP_ERROR -1 73 - 74 - #define ZIP_FLUSH_FINISH 4 75 - 76 - #define RAW_FORMAT 0 /* for rawpipe */ 77 - #define ZLIB_FORMAT 1 /* for zpipe */ 78 - #define GZIP_FORMAT 2 /* for gzpipe */ 79 - #define LZS_FORMAT 3 /* for lzspipe */ 80 - 81 - /* Max number of ZIP devices supported */ 82 - #define MAX_ZIP_DEVICES 2 83 - 84 - /* Configures the number of zip queues to be used */ 85 - #define ZIP_NUM_QUEUES 2 86 - 87 - #define DYNAMIC_STOP_EXCESS 1024 88 - 89 - /* Maximum buffer sizes in direct mode */ 90 - #define MAX_INPUT_BUFFER_SIZE (64 * 1024) 91 - #define MAX_OUTPUT_BUFFER_SIZE (64 * 1024) 92 - 93 - /** 94 - * struct zip_operation - common data structure for comp and decomp operations 95 - * @input: Next input byte is read from here 96 - * @output: Next output byte written here 97 - * @ctx_addr: Inflate context buffer address 98 - * @history: Pointer to the history buffer 99 - * @input_len: Number of bytes available at next_in 100 - * @input_total_len: Total number of input bytes read 101 - * @output_len: Remaining free space at next_out 102 - * @output_total_len: Total number of bytes output so far 103 - * @csum: Checksum value of the uncompressed data 104 - * @flush: Flush flag 105 - * @format: Format (depends on stream's wrap) 106 - * @speed: Speed depends on stream's level 107 - * @ccode: Compression code ( stream's strategy) 108 - * @lzs_flag: Flag for LZS support 109 - * @begin_file: Beginning of file indication for inflate 110 - * @history_len: Size of the history data 111 - * @end_file: Ending of the file indication for inflate 112 - * @compcode: Completion status of the ZIP invocation 113 - * @bytes_read: Input bytes read in current instruction 114 - * @bits_processed: Total bits processed for entire file 115 - * @sizeofptr: To distinguish between ILP32 and LP64 116 - * @sizeofzops: Optional just for padding 117 - * 118 - * This structure is used to maintain the required meta data for the 119 - * comp and decomp operations. 120 - */ 121 - struct zip_operation { 122 - u8 *input; 123 - u8 *output; 124 - u64 ctx_addr; 125 - u64 history; 126 - 127 - u32 input_len; 128 - u32 input_total_len; 129 - 130 - u32 output_len; 131 - u32 output_total_len; 132 - 133 - u32 csum; 134 - u32 flush; 135 - 136 - u32 format; 137 - u32 speed; 138 - u32 ccode; 139 - u32 lzs_flag; 140 - 141 - u32 begin_file; 142 - u32 history_len; 143 - 144 - u32 end_file; 145 - u32 compcode; 146 - u32 bytes_read; 147 - u32 bits_processed; 148 - 149 - u32 sizeofptr; 150 - u32 sizeofzops; 151 - }; 152 - 153 - static inline int zip_poll_result(union zip_zres_s *result) 154 - { 155 - int retries = 1000; 156 - 157 - while (!result->s.compcode) { 158 - if (!--retries) { 159 - pr_err("ZIP ERR: request timed out"); 160 - return -ETIMEDOUT; 161 - } 162 - udelay(10); 163 - /* 164 - * Force re-reading of compcode which is updated 165 - * by the ZIP coprocessor. 166 - */ 167 - rmb(); 168 - } 169 - return 0; 170 - } 171 - 172 - /* error messages */ 173 - #define zip_err(fmt, args...) pr_err("ZIP ERR:%s():%d: " \ 174 - fmt "\n", __func__, __LINE__, ## args) 175 - 176 - #ifdef MSG_ENABLE 177 - /* Enable all messages */ 178 - #define zip_msg(fmt, args...) pr_info("ZIP_MSG:" fmt "\n", ## args) 179 - #else 180 - #define zip_msg(fmt, args...) 181 - #endif 182 - 183 - #if defined(ZIP_DEBUG_ENABLE) && defined(MSG_ENABLE) 184 - 185 - #ifdef DEBUG_LEVEL 186 - 187 - #define FILE_NAME (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : \ 188 - strrchr(__FILE__, '\\') ? strrchr(__FILE__, '\\') + 1 : __FILE__) 189 - 190 - #if DEBUG_LEVEL >= 4 191 - 192 - #define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s: %s() : %d: " \ 193 - fmt "\n", FILE_NAME, __func__, __LINE__, ## args) 194 - 195 - #elif DEBUG_LEVEL >= 3 196 - 197 - #define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s: %s() : %d: " \ 198 - fmt "\n", FILE_NAME, __func__, __LINE__, ## args) 199 - 200 - #elif DEBUG_LEVEL >= 2 201 - 202 - #define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s() : %d: " \ 203 - fmt "\n", __func__, __LINE__, ## args) 204 - 205 - #else 206 - 207 - #define zip_dbg(fmt, args...) pr_info("ZIP DBG:" fmt "\n", ## args) 208 - 209 - #endif /* DEBUG LEVEL >=4 */ 210 - 211 - #else 212 - 213 - #define zip_dbg(fmt, args...) pr_info("ZIP DBG:" fmt "\n", ## args) 214 - 215 - #endif /* DEBUG_LEVEL */ 216 - #else 217 - 218 - #define zip_dbg(fmt, args...) 219 - 220 - #endif /* ZIP_DEBUG_ENABLE && MSG_ENABLE*/ 221 - 222 - #endif
-261
drivers/crypto/cavium/zip/zip_crypto.c
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #include "zip_crypto.h" 47 - 48 - static void zip_static_init_zip_ops(struct zip_operation *zip_ops, 49 - int lzs_flag) 50 - { 51 - zip_ops->flush = ZIP_FLUSH_FINISH; 52 - 53 - /* equivalent to level 6 of opensource zlib */ 54 - zip_ops->speed = 1; 55 - 56 - if (!lzs_flag) { 57 - zip_ops->ccode = 0; /* Auto Huffman */ 58 - zip_ops->lzs_flag = 0; 59 - zip_ops->format = ZLIB_FORMAT; 60 - } else { 61 - zip_ops->ccode = 3; /* LZS Encoding */ 62 - zip_ops->lzs_flag = 1; 63 - zip_ops->format = LZS_FORMAT; 64 - } 65 - zip_ops->begin_file = 1; 66 - zip_ops->history_len = 0; 67 - zip_ops->end_file = 1; 68 - zip_ops->compcode = 0; 69 - zip_ops->csum = 1; /* Adler checksum desired */ 70 - } 71 - 72 - static int zip_ctx_init(struct zip_kernel_ctx *zip_ctx, int lzs_flag) 73 - { 74 - struct zip_operation *comp_ctx = &zip_ctx->zip_comp; 75 - struct zip_operation *decomp_ctx = &zip_ctx->zip_decomp; 76 - 77 - zip_static_init_zip_ops(comp_ctx, lzs_flag); 78 - zip_static_init_zip_ops(decomp_ctx, lzs_flag); 79 - 80 - comp_ctx->input = zip_data_buf_alloc(MAX_INPUT_BUFFER_SIZE); 81 - if (!comp_ctx->input) 82 - return -ENOMEM; 83 - 84 - comp_ctx->output = zip_data_buf_alloc(MAX_OUTPUT_BUFFER_SIZE); 85 - if (!comp_ctx->output) 86 - goto err_comp_input; 87 - 88 - decomp_ctx->input = zip_data_buf_alloc(MAX_INPUT_BUFFER_SIZE); 89 - if (!decomp_ctx->input) 90 - goto err_comp_output; 91 - 92 - decomp_ctx->output = zip_data_buf_alloc(MAX_OUTPUT_BUFFER_SIZE); 93 - if (!decomp_ctx->output) 94 - goto err_decomp_input; 95 - 96 - return 0; 97 - 98 - err_decomp_input: 99 - zip_data_buf_free(decomp_ctx->input, MAX_INPUT_BUFFER_SIZE); 100 - 101 - err_comp_output: 102 - zip_data_buf_free(comp_ctx->output, MAX_OUTPUT_BUFFER_SIZE); 103 - 104 - err_comp_input: 105 - zip_data_buf_free(comp_ctx->input, MAX_INPUT_BUFFER_SIZE); 106 - 107 - return -ENOMEM; 108 - } 109 - 110 - static void zip_ctx_exit(struct zip_kernel_ctx *zip_ctx) 111 - { 112 - struct zip_operation *comp_ctx = &zip_ctx->zip_comp; 113 - struct zip_operation *dec_ctx = &zip_ctx->zip_decomp; 114 - 115 - zip_data_buf_free(comp_ctx->input, MAX_INPUT_BUFFER_SIZE); 116 - zip_data_buf_free(comp_ctx->output, MAX_OUTPUT_BUFFER_SIZE); 117 - 118 - zip_data_buf_free(dec_ctx->input, MAX_INPUT_BUFFER_SIZE); 119 - zip_data_buf_free(dec_ctx->output, MAX_OUTPUT_BUFFER_SIZE); 120 - } 121 - 122 - static int zip_compress(const u8 *src, unsigned int slen, 123 - u8 *dst, unsigned int *dlen, 124 - struct zip_kernel_ctx *zip_ctx) 125 - { 126 - struct zip_operation *zip_ops = NULL; 127 - struct zip_state *zip_state; 128 - struct zip_device *zip = NULL; 129 - int ret; 130 - 131 - if (!zip_ctx || !src || !dst || !dlen) 132 - return -ENOMEM; 133 - 134 - zip = zip_get_device(zip_get_node_id()); 135 - if (!zip) 136 - return -ENODEV; 137 - 138 - zip_state = kzalloc(sizeof(*zip_state), GFP_ATOMIC); 139 - if (!zip_state) 140 - return -ENOMEM; 141 - 142 - zip_ops = &zip_ctx->zip_comp; 143 - 144 - zip_ops->input_len = slen; 145 - zip_ops->output_len = *dlen; 146 - memcpy(zip_ops->input, src, slen); 147 - 148 - ret = zip_deflate(zip_ops, zip_state, zip); 149 - 150 - if (!ret) { 151 - *dlen = zip_ops->output_len; 152 - memcpy(dst, zip_ops->output, *dlen); 153 - } 154 - kfree(zip_state); 155 - return ret; 156 - } 157 - 158 - static int zip_decompress(const u8 *src, unsigned int slen, 159 - u8 *dst, unsigned int *dlen, 160 - struct zip_kernel_ctx *zip_ctx) 161 - { 162 - struct zip_operation *zip_ops = NULL; 163 - struct zip_state *zip_state; 164 - struct zip_device *zip = NULL; 165 - int ret; 166 - 167 - if (!zip_ctx || !src || !dst || !dlen) 168 - return -ENOMEM; 169 - 170 - zip = zip_get_device(zip_get_node_id()); 171 - if (!zip) 172 - return -ENODEV; 173 - 174 - zip_state = kzalloc(sizeof(*zip_state), GFP_ATOMIC); 175 - if (!zip_state) 176 - return -ENOMEM; 177 - 178 - zip_ops = &zip_ctx->zip_decomp; 179 - memcpy(zip_ops->input, src, slen); 180 - 181 - /* Work around for a bug in zlib which needs an extra bytes sometimes */ 182 - if (zip_ops->ccode != 3) /* Not LZS Encoding */ 183 - zip_ops->input[slen++] = 0; 184 - 185 - zip_ops->input_len = slen; 186 - zip_ops->output_len = *dlen; 187 - 188 - ret = zip_inflate(zip_ops, zip_state, zip); 189 - 190 - if (!ret) { 191 - *dlen = zip_ops->output_len; 192 - memcpy(dst, zip_ops->output, *dlen); 193 - } 194 - kfree(zip_state); 195 - return ret; 196 - } 197 - 198 - /* SCOMP framework start */ 199 - void *zip_alloc_scomp_ctx_deflate(void) 200 - { 201 - int ret; 202 - struct zip_kernel_ctx *zip_ctx; 203 - 204 - zip_ctx = kzalloc(sizeof(*zip_ctx), GFP_KERNEL); 205 - if (!zip_ctx) 206 - return ERR_PTR(-ENOMEM); 207 - 208 - ret = zip_ctx_init(zip_ctx, 0); 209 - 210 - if (ret) { 211 - kfree_sensitive(zip_ctx); 212 - return ERR_PTR(ret); 213 - } 214 - 215 - return zip_ctx; 216 - } 217 - 218 - void *zip_alloc_scomp_ctx_lzs(void) 219 - { 220 - int ret; 221 - struct zip_kernel_ctx *zip_ctx; 222 - 223 - zip_ctx = kzalloc(sizeof(*zip_ctx), GFP_KERNEL); 224 - if (!zip_ctx) 225 - return ERR_PTR(-ENOMEM); 226 - 227 - ret = zip_ctx_init(zip_ctx, 1); 228 - 229 - if (ret) { 230 - kfree_sensitive(zip_ctx); 231 - return ERR_PTR(ret); 232 - } 233 - 234 - return zip_ctx; 235 - } 236 - 237 - void zip_free_scomp_ctx(void *ctx) 238 - { 239 - struct zip_kernel_ctx *zip_ctx = ctx; 240 - 241 - zip_ctx_exit(zip_ctx); 242 - kfree_sensitive(zip_ctx); 243 - } 244 - 245 - int zip_scomp_compress(struct crypto_scomp *tfm, 246 - const u8 *src, unsigned int slen, 247 - u8 *dst, unsigned int *dlen, void *ctx) 248 - { 249 - struct zip_kernel_ctx *zip_ctx = ctx; 250 - 251 - return zip_compress(src, slen, dst, dlen, zip_ctx); 252 - } 253 - 254 - int zip_scomp_decompress(struct crypto_scomp *tfm, 255 - const u8 *src, unsigned int slen, 256 - u8 *dst, unsigned int *dlen, void *ctx) 257 - { 258 - struct zip_kernel_ctx *zip_ctx = ctx; 259 - 260 - return zip_decompress(src, slen, dst, dlen, zip_ctx); 261 - } /* SCOMP framework end */
-68
drivers/crypto/cavium/zip/zip_crypto.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __ZIP_CRYPTO_H__ 47 - #define __ZIP_CRYPTO_H__ 48 - 49 - #include <crypto/internal/scompress.h> 50 - #include "common.h" 51 - #include "zip_deflate.h" 52 - #include "zip_inflate.h" 53 - 54 - struct zip_kernel_ctx { 55 - struct zip_operation zip_comp; 56 - struct zip_operation zip_decomp; 57 - }; 58 - 59 - void *zip_alloc_scomp_ctx_deflate(void); 60 - void *zip_alloc_scomp_ctx_lzs(void); 61 - void zip_free_scomp_ctx(void *zip_ctx); 62 - int zip_scomp_compress(struct crypto_scomp *tfm, 63 - const u8 *src, unsigned int slen, 64 - u8 *dst, unsigned int *dlen, void *ctx); 65 - int zip_scomp_decompress(struct crypto_scomp *tfm, 66 - const u8 *src, unsigned int slen, 67 - u8 *dst, unsigned int *dlen, void *ctx); 68 - #endif
-200
drivers/crypto/cavium/zip/zip_deflate.c
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #include <linux/delay.h> 47 - #include <linux/sched.h> 48 - 49 - #include "common.h" 50 - #include "zip_deflate.h" 51 - 52 - /* Prepares the deflate zip command */ 53 - static int prepare_zip_command(struct zip_operation *zip_ops, 54 - struct zip_state *s, union zip_inst_s *zip_cmd) 55 - { 56 - union zip_zres_s *result_ptr = &s->result; 57 - 58 - memset(zip_cmd, 0, sizeof(s->zip_cmd)); 59 - memset(result_ptr, 0, sizeof(s->result)); 60 - 61 - /* IWORD #0 */ 62 - /* History gather */ 63 - zip_cmd->s.hg = 0; 64 - /* compression enable = 1 for deflate */ 65 - zip_cmd->s.ce = 1; 66 - /* sf (sync flush) */ 67 - zip_cmd->s.sf = 1; 68 - /* ef (end of file) */ 69 - if (zip_ops->flush == ZIP_FLUSH_FINISH) { 70 - zip_cmd->s.ef = 1; 71 - zip_cmd->s.sf = 0; 72 - } 73 - 74 - zip_cmd->s.cc = zip_ops->ccode; 75 - /* ss (compression speed/storage) */ 76 - zip_cmd->s.ss = zip_ops->speed; 77 - 78 - /* IWORD #1 */ 79 - /* adler checksum */ 80 - zip_cmd->s.adlercrc32 = zip_ops->csum; 81 - zip_cmd->s.historylength = zip_ops->history_len; 82 - zip_cmd->s.dg = 0; 83 - 84 - /* IWORD # 6 and 7 - compression input/history pointer */ 85 - zip_cmd->s.inp_ptr_addr.s.addr = __pa(zip_ops->input); 86 - zip_cmd->s.inp_ptr_ctl.s.length = (zip_ops->input_len + 87 - zip_ops->history_len); 88 - zip_cmd->s.ds = 0; 89 - 90 - /* IWORD # 8 and 9 - Output pointer */ 91 - zip_cmd->s.out_ptr_addr.s.addr = __pa(zip_ops->output); 92 - zip_cmd->s.out_ptr_ctl.s.length = zip_ops->output_len; 93 - /* maximum number of output-stream bytes that can be written */ 94 - zip_cmd->s.totaloutputlength = zip_ops->output_len; 95 - 96 - /* IWORD # 10 and 11 - Result pointer */ 97 - zip_cmd->s.res_ptr_addr.s.addr = __pa(result_ptr); 98 - /* Clearing completion code */ 99 - result_ptr->s.compcode = 0; 100 - 101 - return 0; 102 - } 103 - 104 - /** 105 - * zip_deflate - API to offload deflate operation to hardware 106 - * @zip_ops: Pointer to zip operation structure 107 - * @s: Pointer to the structure representing zip state 108 - * @zip_dev: Pointer to zip device structure 109 - * 110 - * This function prepares the zip deflate command and submits it to the zip 111 - * engine for processing. 112 - * 113 - * Return: 0 if successful or error code 114 - */ 115 - int zip_deflate(struct zip_operation *zip_ops, struct zip_state *s, 116 - struct zip_device *zip_dev) 117 - { 118 - union zip_inst_s *zip_cmd = &s->zip_cmd; 119 - union zip_zres_s *result_ptr = &s->result; 120 - u32 queue; 121 - 122 - /* Prepares zip command based on the input parameters */ 123 - prepare_zip_command(zip_ops, s, zip_cmd); 124 - 125 - atomic64_add(zip_ops->input_len, &zip_dev->stats.comp_in_bytes); 126 - /* Loads zip command into command queues and rings door bell */ 127 - queue = zip_load_instr(zip_cmd, zip_dev); 128 - 129 - /* Stats update for compression requests submitted */ 130 - atomic64_inc(&zip_dev->stats.comp_req_submit); 131 - 132 - /* Wait for completion or error */ 133 - zip_poll_result(result_ptr); 134 - 135 - /* Stats update for compression requests completed */ 136 - atomic64_inc(&zip_dev->stats.comp_req_complete); 137 - 138 - zip_ops->compcode = result_ptr->s.compcode; 139 - switch (zip_ops->compcode) { 140 - case ZIP_CMD_NOTDONE: 141 - zip_dbg("Zip instruction not yet completed"); 142 - return ZIP_ERROR; 143 - 144 - case ZIP_CMD_SUCCESS: 145 - zip_dbg("Zip instruction completed successfully"); 146 - zip_update_cmd_bufs(zip_dev, queue); 147 - break; 148 - 149 - case ZIP_CMD_DTRUNC: 150 - zip_dbg("Output Truncate error"); 151 - /* Returning ZIP_ERROR to avoid copy to user */ 152 - return ZIP_ERROR; 153 - 154 - default: 155 - zip_err("Zip instruction failed. Code:%d", zip_ops->compcode); 156 - return ZIP_ERROR; 157 - } 158 - 159 - /* Update the CRC depending on the format */ 160 - switch (zip_ops->format) { 161 - case RAW_FORMAT: 162 - zip_dbg("RAW Format: %d ", zip_ops->format); 163 - /* Get checksum from engine, need to feed it again */ 164 - zip_ops->csum = result_ptr->s.adler32; 165 - break; 166 - 167 - case ZLIB_FORMAT: 168 - zip_dbg("ZLIB Format: %d ", zip_ops->format); 169 - zip_ops->csum = result_ptr->s.adler32; 170 - break; 171 - 172 - case GZIP_FORMAT: 173 - zip_dbg("GZIP Format: %d ", zip_ops->format); 174 - zip_ops->csum = result_ptr->s.crc32; 175 - break; 176 - 177 - case LZS_FORMAT: 178 - zip_dbg("LZS Format: %d ", zip_ops->format); 179 - break; 180 - 181 - default: 182 - zip_err("Unknown Format:%d\n", zip_ops->format); 183 - } 184 - 185 - atomic64_add(result_ptr->s.totalbyteswritten, 186 - &zip_dev->stats.comp_out_bytes); 187 - 188 - /* Update output_len */ 189 - if (zip_ops->output_len < result_ptr->s.totalbyteswritten) { 190 - /* Dynamic stop && strm->output_len < zipconstants[onfsize] */ 191 - zip_err("output_len (%d) < total bytes written(%d)\n", 192 - zip_ops->output_len, result_ptr->s.totalbyteswritten); 193 - zip_ops->output_len = 0; 194 - 195 - } else { 196 - zip_ops->output_len = result_ptr->s.totalbyteswritten; 197 - } 198 - 199 - return 0; 200 - }
-62
drivers/crypto/cavium/zip/zip_deflate.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __ZIP_DEFLATE_H__ 47 - #define __ZIP_DEFLATE_H__ 48 - 49 - /** 50 - * zip_deflate - API to offload deflate operation to hardware 51 - * @zip_ops: Pointer to zip operation structure 52 - * @s: Pointer to the structure representing zip state 53 - * @zip_dev: Pointer to the structure representing zip device 54 - * 55 - * This function prepares the zip deflate command and submits it to the zip 56 - * engine by ringing the doorbell. 57 - * 58 - * Return: 0 if successful or error code 59 - */ 60 - int zip_deflate(struct zip_operation *zip_ops, struct zip_state *s, 61 - struct zip_device *zip_dev); 62 - #endif
-202
drivers/crypto/cavium/zip/zip_device.c
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #include "common.h" 47 - #include "zip_deflate.h" 48 - 49 - /** 50 - * zip_cmd_queue_consumed - Calculates the space consumed in the command queue. 51 - * 52 - * @zip_dev: Pointer to zip device structure 53 - * @queue: Queue number 54 - * 55 - * Return: Bytes consumed in the command queue buffer. 56 - */ 57 - static inline u32 zip_cmd_queue_consumed(struct zip_device *zip_dev, int queue) 58 - { 59 - return ((zip_dev->iq[queue].sw_head - zip_dev->iq[queue].sw_tail) * 60 - sizeof(u64 *)); 61 - } 62 - 63 - /** 64 - * zip_load_instr - Submits the instruction into the ZIP command queue 65 - * @instr: Pointer to the instruction to be submitted 66 - * @zip_dev: Pointer to ZIP device structure to which the instruction is to 67 - * be submitted 68 - * 69 - * This function copies the ZIP instruction to the command queue and rings the 70 - * doorbell to notify the engine of the instruction submission. The command 71 - * queue is maintained in a circular fashion. When there is space for exactly 72 - * one instruction in the queue, next chunk pointer of the queue is made to 73 - * point to the head of the queue, thus maintaining a circular queue. 74 - * 75 - * Return: Queue number to which the instruction was submitted 76 - */ 77 - u32 zip_load_instr(union zip_inst_s *instr, 78 - struct zip_device *zip_dev) 79 - { 80 - union zip_quex_doorbell dbell; 81 - u32 queue = 0; 82 - u32 consumed = 0; 83 - u64 *ncb_ptr = NULL; 84 - union zip_nptr_s ncp; 85 - 86 - /* 87 - * Distribute the instructions between the enabled queues based on 88 - * the CPU id. 89 - */ 90 - if (raw_smp_processor_id() % 2 == 0) 91 - queue = 0; 92 - else 93 - queue = 1; 94 - 95 - zip_dbg("CPU Core: %d Queue number:%d", raw_smp_processor_id(), queue); 96 - 97 - /* Take cmd buffer lock */ 98 - spin_lock(&zip_dev->iq[queue].lock); 99 - 100 - /* 101 - * Command Queue implementation 102 - * 1. If there is place for new instructions, push the cmd at sw_head. 103 - * 2. If there is place for exactly one instruction, push the new cmd 104 - * at the sw_head. Make sw_head point to the sw_tail to make it 105 - * circular. Write sw_head's physical address to the "Next-Chunk 106 - * Buffer Ptr" to make it cmd_hw_tail. 107 - * 3. Ring the door bell. 108 - */ 109 - zip_dbg("sw_head : %lx", zip_dev->iq[queue].sw_head); 110 - zip_dbg("sw_tail : %lx", zip_dev->iq[queue].sw_tail); 111 - 112 - consumed = zip_cmd_queue_consumed(zip_dev, queue); 113 - /* Check if there is space to push just one cmd */ 114 - if ((consumed + 128) == (ZIP_CMD_QBUF_SIZE - 8)) { 115 - zip_dbg("Cmd queue space available for single command"); 116 - /* Space for one cmd, pust it and make it circular queue */ 117 - memcpy((u8 *)zip_dev->iq[queue].sw_head, (u8 *)instr, 118 - sizeof(union zip_inst_s)); 119 - zip_dev->iq[queue].sw_head += 16; /* 16 64_bit words = 128B */ 120 - 121 - /* Now, point the "Next-Chunk Buffer Ptr" to sw_head */ 122 - ncb_ptr = zip_dev->iq[queue].sw_head; 123 - 124 - zip_dbg("ncb addr :0x%lx sw_head addr :0x%lx", 125 - ncb_ptr, zip_dev->iq[queue].sw_head - 16); 126 - 127 - /* Using Circular command queue */ 128 - zip_dev->iq[queue].sw_head = zip_dev->iq[queue].sw_tail; 129 - /* Mark this buffer for free */ 130 - zip_dev->iq[queue].free_flag = 1; 131 - 132 - /* Write new chunk buffer address at "Next-Chunk Buffer Ptr" */ 133 - ncp.u_reg64 = 0ull; 134 - ncp.s.addr = __pa(zip_dev->iq[queue].sw_head); 135 - *ncb_ptr = ncp.u_reg64; 136 - zip_dbg("*ncb_ptr :0x%lx sw_head[phys] :0x%lx", 137 - *ncb_ptr, __pa(zip_dev->iq[queue].sw_head)); 138 - 139 - zip_dev->iq[queue].pend_cnt++; 140 - 141 - } else { 142 - zip_dbg("Enough space is available for commands"); 143 - /* Push this cmd to cmd queue buffer */ 144 - memcpy((u8 *)zip_dev->iq[queue].sw_head, (u8 *)instr, 145 - sizeof(union zip_inst_s)); 146 - zip_dev->iq[queue].sw_head += 16; /* 16 64_bit words = 128B */ 147 - 148 - zip_dev->iq[queue].pend_cnt++; 149 - } 150 - zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx", 151 - zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail, 152 - zip_dev->iq[queue].hw_tail); 153 - 154 - zip_dbg(" Pushed the new cmd : pend_cnt : %d", 155 - zip_dev->iq[queue].pend_cnt); 156 - 157 - /* Ring the doorbell */ 158 - dbell.u_reg64 = 0ull; 159 - dbell.s.dbell_cnt = 1; 160 - zip_reg_write(dbell.u_reg64, 161 - (zip_dev->reg_base + ZIP_QUEX_DOORBELL(queue))); 162 - 163 - /* Unlock cmd buffer lock */ 164 - spin_unlock(&zip_dev->iq[queue].lock); 165 - 166 - return queue; 167 - } 168 - 169 - /** 170 - * zip_update_cmd_bufs - Updates the queue statistics after posting the 171 - * instruction 172 - * @zip_dev: Pointer to zip device structure 173 - * @queue: Queue number 174 - */ 175 - void zip_update_cmd_bufs(struct zip_device *zip_dev, u32 queue) 176 - { 177 - /* Take cmd buffer lock */ 178 - spin_lock(&zip_dev->iq[queue].lock); 179 - 180 - /* Check if the previous buffer can be freed */ 181 - if (zip_dev->iq[queue].free_flag == 1) { 182 - zip_dbg("Free flag. Free cmd buffer, adjust sw head and tail"); 183 - /* Reset the free flag */ 184 - zip_dev->iq[queue].free_flag = 0; 185 - 186 - /* Point the hw_tail to start of the new chunk buffer */ 187 - zip_dev->iq[queue].hw_tail = zip_dev->iq[queue].sw_head; 188 - } else { 189 - zip_dbg("Free flag not set. increment hw tail"); 190 - zip_dev->iq[queue].hw_tail += 16; /* 16 64_bit words = 128B */ 191 - } 192 - 193 - zip_dev->iq[queue].done_cnt++; 194 - zip_dev->iq[queue].pend_cnt--; 195 - 196 - zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx", 197 - zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail, 198 - zip_dev->iq[queue].hw_tail); 199 - zip_dbg(" Got CC : pend_cnt : %d\n", zip_dev->iq[queue].pend_cnt); 200 - 201 - spin_unlock(&zip_dev->iq[queue].lock); 202 - }
-108
drivers/crypto/cavium/zip/zip_device.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __ZIP_DEVICE_H__ 47 - #define __ZIP_DEVICE_H__ 48 - 49 - #include <linux/types.h> 50 - #include "zip_main.h" 51 - 52 - struct sg_info { 53 - /* 54 - * Pointer to the input data when scatter_gather == 0 and 55 - * pointer to the input gather list buffer when scatter_gather == 1 56 - */ 57 - union zip_zptr_s *gather; 58 - 59 - /* 60 - * Pointer to the output data when scatter_gather == 0 and 61 - * pointer to the output scatter list buffer when scatter_gather == 1 62 - */ 63 - union zip_zptr_s *scatter; 64 - 65 - /* 66 - * Holds size of the output buffer pointed by scatter list 67 - * when scatter_gather == 1 68 - */ 69 - u64 scatter_buf_size; 70 - 71 - /* for gather data */ 72 - u64 gather_enable; 73 - 74 - /* for scatter data */ 75 - u64 scatter_enable; 76 - 77 - /* Number of gather list pointers for gather data */ 78 - u32 gbuf_cnt; 79 - 80 - /* Number of scatter list pointers for scatter data */ 81 - u32 sbuf_cnt; 82 - 83 - /* Buffers allocation state */ 84 - u8 alloc_state; 85 - }; 86 - 87 - /** 88 - * struct zip_state - Structure representing the required information related 89 - * to a command 90 - * @zip_cmd: Pointer to zip instruction structure 91 - * @result: Pointer to zip result structure 92 - * @ctx: Context pointer for inflate 93 - * @history: Decompression history pointer 94 - * @sginfo: Scatter-gather info structure 95 - */ 96 - struct zip_state { 97 - union zip_inst_s zip_cmd; 98 - union zip_zres_s result; 99 - union zip_zptr_s *ctx; 100 - union zip_zptr_s *history; 101 - struct sg_info sginfo; 102 - }; 103 - 104 - #define ZIP_CONTEXT_SIZE 2048 105 - #define ZIP_INFLATE_HISTORY_SIZE 32768 106 - #define ZIP_DEFLATE_HISTORY_SIZE 32768 107 - 108 - #endif
-223
drivers/crypto/cavium/zip/zip_inflate.c
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #include <linux/delay.h> 47 - #include <linux/sched.h> 48 - 49 - #include "common.h" 50 - #include "zip_inflate.h" 51 - 52 - static int prepare_inflate_zcmd(struct zip_operation *zip_ops, 53 - struct zip_state *s, union zip_inst_s *zip_cmd) 54 - { 55 - union zip_zres_s *result_ptr = &s->result; 56 - 57 - memset(zip_cmd, 0, sizeof(s->zip_cmd)); 58 - memset(result_ptr, 0, sizeof(s->result)); 59 - 60 - /* IWORD#0 */ 61 - 62 - /* Decompression History Gather list - no gather list */ 63 - zip_cmd->s.hg = 0; 64 - /* For decompression, CE must be 0x0. */ 65 - zip_cmd->s.ce = 0; 66 - /* For decompression, SS must be 0x0. */ 67 - zip_cmd->s.ss = 0; 68 - /* For decompression, SF should always be set. */ 69 - zip_cmd->s.sf = 1; 70 - 71 - /* Begin File */ 72 - if (zip_ops->begin_file == 0) 73 - zip_cmd->s.bf = 0; 74 - else 75 - zip_cmd->s.bf = 1; 76 - 77 - zip_cmd->s.ef = 1; 78 - /* 0: for Deflate decompression, 3: for LZS decompression */ 79 - zip_cmd->s.cc = zip_ops->ccode; 80 - 81 - /* IWORD #1*/ 82 - 83 - /* adler checksum */ 84 - zip_cmd->s.adlercrc32 = zip_ops->csum; 85 - 86 - /* 87 - * HISTORYLENGTH must be 0x0 for any ZIP decompress operation. 88 - * History data is added to a decompression operation via IWORD3. 89 - */ 90 - zip_cmd->s.historylength = 0; 91 - zip_cmd->s.ds = 0; 92 - 93 - /* IWORD # 8 and 9 - Output pointer */ 94 - zip_cmd->s.out_ptr_addr.s.addr = __pa(zip_ops->output); 95 - zip_cmd->s.out_ptr_ctl.s.length = zip_ops->output_len; 96 - 97 - /* Maximum number of output-stream bytes that can be written */ 98 - zip_cmd->s.totaloutputlength = zip_ops->output_len; 99 - 100 - zip_dbg("Data Direct Input case "); 101 - 102 - /* IWORD # 6 and 7 - input pointer */ 103 - zip_cmd->s.dg = 0; 104 - zip_cmd->s.inp_ptr_addr.s.addr = __pa((u8 *)zip_ops->input); 105 - zip_cmd->s.inp_ptr_ctl.s.length = zip_ops->input_len; 106 - 107 - /* IWORD # 10 and 11 - Result pointer */ 108 - zip_cmd->s.res_ptr_addr.s.addr = __pa(result_ptr); 109 - 110 - /* Clearing completion code */ 111 - result_ptr->s.compcode = 0; 112 - 113 - /* Returning 0 for time being.*/ 114 - return 0; 115 - } 116 - 117 - /** 118 - * zip_inflate - API to offload inflate operation to hardware 119 - * @zip_ops: Pointer to zip operation structure 120 - * @s: Pointer to the structure representing zip state 121 - * @zip_dev: Pointer to zip device structure 122 - * 123 - * This function prepares the zip inflate command and submits it to the zip 124 - * engine for processing. 125 - * 126 - * Return: 0 if successful or error code 127 - */ 128 - int zip_inflate(struct zip_operation *zip_ops, struct zip_state *s, 129 - struct zip_device *zip_dev) 130 - { 131 - union zip_inst_s *zip_cmd = &s->zip_cmd; 132 - union zip_zres_s *result_ptr = &s->result; 133 - u32 queue; 134 - 135 - /* Prepare inflate zip command */ 136 - prepare_inflate_zcmd(zip_ops, s, zip_cmd); 137 - 138 - atomic64_add(zip_ops->input_len, &zip_dev->stats.decomp_in_bytes); 139 - 140 - /* Load inflate command to zip queue and ring the doorbell */ 141 - queue = zip_load_instr(zip_cmd, zip_dev); 142 - 143 - /* Decompression requests submitted stats update */ 144 - atomic64_inc(&zip_dev->stats.decomp_req_submit); 145 - 146 - /* Wait for completion or error */ 147 - zip_poll_result(result_ptr); 148 - 149 - /* Decompression requests completed stats update */ 150 - atomic64_inc(&zip_dev->stats.decomp_req_complete); 151 - 152 - zip_ops->compcode = result_ptr->s.compcode; 153 - switch (zip_ops->compcode) { 154 - case ZIP_CMD_NOTDONE: 155 - zip_dbg("Zip Instruction not yet completed\n"); 156 - return ZIP_ERROR; 157 - 158 - case ZIP_CMD_SUCCESS: 159 - zip_dbg("Zip Instruction completed successfully\n"); 160 - break; 161 - 162 - case ZIP_CMD_DYNAMIC_STOP: 163 - zip_dbg(" Dynamic stop Initiated\n"); 164 - break; 165 - 166 - default: 167 - zip_dbg("Instruction failed. Code = %d\n", zip_ops->compcode); 168 - atomic64_inc(&zip_dev->stats.decomp_bad_reqs); 169 - zip_update_cmd_bufs(zip_dev, queue); 170 - return ZIP_ERROR; 171 - } 172 - 173 - zip_update_cmd_bufs(zip_dev, queue); 174 - 175 - if ((zip_ops->ccode == 3) && (zip_ops->flush == 4) && 176 - (zip_ops->compcode != ZIP_CMD_DYNAMIC_STOP)) 177 - result_ptr->s.ef = 1; 178 - 179 - zip_ops->csum = result_ptr->s.adler32; 180 - 181 - atomic64_add(result_ptr->s.totalbyteswritten, 182 - &zip_dev->stats.decomp_out_bytes); 183 - 184 - if (zip_ops->output_len < result_ptr->s.totalbyteswritten) { 185 - zip_err("output_len (%d) < total bytes written (%d)\n", 186 - zip_ops->output_len, result_ptr->s.totalbyteswritten); 187 - zip_ops->output_len = 0; 188 - } else { 189 - zip_ops->output_len = result_ptr->s.totalbyteswritten; 190 - } 191 - 192 - zip_ops->bytes_read = result_ptr->s.totalbytesread; 193 - zip_ops->bits_processed = result_ptr->s.totalbitsprocessed; 194 - zip_ops->end_file = result_ptr->s.ef; 195 - if (zip_ops->end_file) { 196 - switch (zip_ops->format) { 197 - case RAW_FORMAT: 198 - zip_dbg("RAW Format: %d ", zip_ops->format); 199 - /* Get checksum from engine */ 200 - zip_ops->csum = result_ptr->s.adler32; 201 - break; 202 - 203 - case ZLIB_FORMAT: 204 - zip_dbg("ZLIB Format: %d ", zip_ops->format); 205 - zip_ops->csum = result_ptr->s.adler32; 206 - break; 207 - 208 - case GZIP_FORMAT: 209 - zip_dbg("GZIP Format: %d ", zip_ops->format); 210 - zip_ops->csum = result_ptr->s.crc32; 211 - break; 212 - 213 - case LZS_FORMAT: 214 - zip_dbg("LZS Format: %d ", zip_ops->format); 215 - break; 216 - 217 - default: 218 - zip_err("Format error:%d\n", zip_ops->format); 219 - } 220 - } 221 - 222 - return 0; 223 - }
-62
drivers/crypto/cavium/zip/zip_inflate.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __ZIP_INFLATE_H__ 47 - #define __ZIP_INFLATE_H__ 48 - 49 - /** 50 - * zip_inflate - API to offload inflate operation to hardware 51 - * @zip_ops: Pointer to zip operation structure 52 - * @s: Pointer to the structure representing zip state 53 - * @zip_dev: Pointer to the structure representing zip device 54 - * 55 - * This function prepares the zip inflate command and submits it to the zip 56 - * engine for processing. 57 - * 58 - * Return: 0 if successful or error code 59 - */ 60 - int zip_inflate(struct zip_operation *zip_ops, struct zip_state *s, 61 - struct zip_device *zip_dev); 62 - #endif
-603
drivers/crypto/cavium/zip/zip_main.c
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #include "common.h" 47 - #include "zip_crypto.h" 48 - 49 - #define DRV_NAME "ThunderX-ZIP" 50 - 51 - static struct zip_device *zip_dev[MAX_ZIP_DEVICES]; 52 - 53 - static const struct pci_device_id zip_id_table[] = { 54 - { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDERX_ZIP) }, 55 - { 0, } 56 - }; 57 - 58 - static void zip_debugfs_init(void); 59 - static void zip_debugfs_exit(void); 60 - static int zip_register_compression_device(void); 61 - static void zip_unregister_compression_device(void); 62 - 63 - void zip_reg_write(u64 val, u64 __iomem *addr) 64 - { 65 - writeq(val, addr); 66 - } 67 - 68 - u64 zip_reg_read(u64 __iomem *addr) 69 - { 70 - return readq(addr); 71 - } 72 - 73 - /* 74 - * Allocates new ZIP device structure 75 - * Returns zip_device pointer or NULL if cannot allocate memory for zip_device 76 - */ 77 - static struct zip_device *zip_alloc_device(struct pci_dev *pdev) 78 - { 79 - struct zip_device *zip = NULL; 80 - int idx; 81 - 82 - for (idx = 0; idx < MAX_ZIP_DEVICES; idx++) { 83 - if (!zip_dev[idx]) 84 - break; 85 - } 86 - 87 - /* To ensure that the index is within the limit */ 88 - if (idx < MAX_ZIP_DEVICES) 89 - zip = devm_kzalloc(&pdev->dev, sizeof(*zip), GFP_KERNEL); 90 - 91 - if (!zip) 92 - return NULL; 93 - 94 - zip_dev[idx] = zip; 95 - zip->index = idx; 96 - return zip; 97 - } 98 - 99 - /** 100 - * zip_get_device - Get ZIP device based on node id of cpu 101 - * 102 - * @node: Node id of the current cpu 103 - * Return: Pointer to Zip device structure 104 - */ 105 - struct zip_device *zip_get_device(int node) 106 - { 107 - if ((node < MAX_ZIP_DEVICES) && (node >= 0)) 108 - return zip_dev[node]; 109 - 110 - zip_err("ZIP device not found for node id %d\n", node); 111 - return NULL; 112 - } 113 - 114 - /** 115 - * zip_get_node_id - Get the node id of the current cpu 116 - * 117 - * Return: Node id of the current cpu 118 - */ 119 - int zip_get_node_id(void) 120 - { 121 - return cpu_to_node(raw_smp_processor_id()); 122 - } 123 - 124 - /* Initializes the ZIP h/w sub-system */ 125 - static int zip_init_hw(struct zip_device *zip) 126 - { 127 - union zip_cmd_ctl cmd_ctl; 128 - union zip_constants constants; 129 - union zip_que_ena que_ena; 130 - union zip_quex_map que_map; 131 - union zip_que_pri que_pri; 132 - 133 - union zip_quex_sbuf_addr que_sbuf_addr; 134 - union zip_quex_sbuf_ctl que_sbuf_ctl; 135 - 136 - int q = 0; 137 - 138 - /* Enable the ZIP Engine(Core) Clock */ 139 - cmd_ctl.u_reg64 = zip_reg_read(zip->reg_base + ZIP_CMD_CTL); 140 - cmd_ctl.s.forceclk = 1; 141 - zip_reg_write(cmd_ctl.u_reg64 & 0xFF, (zip->reg_base + ZIP_CMD_CTL)); 142 - 143 - zip_msg("ZIP_CMD_CTL : 0x%016llx", 144 - zip_reg_read(zip->reg_base + ZIP_CMD_CTL)); 145 - 146 - constants.u_reg64 = zip_reg_read(zip->reg_base + ZIP_CONSTANTS); 147 - zip->depth = constants.s.depth; 148 - zip->onfsize = constants.s.onfsize; 149 - zip->ctxsize = constants.s.ctxsize; 150 - 151 - zip_msg("depth: 0x%016llx , onfsize : 0x%016llx , ctxsize : 0x%016llx", 152 - zip->depth, zip->onfsize, zip->ctxsize); 153 - 154 - /* 155 - * Program ZIP_QUE(0..7)_SBUF_ADDR and ZIP_QUE(0..7)_SBUF_CTL to 156 - * have the correct buffer pointer and size configured for each 157 - * instruction queue. 158 - */ 159 - for (q = 0; q < ZIP_NUM_QUEUES; q++) { 160 - que_sbuf_ctl.u_reg64 = 0ull; 161 - que_sbuf_ctl.s.size = (ZIP_CMD_QBUF_SIZE / sizeof(u64)); 162 - que_sbuf_ctl.s.inst_be = 0; 163 - que_sbuf_ctl.s.stream_id = 0; 164 - zip_reg_write(que_sbuf_ctl.u_reg64, 165 - (zip->reg_base + ZIP_QUEX_SBUF_CTL(q))); 166 - 167 - zip_msg("QUEX_SBUF_CTL[%d]: 0x%016llx", q, 168 - zip_reg_read(zip->reg_base + ZIP_QUEX_SBUF_CTL(q))); 169 - } 170 - 171 - for (q = 0; q < ZIP_NUM_QUEUES; q++) { 172 - memset(&zip->iq[q], 0x0, sizeof(struct zip_iq)); 173 - 174 - spin_lock_init(&zip->iq[q].lock); 175 - 176 - if (zip_cmd_qbuf_alloc(zip, q)) { 177 - while (q != 0) { 178 - q--; 179 - zip_cmd_qbuf_free(zip, q); 180 - } 181 - return -ENOMEM; 182 - } 183 - 184 - /* Initialize tail ptr to head */ 185 - zip->iq[q].sw_tail = zip->iq[q].sw_head; 186 - zip->iq[q].hw_tail = zip->iq[q].sw_head; 187 - 188 - /* Write the physical addr to register */ 189 - que_sbuf_addr.u_reg64 = 0ull; 190 - que_sbuf_addr.s.ptr = (__pa(zip->iq[q].sw_head) >> 191 - ZIP_128B_ALIGN); 192 - 193 - zip_msg("QUE[%d]_PTR(PHYS): 0x%016llx", q, 194 - (u64)que_sbuf_addr.s.ptr); 195 - 196 - zip_reg_write(que_sbuf_addr.u_reg64, 197 - (zip->reg_base + ZIP_QUEX_SBUF_ADDR(q))); 198 - 199 - zip_msg("QUEX_SBUF_ADDR[%d]: 0x%016llx", q, 200 - zip_reg_read(zip->reg_base + ZIP_QUEX_SBUF_ADDR(q))); 201 - 202 - zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx", 203 - zip->iq[q].sw_head, zip->iq[q].sw_tail, 204 - zip->iq[q].hw_tail); 205 - zip_dbg("sw_head phy addr : 0x%lx", que_sbuf_addr.s.ptr); 206 - } 207 - 208 - /* 209 - * Queue-to-ZIP core mapping 210 - * If a queue is not mapped to a particular core, it is equivalent to 211 - * the ZIP core being disabled. 212 - */ 213 - que_ena.u_reg64 = 0x0ull; 214 - /* Enabling queues based on ZIP_NUM_QUEUES */ 215 - for (q = 0; q < ZIP_NUM_QUEUES; q++) 216 - que_ena.s.ena |= (0x1 << q); 217 - zip_reg_write(que_ena.u_reg64, (zip->reg_base + ZIP_QUE_ENA)); 218 - 219 - zip_msg("QUE_ENA : 0x%016llx", 220 - zip_reg_read(zip->reg_base + ZIP_QUE_ENA)); 221 - 222 - for (q = 0; q < ZIP_NUM_QUEUES; q++) { 223 - que_map.u_reg64 = 0ull; 224 - /* Mapping each queue to two ZIP cores */ 225 - que_map.s.zce = 0x3; 226 - zip_reg_write(que_map.u_reg64, 227 - (zip->reg_base + ZIP_QUEX_MAP(q))); 228 - 229 - zip_msg("QUE_MAP(%d) : 0x%016llx", q, 230 - zip_reg_read(zip->reg_base + ZIP_QUEX_MAP(q))); 231 - } 232 - 233 - que_pri.u_reg64 = 0ull; 234 - for (q = 0; q < ZIP_NUM_QUEUES; q++) 235 - que_pri.s.pri |= (0x1 << q); /* Higher Priority RR */ 236 - zip_reg_write(que_pri.u_reg64, (zip->reg_base + ZIP_QUE_PRI)); 237 - 238 - zip_msg("QUE_PRI %016llx", zip_reg_read(zip->reg_base + ZIP_QUE_PRI)); 239 - 240 - return 0; 241 - } 242 - 243 - static void zip_reset(struct zip_device *zip) 244 - { 245 - union zip_cmd_ctl cmd_ctl; 246 - 247 - cmd_ctl.u_reg64 = 0x0ull; 248 - cmd_ctl.s.reset = 1; /* Forces ZIP cores to do reset */ 249 - zip_reg_write(cmd_ctl.u_reg64, (zip->reg_base + ZIP_CMD_CTL)); 250 - } 251 - 252 - static int zip_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 253 - { 254 - struct device *dev = &pdev->dev; 255 - struct zip_device *zip = NULL; 256 - int err; 257 - 258 - zip = zip_alloc_device(pdev); 259 - if (!zip) 260 - return -ENOMEM; 261 - 262 - dev_info(dev, "Found ZIP device %d %x:%x on Node %d\n", zip->index, 263 - pdev->vendor, pdev->device, dev_to_node(dev)); 264 - 265 - pci_set_drvdata(pdev, zip); 266 - zip->pdev = pdev; 267 - 268 - err = pci_enable_device(pdev); 269 - if (err) { 270 - dev_err(dev, "Failed to enable PCI device"); 271 - goto err_free_device; 272 - } 273 - 274 - err = pci_request_regions(pdev, DRV_NAME); 275 - if (err) { 276 - dev_err(dev, "PCI request regions failed 0x%x", err); 277 - goto err_disable_device; 278 - } 279 - 280 - err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); 281 - if (err) { 282 - dev_err(dev, "Unable to get usable 48-bit DMA configuration\n"); 283 - goto err_release_regions; 284 - } 285 - 286 - /* MAP configuration registers */ 287 - zip->reg_base = pci_ioremap_bar(pdev, PCI_CFG_ZIP_PF_BAR0); 288 - if (!zip->reg_base) { 289 - dev_err(dev, "ZIP: Cannot map BAR0 CSR memory space, aborting"); 290 - err = -ENOMEM; 291 - goto err_release_regions; 292 - } 293 - 294 - /* Initialize ZIP Hardware */ 295 - err = zip_init_hw(zip); 296 - if (err) 297 - goto err_release_regions; 298 - 299 - /* Register with the Kernel Crypto Interface */ 300 - err = zip_register_compression_device(); 301 - if (err < 0) { 302 - zip_err("ZIP: Kernel Crypto Registration failed\n"); 303 - goto err_register; 304 - } 305 - 306 - /* comp-decomp statistics are handled with debugfs interface */ 307 - zip_debugfs_init(); 308 - 309 - return 0; 310 - 311 - err_register: 312 - zip_reset(zip); 313 - 314 - err_release_regions: 315 - if (zip->reg_base) 316 - iounmap(zip->reg_base); 317 - pci_release_regions(pdev); 318 - 319 - err_disable_device: 320 - pci_disable_device(pdev); 321 - 322 - err_free_device: 323 - pci_set_drvdata(pdev, NULL); 324 - 325 - /* Remove zip_dev from zip_device list, free the zip_device memory */ 326 - zip_dev[zip->index] = NULL; 327 - devm_kfree(dev, zip); 328 - 329 - return err; 330 - } 331 - 332 - static void zip_remove(struct pci_dev *pdev) 333 - { 334 - struct zip_device *zip = pci_get_drvdata(pdev); 335 - int q = 0; 336 - 337 - if (!zip) 338 - return; 339 - 340 - zip_debugfs_exit(); 341 - 342 - zip_unregister_compression_device(); 343 - 344 - if (zip->reg_base) { 345 - zip_reset(zip); 346 - iounmap(zip->reg_base); 347 - } 348 - 349 - pci_release_regions(pdev); 350 - pci_disable_device(pdev); 351 - 352 - /* 353 - * Free Command Queue buffers. This free should be called for all 354 - * the enabled Queues. 355 - */ 356 - for (q = 0; q < ZIP_NUM_QUEUES; q++) 357 - zip_cmd_qbuf_free(zip, q); 358 - 359 - pci_set_drvdata(pdev, NULL); 360 - /* remove zip device from zip device list */ 361 - zip_dev[zip->index] = NULL; 362 - } 363 - 364 - /* PCI Sub-System Interface */ 365 - static struct pci_driver zip_driver = { 366 - .name = DRV_NAME, 367 - .id_table = zip_id_table, 368 - .probe = zip_probe, 369 - .remove = zip_remove, 370 - }; 371 - 372 - /* Kernel Crypto Subsystem Interface */ 373 - 374 - static struct scomp_alg zip_scomp_deflate = { 375 - .alloc_ctx = zip_alloc_scomp_ctx_deflate, 376 - .free_ctx = zip_free_scomp_ctx, 377 - .compress = zip_scomp_compress, 378 - .decompress = zip_scomp_decompress, 379 - .base = { 380 - .cra_name = "deflate", 381 - .cra_driver_name = "deflate-scomp-cavium", 382 - .cra_module = THIS_MODULE, 383 - .cra_priority = 300, 384 - } 385 - }; 386 - 387 - static struct scomp_alg zip_scomp_lzs = { 388 - .alloc_ctx = zip_alloc_scomp_ctx_lzs, 389 - .free_ctx = zip_free_scomp_ctx, 390 - .compress = zip_scomp_compress, 391 - .decompress = zip_scomp_decompress, 392 - .base = { 393 - .cra_name = "lzs", 394 - .cra_driver_name = "lzs-scomp-cavium", 395 - .cra_module = THIS_MODULE, 396 - .cra_priority = 300, 397 - } 398 - }; 399 - 400 - static int zip_register_compression_device(void) 401 - { 402 - int ret; 403 - 404 - ret = crypto_register_scomp(&zip_scomp_deflate); 405 - if (ret < 0) { 406 - zip_err("Deflate scomp algorithm registration failed\n"); 407 - return ret; 408 - } 409 - 410 - ret = crypto_register_scomp(&zip_scomp_lzs); 411 - if (ret < 0) { 412 - zip_err("LZS scomp algorithm registration failed\n"); 413 - goto err_unregister_scomp_deflate; 414 - } 415 - 416 - return ret; 417 - 418 - err_unregister_scomp_deflate: 419 - crypto_unregister_scomp(&zip_scomp_deflate); 420 - 421 - return ret; 422 - } 423 - 424 - static void zip_unregister_compression_device(void) 425 - { 426 - crypto_unregister_scomp(&zip_scomp_deflate); 427 - crypto_unregister_scomp(&zip_scomp_lzs); 428 - } 429 - 430 - /* 431 - * debugfs functions 432 - */ 433 - #ifdef CONFIG_DEBUG_FS 434 - #include <linux/debugfs.h> 435 - 436 - /* Displays ZIP device statistics */ 437 - static int zip_stats_show(struct seq_file *s, void *unused) 438 - { 439 - u64 val = 0ull; 440 - u64 avg_chunk = 0ull, avg_cr = 0ull; 441 - u32 q = 0; 442 - 443 - int index = 0; 444 - struct zip_device *zip; 445 - struct zip_stats *st; 446 - 447 - for (index = 0; index < MAX_ZIP_DEVICES; index++) { 448 - u64 pending = 0; 449 - 450 - if (zip_dev[index]) { 451 - zip = zip_dev[index]; 452 - st = &zip->stats; 453 - 454 - /* Get all the pending requests */ 455 - for (q = 0; q < ZIP_NUM_QUEUES; q++) { 456 - val = zip_reg_read((zip->reg_base + 457 - ZIP_DBG_QUEX_STA(q))); 458 - pending += val >> 32 & 0xffffff; 459 - } 460 - 461 - val = atomic64_read(&st->comp_req_complete); 462 - avg_chunk = (val) ? atomic64_read(&st->comp_in_bytes) / val : 0; 463 - 464 - val = atomic64_read(&st->comp_out_bytes); 465 - avg_cr = (val) ? atomic64_read(&st->comp_in_bytes) / val : 0; 466 - seq_printf(s, " ZIP Device %d Stats\n" 467 - "-----------------------------------\n" 468 - "Comp Req Submitted : \t%lld\n" 469 - "Comp Req Completed : \t%lld\n" 470 - "Compress In Bytes : \t%lld\n" 471 - "Compressed Out Bytes : \t%lld\n" 472 - "Average Chunk size : \t%llu\n" 473 - "Average Compression ratio : \t%llu\n" 474 - "Decomp Req Submitted : \t%lld\n" 475 - "Decomp Req Completed : \t%lld\n" 476 - "Decompress In Bytes : \t%lld\n" 477 - "Decompressed Out Bytes : \t%lld\n" 478 - "Decompress Bad requests : \t%lld\n" 479 - "Pending Req : \t%lld\n" 480 - "---------------------------------\n", 481 - index, 482 - (u64)atomic64_read(&st->comp_req_submit), 483 - (u64)atomic64_read(&st->comp_req_complete), 484 - (u64)atomic64_read(&st->comp_in_bytes), 485 - (u64)atomic64_read(&st->comp_out_bytes), 486 - avg_chunk, 487 - avg_cr, 488 - (u64)atomic64_read(&st->decomp_req_submit), 489 - (u64)atomic64_read(&st->decomp_req_complete), 490 - (u64)atomic64_read(&st->decomp_in_bytes), 491 - (u64)atomic64_read(&st->decomp_out_bytes), 492 - (u64)atomic64_read(&st->decomp_bad_reqs), 493 - pending); 494 - } 495 - } 496 - return 0; 497 - } 498 - 499 - /* Clears stats data */ 500 - static int zip_clear_show(struct seq_file *s, void *unused) 501 - { 502 - int index = 0; 503 - 504 - for (index = 0; index < MAX_ZIP_DEVICES; index++) { 505 - if (zip_dev[index]) { 506 - memset(&zip_dev[index]->stats, 0, 507 - sizeof(struct zip_stats)); 508 - seq_printf(s, "Cleared stats for zip %d\n", index); 509 - } 510 - } 511 - 512 - return 0; 513 - } 514 - 515 - static struct zip_registers zipregs[64] = { 516 - {"ZIP_CMD_CTL ", 0x0000ull}, 517 - {"ZIP_THROTTLE ", 0x0010ull}, 518 - {"ZIP_CONSTANTS ", 0x00A0ull}, 519 - {"ZIP_QUE0_MAP ", 0x1400ull}, 520 - {"ZIP_QUE1_MAP ", 0x1408ull}, 521 - {"ZIP_QUE_ENA ", 0x0500ull}, 522 - {"ZIP_QUE_PRI ", 0x0508ull}, 523 - {"ZIP_QUE0_DONE ", 0x2000ull}, 524 - {"ZIP_QUE1_DONE ", 0x2008ull}, 525 - {"ZIP_QUE0_DOORBELL ", 0x4000ull}, 526 - {"ZIP_QUE1_DOORBELL ", 0x4008ull}, 527 - {"ZIP_QUE0_SBUF_ADDR ", 0x1000ull}, 528 - {"ZIP_QUE1_SBUF_ADDR ", 0x1008ull}, 529 - {"ZIP_QUE0_SBUF_CTL ", 0x1200ull}, 530 - {"ZIP_QUE1_SBUF_CTL ", 0x1208ull}, 531 - { NULL, 0} 532 - }; 533 - 534 - /* Prints registers' contents */ 535 - static int zip_regs_show(struct seq_file *s, void *unused) 536 - { 537 - u64 val = 0; 538 - int i = 0, index = 0; 539 - 540 - for (index = 0; index < MAX_ZIP_DEVICES; index++) { 541 - if (zip_dev[index]) { 542 - seq_printf(s, "--------------------------------\n" 543 - " ZIP Device %d Registers\n" 544 - "--------------------------------\n", 545 - index); 546 - 547 - i = 0; 548 - 549 - while (zipregs[i].reg_name) { 550 - val = zip_reg_read((zip_dev[index]->reg_base + 551 - zipregs[i].reg_offset)); 552 - seq_printf(s, "%s: 0x%016llx\n", 553 - zipregs[i].reg_name, val); 554 - i++; 555 - } 556 - } 557 - } 558 - return 0; 559 - } 560 - 561 - DEFINE_SHOW_ATTRIBUTE(zip_stats); 562 - DEFINE_SHOW_ATTRIBUTE(zip_clear); 563 - DEFINE_SHOW_ATTRIBUTE(zip_regs); 564 - 565 - /* Root directory for thunderx_zip debugfs entry */ 566 - static struct dentry *zip_debugfs_root; 567 - 568 - static void zip_debugfs_init(void) 569 - { 570 - if (!debugfs_initialized()) 571 - return; 572 - 573 - zip_debugfs_root = debugfs_create_dir("thunderx_zip", NULL); 574 - 575 - /* Creating files for entries inside thunderx_zip directory */ 576 - debugfs_create_file("zip_stats", 0444, zip_debugfs_root, NULL, 577 - &zip_stats_fops); 578 - 579 - debugfs_create_file("zip_clear", 0444, zip_debugfs_root, NULL, 580 - &zip_clear_fops); 581 - 582 - debugfs_create_file("zip_regs", 0444, zip_debugfs_root, NULL, 583 - &zip_regs_fops); 584 - 585 - } 586 - 587 - static void zip_debugfs_exit(void) 588 - { 589 - debugfs_remove_recursive(zip_debugfs_root); 590 - } 591 - 592 - #else 593 - static void __init zip_debugfs_init(void) { } 594 - static void __exit zip_debugfs_exit(void) { } 595 - #endif 596 - /* debugfs - end */ 597 - 598 - module_pci_driver(zip_driver); 599 - 600 - MODULE_AUTHOR("Cavium Inc"); 601 - MODULE_DESCRIPTION("Cavium Inc ThunderX ZIP Driver"); 602 - MODULE_LICENSE("GPL v2"); 603 - MODULE_DEVICE_TABLE(pci, zip_id_table);
-120
drivers/crypto/cavium/zip/zip_main.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __ZIP_MAIN_H__ 47 - #define __ZIP_MAIN_H__ 48 - 49 - #include "zip_device.h" 50 - #include "zip_regs.h" 51 - 52 - /* PCI device IDs */ 53 - #define PCI_DEVICE_ID_THUNDERX_ZIP 0xA01A 54 - 55 - /* ZIP device BARs */ 56 - #define PCI_CFG_ZIP_PF_BAR0 0 /* Base addr for normal regs */ 57 - 58 - /* Maximum available zip queues */ 59 - #define ZIP_MAX_NUM_QUEUES 8 60 - 61 - #define ZIP_128B_ALIGN 7 62 - 63 - /* Command queue buffer size */ 64 - #define ZIP_CMD_QBUF_SIZE (8064 + 8) 65 - 66 - struct zip_registers { 67 - char *reg_name; 68 - u64 reg_offset; 69 - }; 70 - 71 - /* ZIP Compression - Decompression stats */ 72 - struct zip_stats { 73 - atomic64_t comp_req_submit; 74 - atomic64_t comp_req_complete; 75 - atomic64_t decomp_req_submit; 76 - atomic64_t decomp_req_complete; 77 - atomic64_t comp_in_bytes; 78 - atomic64_t comp_out_bytes; 79 - atomic64_t decomp_in_bytes; 80 - atomic64_t decomp_out_bytes; 81 - atomic64_t decomp_bad_reqs; 82 - }; 83 - 84 - /* ZIP Instruction Queue */ 85 - struct zip_iq { 86 - u64 *sw_head; 87 - u64 *sw_tail; 88 - u64 *hw_tail; 89 - u64 done_cnt; 90 - u64 pend_cnt; 91 - u64 free_flag; 92 - 93 - /* ZIP IQ lock */ 94 - spinlock_t lock; 95 - }; 96 - 97 - /* ZIP Device */ 98 - struct zip_device { 99 - u32 index; 100 - void __iomem *reg_base; 101 - struct pci_dev *pdev; 102 - 103 - /* Different ZIP Constants */ 104 - u64 depth; 105 - u64 onfsize; 106 - u64 ctxsize; 107 - 108 - struct zip_iq iq[ZIP_MAX_NUM_QUEUES]; 109 - struct zip_stats stats; 110 - }; 111 - 112 - /* Prototypes */ 113 - struct zip_device *zip_get_device(int node_id); 114 - int zip_get_node_id(void); 115 - void zip_reg_write(u64 val, u64 __iomem *addr); 116 - u64 zip_reg_read(u64 __iomem *addr); 117 - void zip_update_cmd_bufs(struct zip_device *zip_dev, u32 queue); 118 - u32 zip_load_instr(union zip_inst_s *instr, struct zip_device *zip_dev); 119 - 120 - #endif /* ZIP_MAIN_H */
-114
drivers/crypto/cavium/zip/zip_mem.c
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #include <linux/types.h> 47 - #include <linux/vmalloc.h> 48 - 49 - #include "common.h" 50 - 51 - /** 52 - * zip_cmd_qbuf_alloc - Allocates a cmd buffer for ZIP Instruction Queue 53 - * @zip: Pointer to zip device structure 54 - * @q: Queue number to allocate bufffer to 55 - * Return: 0 if successful, -ENOMEM otherwise 56 - */ 57 - int zip_cmd_qbuf_alloc(struct zip_device *zip, int q) 58 - { 59 - zip->iq[q].sw_head = (u64 *)__get_free_pages((GFP_KERNEL | GFP_DMA), 60 - get_order(ZIP_CMD_QBUF_SIZE)); 61 - 62 - if (!zip->iq[q].sw_head) 63 - return -ENOMEM; 64 - 65 - memset(zip->iq[q].sw_head, 0, ZIP_CMD_QBUF_SIZE); 66 - 67 - zip_dbg("cmd_qbuf_alloc[%d] Success : %p\n", q, zip->iq[q].sw_head); 68 - return 0; 69 - } 70 - 71 - /** 72 - * zip_cmd_qbuf_free - Frees the cmd Queue buffer 73 - * @zip: Pointer to zip device structure 74 - * @q: Queue number to free buffer of 75 - */ 76 - void zip_cmd_qbuf_free(struct zip_device *zip, int q) 77 - { 78 - zip_dbg("Freeing cmd_qbuf 0x%lx\n", zip->iq[q].sw_tail); 79 - 80 - free_pages((u64)zip->iq[q].sw_tail, get_order(ZIP_CMD_QBUF_SIZE)); 81 - } 82 - 83 - /** 84 - * zip_data_buf_alloc - Allocates memory for a data bufffer 85 - * @size: Size of the buffer to allocate 86 - * Returns: Pointer to the buffer allocated 87 - */ 88 - u8 *zip_data_buf_alloc(u64 size) 89 - { 90 - u8 *ptr; 91 - 92 - ptr = (u8 *)__get_free_pages((GFP_KERNEL | GFP_DMA), 93 - get_order(size)); 94 - 95 - if (!ptr) 96 - return NULL; 97 - 98 - memset(ptr, 0, size); 99 - 100 - zip_dbg("Data buffer allocation success\n"); 101 - return ptr; 102 - } 103 - 104 - /** 105 - * zip_data_buf_free - Frees the memory of a data buffer 106 - * @ptr: Pointer to the buffer 107 - * @size: Buffer size 108 - */ 109 - void zip_data_buf_free(u8 *ptr, u64 size) 110 - { 111 - zip_dbg("Freeing data buffer 0x%lx\n", ptr); 112 - 113 - free_pages((u64)ptr, get_order(size)); 114 - }
-78
drivers/crypto/cavium/zip/zip_mem.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __ZIP_MEM_H__ 47 - #define __ZIP_MEM_H__ 48 - 49 - /** 50 - * zip_cmd_qbuf_free - Frees the cmd Queue buffer 51 - * @zip: Pointer to zip device structure 52 - * @q: Queue nmber to free buffer of 53 - */ 54 - void zip_cmd_qbuf_free(struct zip_device *zip, int q); 55 - 56 - /** 57 - * zip_cmd_qbuf_alloc - Allocates a Chunk/cmd buffer for ZIP Inst(cmd) Queue 58 - * @zip: Pointer to zip device structure 59 - * @q: Queue number to allocate bufffer to 60 - * Return: 0 if successful, 1 otherwise 61 - */ 62 - int zip_cmd_qbuf_alloc(struct zip_device *zip, int q); 63 - 64 - /** 65 - * zip_data_buf_alloc - Allocates memory for a data bufffer 66 - * @size: Size of the buffer to allocate 67 - * Returns: Pointer to the buffer allocated 68 - */ 69 - u8 *zip_data_buf_alloc(u64 size); 70 - 71 - /** 72 - * zip_data_buf_free - Frees the memory of a data buffer 73 - * @ptr: Pointer to the buffer 74 - * @size: Buffer size 75 - */ 76 - void zip_data_buf_free(u8 *ptr, u64 size); 77 - 78 - #endif
-1347
drivers/crypto/cavium/zip/zip_regs.h
··· 1 - /***********************license start************************************ 2 - * Copyright (c) 2003-2017 Cavium, Inc. 3 - * All rights reserved. 4 - * 5 - * License: one of 'Cavium License' or 'GNU General Public License Version 2' 6 - * 7 - * This file is provided under the terms of the Cavium License (see below) 8 - * or under the terms of GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. When using or redistributing 10 - * this file, you may do so under either license. 11 - * 12 - * Cavium License: Redistribution and use in source and binary forms, with 13 - * or without modification, are permitted provided that the following 14 - * conditions are met: 15 - * 16 - * * Redistributions of source code must retain the above copyright 17 - * notice, this list of conditions and the following disclaimer. 18 - * 19 - * * Redistributions in binary form must reproduce the above 20 - * copyright notice, this list of conditions and the following 21 - * disclaimer in the documentation and/or other materials provided 22 - * with the distribution. 23 - * 24 - * * Neither the name of Cavium Inc. nor the names of its contributors may be 25 - * used to endorse or promote products derived from this software without 26 - * specific prior written permission. 27 - * 28 - * This Software, including technical data, may be subject to U.S. export 29 - * control laws, including the U.S. Export Administration Act and its 30 - * associated regulations, and may be subject to export or import 31 - * regulations in other countries. 32 - * 33 - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 34 - * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS 35 - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 36 - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 37 - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 38 - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) 39 - * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A 40 - * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET 41 - * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE 42 - * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES 43 - * WITH YOU. 44 - ***********************license end**************************************/ 45 - 46 - #ifndef __ZIP_REGS_H__ 47 - #define __ZIP_REGS_H__ 48 - 49 - /* 50 - * Configuration and status register (CSR) address and type definitions for 51 - * Cavium ZIP. 52 - */ 53 - 54 - #include <linux/kern_levels.h> 55 - 56 - /* ZIP invocation result completion status codes */ 57 - #define ZIP_CMD_NOTDONE 0x0 58 - 59 - /* Successful completion. */ 60 - #define ZIP_CMD_SUCCESS 0x1 61 - 62 - /* Output truncated */ 63 - #define ZIP_CMD_DTRUNC 0x2 64 - 65 - /* Dynamic Stop */ 66 - #define ZIP_CMD_DYNAMIC_STOP 0x3 67 - 68 - /* Uncompress ran out of input data when IWORD0[EF] was set */ 69 - #define ZIP_CMD_ITRUNC 0x4 70 - 71 - /* Uncompress found the reserved block type 3 */ 72 - #define ZIP_CMD_RBLOCK 0x5 73 - 74 - /* 75 - * Uncompress found LEN != ZIP_CMD_NLEN in an uncompressed block in the input. 76 - */ 77 - #define ZIP_CMD_NLEN 0x6 78 - 79 - /* Uncompress found a bad code in the main Huffman codes. */ 80 - #define ZIP_CMD_BADCODE 0x7 81 - 82 - /* Uncompress found a bad code in the 19 Huffman codes encoding lengths. */ 83 - #define ZIP_CMD_BADCODE2 0x8 84 - 85 - /* Compress found a zero-length input. */ 86 - #define ZIP_CMD_ZERO_LEN 0x9 87 - 88 - /* The compress or decompress encountered an internal parity error. */ 89 - #define ZIP_CMD_PARITY 0xA 90 - 91 - /* 92 - * Uncompress found a string identifier that precedes the uncompressed data and 93 - * decompression history. 94 - */ 95 - #define ZIP_CMD_FATAL 0xB 96 - 97 - /** 98 - * enum zip_int_vec_e - ZIP MSI-X Vector Enumeration, enumerates the MSI-X 99 - * interrupt vectors. 100 - */ 101 - enum zip_int_vec_e { 102 - ZIP_INT_VEC_E_ECCE = 0x10, 103 - ZIP_INT_VEC_E_FIFE = 0x11, 104 - ZIP_INT_VEC_E_QUE0_DONE = 0x0, 105 - ZIP_INT_VEC_E_QUE0_ERR = 0x8, 106 - ZIP_INT_VEC_E_QUE1_DONE = 0x1, 107 - ZIP_INT_VEC_E_QUE1_ERR = 0x9, 108 - ZIP_INT_VEC_E_QUE2_DONE = 0x2, 109 - ZIP_INT_VEC_E_QUE2_ERR = 0xa, 110 - ZIP_INT_VEC_E_QUE3_DONE = 0x3, 111 - ZIP_INT_VEC_E_QUE3_ERR = 0xb, 112 - ZIP_INT_VEC_E_QUE4_DONE = 0x4, 113 - ZIP_INT_VEC_E_QUE4_ERR = 0xc, 114 - ZIP_INT_VEC_E_QUE5_DONE = 0x5, 115 - ZIP_INT_VEC_E_QUE5_ERR = 0xd, 116 - ZIP_INT_VEC_E_QUE6_DONE = 0x6, 117 - ZIP_INT_VEC_E_QUE6_ERR = 0xe, 118 - ZIP_INT_VEC_E_QUE7_DONE = 0x7, 119 - ZIP_INT_VEC_E_QUE7_ERR = 0xf, 120 - ZIP_INT_VEC_E_ENUM_LAST = 0x12, 121 - }; 122 - 123 - /** 124 - * union zip_zptr_addr_s - ZIP Generic Pointer Structure for ADDR. 125 - * 126 - * It is the generic format of pointers in ZIP_INST_S. 127 - */ 128 - union zip_zptr_addr_s { 129 - u64 u_reg64; 130 - struct { 131 - #if defined(__BIG_ENDIAN_BITFIELD) 132 - u64 reserved_49_63 : 15; 133 - u64 addr : 49; 134 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 135 - u64 addr : 49; 136 - u64 reserved_49_63 : 15; 137 - #endif 138 - } s; 139 - 140 - }; 141 - 142 - /** 143 - * union zip_zptr_ctl_s - ZIP Generic Pointer Structure for CTL. 144 - * 145 - * It is the generic format of pointers in ZIP_INST_S. 146 - */ 147 - union zip_zptr_ctl_s { 148 - u64 u_reg64; 149 - struct { 150 - #if defined(__BIG_ENDIAN_BITFIELD) 151 - u64 reserved_112_127 : 16; 152 - u64 length : 16; 153 - u64 reserved_67_95 : 29; 154 - u64 fw : 1; 155 - u64 nc : 1; 156 - u64 data_be : 1; 157 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 158 - u64 data_be : 1; 159 - u64 nc : 1; 160 - u64 fw : 1; 161 - u64 reserved_67_95 : 29; 162 - u64 length : 16; 163 - u64 reserved_112_127 : 16; 164 - #endif 165 - } s; 166 - }; 167 - 168 - /** 169 - * union zip_inst_s - ZIP Instruction Structure. 170 - * Each ZIP instruction has 16 words (they are called IWORD0 to IWORD15 within 171 - * the structure). 172 - */ 173 - union zip_inst_s { 174 - u64 u_reg64[16]; 175 - struct { 176 - #if defined(__BIG_ENDIAN_BITFIELD) 177 - u64 doneint : 1; 178 - u64 reserved_56_62 : 7; 179 - u64 totaloutputlength : 24; 180 - u64 reserved_27_31 : 5; 181 - u64 exn : 3; 182 - u64 reserved_23_23 : 1; 183 - u64 exbits : 7; 184 - u64 reserved_12_15 : 4; 185 - u64 sf : 1; 186 - u64 ss : 2; 187 - u64 cc : 2; 188 - u64 ef : 1; 189 - u64 bf : 1; 190 - u64 ce : 1; 191 - u64 reserved_3_3 : 1; 192 - u64 ds : 1; 193 - u64 dg : 1; 194 - u64 hg : 1; 195 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 196 - u64 hg : 1; 197 - u64 dg : 1; 198 - u64 ds : 1; 199 - u64 reserved_3_3 : 1; 200 - u64 ce : 1; 201 - u64 bf : 1; 202 - u64 ef : 1; 203 - u64 cc : 2; 204 - u64 ss : 2; 205 - u64 sf : 1; 206 - u64 reserved_12_15 : 4; 207 - u64 exbits : 7; 208 - u64 reserved_23_23 : 1; 209 - u64 exn : 3; 210 - u64 reserved_27_31 : 5; 211 - u64 totaloutputlength : 24; 212 - u64 reserved_56_62 : 7; 213 - u64 doneint : 1; 214 - #endif 215 - #if defined(__BIG_ENDIAN_BITFIELD) 216 - u64 historylength : 16; 217 - u64 reserved_96_111 : 16; 218 - u64 adlercrc32 : 32; 219 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 220 - u64 adlercrc32 : 32; 221 - u64 reserved_96_111 : 16; 222 - u64 historylength : 16; 223 - #endif 224 - union zip_zptr_addr_s ctx_ptr_addr; 225 - union zip_zptr_ctl_s ctx_ptr_ctl; 226 - union zip_zptr_addr_s his_ptr_addr; 227 - union zip_zptr_ctl_s his_ptr_ctl; 228 - union zip_zptr_addr_s inp_ptr_addr; 229 - union zip_zptr_ctl_s inp_ptr_ctl; 230 - union zip_zptr_addr_s out_ptr_addr; 231 - union zip_zptr_ctl_s out_ptr_ctl; 232 - union zip_zptr_addr_s res_ptr_addr; 233 - union zip_zptr_ctl_s res_ptr_ctl; 234 - #if defined(__BIG_ENDIAN_BITFIELD) 235 - u64 reserved_817_831 : 15; 236 - u64 wq_ptr : 49; 237 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 238 - u64 wq_ptr : 49; 239 - u64 reserved_817_831 : 15; 240 - #endif 241 - #if defined(__BIG_ENDIAN_BITFIELD) 242 - u64 reserved_882_895 : 14; 243 - u64 tt : 2; 244 - u64 reserved_874_879 : 6; 245 - u64 grp : 10; 246 - u64 tag : 32; 247 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 248 - u64 tag : 32; 249 - u64 grp : 10; 250 - u64 reserved_874_879 : 6; 251 - u64 tt : 2; 252 - u64 reserved_882_895 : 14; 253 - #endif 254 - #if defined(__BIG_ENDIAN_BITFIELD) 255 - u64 reserved_896_959 : 64; 256 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 257 - u64 reserved_896_959 : 64; 258 - #endif 259 - #if defined(__BIG_ENDIAN_BITFIELD) 260 - u64 reserved_960_1023 : 64; 261 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 262 - u64 reserved_960_1023 : 64; 263 - #endif 264 - } s; 265 - }; 266 - 267 - /** 268 - * union zip_nptr_s - ZIP Instruction Next-Chunk-Buffer Pointer (NPTR) 269 - * Structure 270 - * 271 - * ZIP_NPTR structure is used to chain all the zip instruction buffers 272 - * together. ZIP instruction buffers are managed (allocated and released) by 273 - * the software. 274 - */ 275 - union zip_nptr_s { 276 - u64 u_reg64; 277 - struct { 278 - #if defined(__BIG_ENDIAN_BITFIELD) 279 - u64 reserved_49_63 : 15; 280 - u64 addr : 49; 281 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 282 - u64 addr : 49; 283 - u64 reserved_49_63 : 15; 284 - #endif 285 - } s; 286 - }; 287 - 288 - /** 289 - * union zip_zptr_s - ZIP Generic Pointer Structure. 290 - * 291 - * It is the generic format of pointers in ZIP_INST_S. 292 - */ 293 - union zip_zptr_s { 294 - u64 u_reg64[2]; 295 - struct { 296 - #if defined(__BIG_ENDIAN_BITFIELD) 297 - u64 reserved_49_63 : 15; 298 - u64 addr : 49; 299 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 300 - u64 addr : 49; 301 - u64 reserved_49_63 : 15; 302 - #endif 303 - #if defined(__BIG_ENDIAN_BITFIELD) 304 - u64 reserved_112_127 : 16; 305 - u64 length : 16; 306 - u64 reserved_67_95 : 29; 307 - u64 fw : 1; 308 - u64 nc : 1; 309 - u64 data_be : 1; 310 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 311 - u64 data_be : 1; 312 - u64 nc : 1; 313 - u64 fw : 1; 314 - u64 reserved_67_95 : 29; 315 - u64 length : 16; 316 - u64 reserved_112_127 : 16; 317 - #endif 318 - } s; 319 - }; 320 - 321 - /** 322 - * union zip_zres_s - ZIP Result Structure 323 - * 324 - * The ZIP coprocessor writes the result structure after it completes the 325 - * invocation. The result structure is exactly 24 bytes, and each invocation of 326 - * the ZIP coprocessor produces exactly one result structure. 327 - */ 328 - union zip_zres_s { 329 - u64 u_reg64[3]; 330 - struct { 331 - #if defined(__BIG_ENDIAN_BITFIELD) 332 - u64 crc32 : 32; 333 - u64 adler32 : 32; 334 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 335 - u64 adler32 : 32; 336 - u64 crc32 : 32; 337 - #endif 338 - #if defined(__BIG_ENDIAN_BITFIELD) 339 - u64 totalbyteswritten : 32; 340 - u64 totalbytesread : 32; 341 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 342 - u64 totalbytesread : 32; 343 - u64 totalbyteswritten : 32; 344 - #endif 345 - #if defined(__BIG_ENDIAN_BITFIELD) 346 - u64 totalbitsprocessed : 32; 347 - u64 doneint : 1; 348 - u64 reserved_155_158 : 4; 349 - u64 exn : 3; 350 - u64 reserved_151_151 : 1; 351 - u64 exbits : 7; 352 - u64 reserved_137_143 : 7; 353 - u64 ef : 1; 354 - 355 - volatile u64 compcode : 8; 356 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 357 - 358 - volatile u64 compcode : 8; 359 - u64 ef : 1; 360 - u64 reserved_137_143 : 7; 361 - u64 exbits : 7; 362 - u64 reserved_151_151 : 1; 363 - u64 exn : 3; 364 - u64 reserved_155_158 : 4; 365 - u64 doneint : 1; 366 - u64 totalbitsprocessed : 32; 367 - #endif 368 - } s; 369 - }; 370 - 371 - /** 372 - * union zip_cmd_ctl - Structure representing the register that controls 373 - * clock and reset. 374 - */ 375 - union zip_cmd_ctl { 376 - u64 u_reg64; 377 - struct zip_cmd_ctl_s { 378 - #if defined(__BIG_ENDIAN_BITFIELD) 379 - u64 reserved_2_63 : 62; 380 - u64 forceclk : 1; 381 - u64 reset : 1; 382 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 383 - u64 reset : 1; 384 - u64 forceclk : 1; 385 - u64 reserved_2_63 : 62; 386 - #endif 387 - } s; 388 - }; 389 - 390 - #define ZIP_CMD_CTL 0x0ull 391 - 392 - /** 393 - * union zip_constants - Data structure representing the register that contains 394 - * all of the current implementation-related parameters of the zip core in this 395 - * chip. 396 - */ 397 - union zip_constants { 398 - u64 u_reg64; 399 - struct zip_constants_s { 400 - #if defined(__BIG_ENDIAN_BITFIELD) 401 - u64 nexec : 8; 402 - u64 reserved_49_55 : 7; 403 - u64 syncflush_capable : 1; 404 - u64 depth : 16; 405 - u64 onfsize : 12; 406 - u64 ctxsize : 12; 407 - u64 reserved_1_7 : 7; 408 - u64 disabled : 1; 409 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 410 - u64 disabled : 1; 411 - u64 reserved_1_7 : 7; 412 - u64 ctxsize : 12; 413 - u64 onfsize : 12; 414 - u64 depth : 16; 415 - u64 syncflush_capable : 1; 416 - u64 reserved_49_55 : 7; 417 - u64 nexec : 8; 418 - #endif 419 - } s; 420 - }; 421 - 422 - #define ZIP_CONSTANTS 0x00A0ull 423 - 424 - /** 425 - * union zip_corex_bist_status - Represents registers which have the BIST 426 - * status of memories in zip cores. 427 - * 428 - * Each bit is the BIST result of an individual memory 429 - * (per bit, 0 = pass and 1 = fail). 430 - */ 431 - union zip_corex_bist_status { 432 - u64 u_reg64; 433 - struct zip_corex_bist_status_s { 434 - #if defined(__BIG_ENDIAN_BITFIELD) 435 - u64 reserved_53_63 : 11; 436 - u64 bstatus : 53; 437 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 438 - u64 bstatus : 53; 439 - u64 reserved_53_63 : 11; 440 - #endif 441 - } s; 442 - }; 443 - 444 - static inline u64 ZIP_COREX_BIST_STATUS(u64 param1) 445 - { 446 - if (param1 <= 1) 447 - return 0x0520ull + (param1 & 1) * 0x8ull; 448 - pr_err("ZIP_COREX_BIST_STATUS: %llu\n", param1); 449 - return 0; 450 - } 451 - 452 - /** 453 - * union zip_ctl_bist_status - Represents register that has the BIST status of 454 - * memories in ZIP_CTL (instruction buffer, G/S pointer FIFO, input data 455 - * buffer, output data buffers). 456 - * 457 - * Each bit is the BIST result of an individual memory 458 - * (per bit, 0 = pass and 1 = fail). 459 - */ 460 - union zip_ctl_bist_status { 461 - u64 u_reg64; 462 - struct zip_ctl_bist_status_s { 463 - #if defined(__BIG_ENDIAN_BITFIELD) 464 - u64 reserved_9_63 : 55; 465 - u64 bstatus : 9; 466 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 467 - u64 bstatus : 9; 468 - u64 reserved_9_63 : 55; 469 - #endif 470 - } s; 471 - }; 472 - 473 - #define ZIP_CTL_BIST_STATUS 0x0510ull 474 - 475 - /** 476 - * union zip_ctl_cfg - Represents the register that controls the behavior of 477 - * the ZIP DMA engines. 478 - * 479 - * It is recommended to keep default values for normal operation. Changing the 480 - * values of the fields may be useful for diagnostics. 481 - */ 482 - union zip_ctl_cfg { 483 - u64 u_reg64; 484 - struct zip_ctl_cfg_s { 485 - #if defined(__BIG_ENDIAN_BITFIELD) 486 - u64 reserved_52_63 : 12; 487 - u64 ildf : 4; 488 - u64 reserved_36_47 : 12; 489 - u64 drtf : 4; 490 - u64 reserved_27_31 : 5; 491 - u64 stcf : 3; 492 - u64 reserved_19_23 : 5; 493 - u64 ldf : 3; 494 - u64 reserved_2_15 : 14; 495 - u64 busy : 1; 496 - u64 reserved_0_0 : 1; 497 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 498 - u64 reserved_0_0 : 1; 499 - u64 busy : 1; 500 - u64 reserved_2_15 : 14; 501 - u64 ldf : 3; 502 - u64 reserved_19_23 : 5; 503 - u64 stcf : 3; 504 - u64 reserved_27_31 : 5; 505 - u64 drtf : 4; 506 - u64 reserved_36_47 : 12; 507 - u64 ildf : 4; 508 - u64 reserved_52_63 : 12; 509 - #endif 510 - } s; 511 - }; 512 - 513 - #define ZIP_CTL_CFG 0x0560ull 514 - 515 - /** 516 - * union zip_dbg_corex_inst - Represents the registers that reflect the status 517 - * of the current instruction that the ZIP core is executing or has executed. 518 - * 519 - * These registers are only for debug use. 520 - */ 521 - union zip_dbg_corex_inst { 522 - u64 u_reg64; 523 - struct zip_dbg_corex_inst_s { 524 - #if defined(__BIG_ENDIAN_BITFIELD) 525 - u64 busy : 1; 526 - u64 reserved_35_62 : 28; 527 - u64 qid : 3; 528 - u64 iid : 32; 529 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 530 - u64 iid : 32; 531 - u64 qid : 3; 532 - u64 reserved_35_62 : 28; 533 - u64 busy : 1; 534 - #endif 535 - } s; 536 - }; 537 - 538 - static inline u64 ZIP_DBG_COREX_INST(u64 param1) 539 - { 540 - if (param1 <= 1) 541 - return 0x0640ull + (param1 & 1) * 0x8ull; 542 - pr_err("ZIP_DBG_COREX_INST: %llu\n", param1); 543 - return 0; 544 - } 545 - 546 - /** 547 - * union zip_dbg_corex_sta - Represents registers that reflect the status of 548 - * the zip cores. 549 - * 550 - * They are for debug use only. 551 - */ 552 - union zip_dbg_corex_sta { 553 - u64 u_reg64; 554 - struct zip_dbg_corex_sta_s { 555 - #if defined(__BIG_ENDIAN_BITFIELD) 556 - u64 busy : 1; 557 - u64 reserved_37_62 : 26; 558 - u64 ist : 5; 559 - u64 nie : 32; 560 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 561 - u64 nie : 32; 562 - u64 ist : 5; 563 - u64 reserved_37_62 : 26; 564 - u64 busy : 1; 565 - #endif 566 - } s; 567 - }; 568 - 569 - static inline u64 ZIP_DBG_COREX_STA(u64 param1) 570 - { 571 - if (param1 <= 1) 572 - return 0x0680ull + (param1 & 1) * 0x8ull; 573 - pr_err("ZIP_DBG_COREX_STA: %llu\n", param1); 574 - return 0; 575 - } 576 - 577 - /** 578 - * union zip_dbg_quex_sta - Represets registers that reflect status of the zip 579 - * instruction queues. 580 - * 581 - * They are for debug use only. 582 - */ 583 - union zip_dbg_quex_sta { 584 - u64 u_reg64; 585 - struct zip_dbg_quex_sta_s { 586 - #if defined(__BIG_ENDIAN_BITFIELD) 587 - u64 busy : 1; 588 - u64 reserved_56_62 : 7; 589 - u64 rqwc : 24; 590 - u64 nii : 32; 591 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 592 - u64 nii : 32; 593 - u64 rqwc : 24; 594 - u64 reserved_56_62 : 7; 595 - u64 busy : 1; 596 - #endif 597 - } s; 598 - }; 599 - 600 - static inline u64 ZIP_DBG_QUEX_STA(u64 param1) 601 - { 602 - if (param1 <= 7) 603 - return 0x1800ull + (param1 & 7) * 0x8ull; 604 - pr_err("ZIP_DBG_QUEX_STA: %llu\n", param1); 605 - return 0; 606 - } 607 - 608 - /** 609 - * union zip_ecc_ctl - Represents the register that enables ECC for each 610 - * individual internal memory that requires ECC. 611 - * 612 - * For debug purpose, it can also flip one or two bits in the ECC data. 613 - */ 614 - union zip_ecc_ctl { 615 - u64 u_reg64; 616 - struct zip_ecc_ctl_s { 617 - #if defined(__BIG_ENDIAN_BITFIELD) 618 - u64 reserved_19_63 : 45; 619 - u64 vmem_cdis : 1; 620 - u64 vmem_fs : 2; 621 - u64 reserved_15_15 : 1; 622 - u64 idf1_cdis : 1; 623 - u64 idf1_fs : 2; 624 - u64 reserved_11_11 : 1; 625 - u64 idf0_cdis : 1; 626 - u64 idf0_fs : 2; 627 - u64 reserved_7_7 : 1; 628 - u64 gspf_cdis : 1; 629 - u64 gspf_fs : 2; 630 - u64 reserved_3_3 : 1; 631 - u64 iqf_cdis : 1; 632 - u64 iqf_fs : 2; 633 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 634 - u64 iqf_fs : 2; 635 - u64 iqf_cdis : 1; 636 - u64 reserved_3_3 : 1; 637 - u64 gspf_fs : 2; 638 - u64 gspf_cdis : 1; 639 - u64 reserved_7_7 : 1; 640 - u64 idf0_fs : 2; 641 - u64 idf0_cdis : 1; 642 - u64 reserved_11_11 : 1; 643 - u64 idf1_fs : 2; 644 - u64 idf1_cdis : 1; 645 - u64 reserved_15_15 : 1; 646 - u64 vmem_fs : 2; 647 - u64 vmem_cdis : 1; 648 - u64 reserved_19_63 : 45; 649 - #endif 650 - } s; 651 - }; 652 - 653 - #define ZIP_ECC_CTL 0x0568ull 654 - 655 - /* NCB - zip_ecce_ena_w1c */ 656 - union zip_ecce_ena_w1c { 657 - u64 u_reg64; 658 - struct zip_ecce_ena_w1c_s { 659 - #if defined(__BIG_ENDIAN_BITFIELD) 660 - u64 reserved_37_63 : 27; 661 - u64 dbe : 5; 662 - u64 reserved_5_31 : 27; 663 - u64 sbe : 5; 664 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 665 - u64 sbe : 5; 666 - u64 reserved_5_31 : 27; 667 - u64 dbe : 5; 668 - u64 reserved_37_63 : 27; 669 - #endif 670 - } s; 671 - }; 672 - 673 - #define ZIP_ECCE_ENA_W1C 0x0598ull 674 - 675 - /* NCB - zip_ecce_ena_w1s */ 676 - union zip_ecce_ena_w1s { 677 - u64 u_reg64; 678 - struct zip_ecce_ena_w1s_s { 679 - #if defined(__BIG_ENDIAN_BITFIELD) 680 - u64 reserved_37_63 : 27; 681 - u64 dbe : 5; 682 - u64 reserved_5_31 : 27; 683 - u64 sbe : 5; 684 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 685 - u64 sbe : 5; 686 - u64 reserved_5_31 : 27; 687 - u64 dbe : 5; 688 - u64 reserved_37_63 : 27; 689 - #endif 690 - } s; 691 - }; 692 - 693 - #define ZIP_ECCE_ENA_W1S 0x0590ull 694 - 695 - /** 696 - * union zip_ecce_int - Represents the register that contains the status of the 697 - * ECC interrupt sources. 698 - */ 699 - union zip_ecce_int { 700 - u64 u_reg64; 701 - struct zip_ecce_int_s { 702 - #if defined(__BIG_ENDIAN_BITFIELD) 703 - u64 reserved_37_63 : 27; 704 - u64 dbe : 5; 705 - u64 reserved_5_31 : 27; 706 - u64 sbe : 5; 707 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 708 - u64 sbe : 5; 709 - u64 reserved_5_31 : 27; 710 - u64 dbe : 5; 711 - u64 reserved_37_63 : 27; 712 - #endif 713 - } s; 714 - }; 715 - 716 - #define ZIP_ECCE_INT 0x0580ull 717 - 718 - /* NCB - zip_ecce_int_w1s */ 719 - union zip_ecce_int_w1s { 720 - u64 u_reg64; 721 - struct zip_ecce_int_w1s_s { 722 - #if defined(__BIG_ENDIAN_BITFIELD) 723 - u64 reserved_37_63 : 27; 724 - u64 dbe : 5; 725 - u64 reserved_5_31 : 27; 726 - u64 sbe : 5; 727 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 728 - u64 sbe : 5; 729 - u64 reserved_5_31 : 27; 730 - u64 dbe : 5; 731 - u64 reserved_37_63 : 27; 732 - #endif 733 - } s; 734 - }; 735 - 736 - #define ZIP_ECCE_INT_W1S 0x0588ull 737 - 738 - /* NCB - zip_fife_ena_w1c */ 739 - union zip_fife_ena_w1c { 740 - u64 u_reg64; 741 - struct zip_fife_ena_w1c_s { 742 - #if defined(__BIG_ENDIAN_BITFIELD) 743 - u64 reserved_42_63 : 22; 744 - u64 asserts : 42; 745 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 746 - u64 asserts : 42; 747 - u64 reserved_42_63 : 22; 748 - #endif 749 - } s; 750 - }; 751 - 752 - #define ZIP_FIFE_ENA_W1C 0x0090ull 753 - 754 - /* NCB - zip_fife_ena_w1s */ 755 - union zip_fife_ena_w1s { 756 - u64 u_reg64; 757 - struct zip_fife_ena_w1s_s { 758 - #if defined(__BIG_ENDIAN_BITFIELD) 759 - u64 reserved_42_63 : 22; 760 - u64 asserts : 42; 761 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 762 - u64 asserts : 42; 763 - u64 reserved_42_63 : 22; 764 - #endif 765 - } s; 766 - }; 767 - 768 - #define ZIP_FIFE_ENA_W1S 0x0088ull 769 - 770 - /* NCB - zip_fife_int */ 771 - union zip_fife_int { 772 - u64 u_reg64; 773 - struct zip_fife_int_s { 774 - #if defined(__BIG_ENDIAN_BITFIELD) 775 - u64 reserved_42_63 : 22; 776 - u64 asserts : 42; 777 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 778 - u64 asserts : 42; 779 - u64 reserved_42_63 : 22; 780 - #endif 781 - } s; 782 - }; 783 - 784 - #define ZIP_FIFE_INT 0x0078ull 785 - 786 - /* NCB - zip_fife_int_w1s */ 787 - union zip_fife_int_w1s { 788 - u64 u_reg64; 789 - struct zip_fife_int_w1s_s { 790 - #if defined(__BIG_ENDIAN_BITFIELD) 791 - u64 reserved_42_63 : 22; 792 - u64 asserts : 42; 793 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 794 - u64 asserts : 42; 795 - u64 reserved_42_63 : 22; 796 - #endif 797 - } s; 798 - }; 799 - 800 - #define ZIP_FIFE_INT_W1S 0x0080ull 801 - 802 - /** 803 - * union zip_msix_pbax - Represents the register that is the MSI-X PBA table 804 - * 805 - * The bit number is indexed by the ZIP_INT_VEC_E enumeration. 806 - */ 807 - union zip_msix_pbax { 808 - u64 u_reg64; 809 - struct zip_msix_pbax_s { 810 - #if defined(__BIG_ENDIAN_BITFIELD) 811 - u64 pend : 64; 812 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 813 - u64 pend : 64; 814 - #endif 815 - } s; 816 - }; 817 - 818 - static inline u64 ZIP_MSIX_PBAX(u64 param1) 819 - { 820 - if (param1 == 0) 821 - return 0x0000838000FF0000ull; 822 - pr_err("ZIP_MSIX_PBAX: %llu\n", param1); 823 - return 0; 824 - } 825 - 826 - /** 827 - * union zip_msix_vecx_addr - Represents the register that is the MSI-X vector 828 - * table, indexed by the ZIP_INT_VEC_E enumeration. 829 - */ 830 - union zip_msix_vecx_addr { 831 - u64 u_reg64; 832 - struct zip_msix_vecx_addr_s { 833 - #if defined(__BIG_ENDIAN_BITFIELD) 834 - u64 reserved_49_63 : 15; 835 - u64 addr : 47; 836 - u64 reserved_1_1 : 1; 837 - u64 secvec : 1; 838 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 839 - u64 secvec : 1; 840 - u64 reserved_1_1 : 1; 841 - u64 addr : 47; 842 - u64 reserved_49_63 : 15; 843 - #endif 844 - } s; 845 - }; 846 - 847 - static inline u64 ZIP_MSIX_VECX_ADDR(u64 param1) 848 - { 849 - if (param1 <= 17) 850 - return 0x0000838000F00000ull + (param1 & 31) * 0x10ull; 851 - pr_err("ZIP_MSIX_VECX_ADDR: %llu\n", param1); 852 - return 0; 853 - } 854 - 855 - /** 856 - * union zip_msix_vecx_ctl - Represents the register that is the MSI-X vector 857 - * table, indexed by the ZIP_INT_VEC_E enumeration. 858 - */ 859 - union zip_msix_vecx_ctl { 860 - u64 u_reg64; 861 - struct zip_msix_vecx_ctl_s { 862 - #if defined(__BIG_ENDIAN_BITFIELD) 863 - u64 reserved_33_63 : 31; 864 - u64 mask : 1; 865 - u64 reserved_20_31 : 12; 866 - u64 data : 20; 867 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 868 - u64 data : 20; 869 - u64 reserved_20_31 : 12; 870 - u64 mask : 1; 871 - u64 reserved_33_63 : 31; 872 - #endif 873 - } s; 874 - }; 875 - 876 - static inline u64 ZIP_MSIX_VECX_CTL(u64 param1) 877 - { 878 - if (param1 <= 17) 879 - return 0x0000838000F00008ull + (param1 & 31) * 0x10ull; 880 - pr_err("ZIP_MSIX_VECX_CTL: %llu\n", param1); 881 - return 0; 882 - } 883 - 884 - /** 885 - * union zip_quex_done - Represents the registers that contain the per-queue 886 - * instruction done count. 887 - */ 888 - union zip_quex_done { 889 - u64 u_reg64; 890 - struct zip_quex_done_s { 891 - #if defined(__BIG_ENDIAN_BITFIELD) 892 - u64 reserved_20_63 : 44; 893 - u64 done : 20; 894 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 895 - u64 done : 20; 896 - u64 reserved_20_63 : 44; 897 - #endif 898 - } s; 899 - }; 900 - 901 - static inline u64 ZIP_QUEX_DONE(u64 param1) 902 - { 903 - if (param1 <= 7) 904 - return 0x2000ull + (param1 & 7) * 0x8ull; 905 - pr_err("ZIP_QUEX_DONE: %llu\n", param1); 906 - return 0; 907 - } 908 - 909 - /** 910 - * union zip_quex_done_ack - Represents the registers on write to which will 911 - * decrement the per-queue instructiona done count. 912 - */ 913 - union zip_quex_done_ack { 914 - u64 u_reg64; 915 - struct zip_quex_done_ack_s { 916 - #if defined(__BIG_ENDIAN_BITFIELD) 917 - u64 reserved_20_63 : 44; 918 - u64 done_ack : 20; 919 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 920 - u64 done_ack : 20; 921 - u64 reserved_20_63 : 44; 922 - #endif 923 - } s; 924 - }; 925 - 926 - static inline u64 ZIP_QUEX_DONE_ACK(u64 param1) 927 - { 928 - if (param1 <= 7) 929 - return 0x2200ull + (param1 & 7) * 0x8ull; 930 - pr_err("ZIP_QUEX_DONE_ACK: %llu\n", param1); 931 - return 0; 932 - } 933 - 934 - /** 935 - * union zip_quex_done_ena_w1c - Represents the register which when written 936 - * 1 to will disable the DONEINT interrupt for the queue. 937 - */ 938 - union zip_quex_done_ena_w1c { 939 - u64 u_reg64; 940 - struct zip_quex_done_ena_w1c_s { 941 - #if defined(__BIG_ENDIAN_BITFIELD) 942 - u64 reserved_1_63 : 63; 943 - u64 done_ena : 1; 944 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 945 - u64 done_ena : 1; 946 - u64 reserved_1_63 : 63; 947 - #endif 948 - } s; 949 - }; 950 - 951 - static inline u64 ZIP_QUEX_DONE_ENA_W1C(u64 param1) 952 - { 953 - if (param1 <= 7) 954 - return 0x2600ull + (param1 & 7) * 0x8ull; 955 - pr_err("ZIP_QUEX_DONE_ENA_W1C: %llu\n", param1); 956 - return 0; 957 - } 958 - 959 - /** 960 - * union zip_quex_done_ena_w1s - Represents the register that when written 1 to 961 - * will enable the DONEINT interrupt for the queue. 962 - */ 963 - union zip_quex_done_ena_w1s { 964 - u64 u_reg64; 965 - struct zip_quex_done_ena_w1s_s { 966 - #if defined(__BIG_ENDIAN_BITFIELD) 967 - u64 reserved_1_63 : 63; 968 - u64 done_ena : 1; 969 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 970 - u64 done_ena : 1; 971 - u64 reserved_1_63 : 63; 972 - #endif 973 - } s; 974 - }; 975 - 976 - static inline u64 ZIP_QUEX_DONE_ENA_W1S(u64 param1) 977 - { 978 - if (param1 <= 7) 979 - return 0x2400ull + (param1 & 7) * 0x8ull; 980 - pr_err("ZIP_QUEX_DONE_ENA_W1S: %llu\n", param1); 981 - return 0; 982 - } 983 - 984 - /** 985 - * union zip_quex_done_wait - Represents the register that specifies the per 986 - * queue interrupt coalescing settings. 987 - */ 988 - union zip_quex_done_wait { 989 - u64 u_reg64; 990 - struct zip_quex_done_wait_s { 991 - #if defined(__BIG_ENDIAN_BITFIELD) 992 - u64 reserved_48_63 : 16; 993 - u64 time_wait : 16; 994 - u64 reserved_20_31 : 12; 995 - u64 num_wait : 20; 996 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 997 - u64 num_wait : 20; 998 - u64 reserved_20_31 : 12; 999 - u64 time_wait : 16; 1000 - u64 reserved_48_63 : 16; 1001 - #endif 1002 - } s; 1003 - }; 1004 - 1005 - static inline u64 ZIP_QUEX_DONE_WAIT(u64 param1) 1006 - { 1007 - if (param1 <= 7) 1008 - return 0x2800ull + (param1 & 7) * 0x8ull; 1009 - pr_err("ZIP_QUEX_DONE_WAIT: %llu\n", param1); 1010 - return 0; 1011 - } 1012 - 1013 - /** 1014 - * union zip_quex_doorbell - Represents doorbell registers for the ZIP 1015 - * instruction queues. 1016 - */ 1017 - union zip_quex_doorbell { 1018 - u64 u_reg64; 1019 - struct zip_quex_doorbell_s { 1020 - #if defined(__BIG_ENDIAN_BITFIELD) 1021 - u64 reserved_20_63 : 44; 1022 - u64 dbell_cnt : 20; 1023 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1024 - u64 dbell_cnt : 20; 1025 - u64 reserved_20_63 : 44; 1026 - #endif 1027 - } s; 1028 - }; 1029 - 1030 - static inline u64 ZIP_QUEX_DOORBELL(u64 param1) 1031 - { 1032 - if (param1 <= 7) 1033 - return 0x4000ull + (param1 & 7) * 0x8ull; 1034 - pr_err("ZIP_QUEX_DOORBELL: %llu\n", param1); 1035 - return 0; 1036 - } 1037 - 1038 - union zip_quex_err_ena_w1c { 1039 - u64 u_reg64; 1040 - struct zip_quex_err_ena_w1c_s { 1041 - #if defined(__BIG_ENDIAN_BITFIELD) 1042 - u64 reserved_5_63 : 59; 1043 - u64 mdbe : 1; 1044 - u64 nwrp : 1; 1045 - u64 nrrp : 1; 1046 - u64 irde : 1; 1047 - u64 dovf : 1; 1048 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1049 - u64 dovf : 1; 1050 - u64 irde : 1; 1051 - u64 nrrp : 1; 1052 - u64 nwrp : 1; 1053 - u64 mdbe : 1; 1054 - u64 reserved_5_63 : 59; 1055 - #endif 1056 - } s; 1057 - }; 1058 - 1059 - static inline u64 ZIP_QUEX_ERR_ENA_W1C(u64 param1) 1060 - { 1061 - if (param1 <= 7) 1062 - return 0x3600ull + (param1 & 7) * 0x8ull; 1063 - pr_err("ZIP_QUEX_ERR_ENA_W1C: %llu\n", param1); 1064 - return 0; 1065 - } 1066 - 1067 - union zip_quex_err_ena_w1s { 1068 - u64 u_reg64; 1069 - struct zip_quex_err_ena_w1s_s { 1070 - #if defined(__BIG_ENDIAN_BITFIELD) 1071 - u64 reserved_5_63 : 59; 1072 - u64 mdbe : 1; 1073 - u64 nwrp : 1; 1074 - u64 nrrp : 1; 1075 - u64 irde : 1; 1076 - u64 dovf : 1; 1077 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1078 - u64 dovf : 1; 1079 - u64 irde : 1; 1080 - u64 nrrp : 1; 1081 - u64 nwrp : 1; 1082 - u64 mdbe : 1; 1083 - u64 reserved_5_63 : 59; 1084 - #endif 1085 - } s; 1086 - }; 1087 - 1088 - static inline u64 ZIP_QUEX_ERR_ENA_W1S(u64 param1) 1089 - { 1090 - if (param1 <= 7) 1091 - return 0x3400ull + (param1 & 7) * 0x8ull; 1092 - pr_err("ZIP_QUEX_ERR_ENA_W1S: %llu\n", param1); 1093 - return 0; 1094 - } 1095 - 1096 - /** 1097 - * union zip_quex_err_int - Represents registers that contain the per-queue 1098 - * error interrupts. 1099 - */ 1100 - union zip_quex_err_int { 1101 - u64 u_reg64; 1102 - struct zip_quex_err_int_s { 1103 - #if defined(__BIG_ENDIAN_BITFIELD) 1104 - u64 reserved_5_63 : 59; 1105 - u64 mdbe : 1; 1106 - u64 nwrp : 1; 1107 - u64 nrrp : 1; 1108 - u64 irde : 1; 1109 - u64 dovf : 1; 1110 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1111 - u64 dovf : 1; 1112 - u64 irde : 1; 1113 - u64 nrrp : 1; 1114 - u64 nwrp : 1; 1115 - u64 mdbe : 1; 1116 - u64 reserved_5_63 : 59; 1117 - #endif 1118 - } s; 1119 - }; 1120 - 1121 - static inline u64 ZIP_QUEX_ERR_INT(u64 param1) 1122 - { 1123 - if (param1 <= 7) 1124 - return 0x3000ull + (param1 & 7) * 0x8ull; 1125 - pr_err("ZIP_QUEX_ERR_INT: %llu\n", param1); 1126 - return 0; 1127 - } 1128 - 1129 - /* NCB - zip_que#_err_int_w1s */ 1130 - union zip_quex_err_int_w1s { 1131 - u64 u_reg64; 1132 - struct zip_quex_err_int_w1s_s { 1133 - #if defined(__BIG_ENDIAN_BITFIELD) 1134 - u64 reserved_5_63 : 59; 1135 - u64 mdbe : 1; 1136 - u64 nwrp : 1; 1137 - u64 nrrp : 1; 1138 - u64 irde : 1; 1139 - u64 dovf : 1; 1140 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1141 - u64 dovf : 1; 1142 - u64 irde : 1; 1143 - u64 nrrp : 1; 1144 - u64 nwrp : 1; 1145 - u64 mdbe : 1; 1146 - u64 reserved_5_63 : 59; 1147 - #endif 1148 - } s; 1149 - }; 1150 - 1151 - static inline u64 ZIP_QUEX_ERR_INT_W1S(u64 param1) 1152 - { 1153 - if (param1 <= 7) 1154 - return 0x3200ull + (param1 & 7) * 0x8ull; 1155 - pr_err("ZIP_QUEX_ERR_INT_W1S: %llu\n", param1); 1156 - return 0; 1157 - } 1158 - 1159 - /** 1160 - * union zip_quex_gcfg - Represents the registers that reflect status of the 1161 - * zip instruction queues,debug use only. 1162 - */ 1163 - union zip_quex_gcfg { 1164 - u64 u_reg64; 1165 - struct zip_quex_gcfg_s { 1166 - #if defined(__BIG_ENDIAN_BITFIELD) 1167 - u64 reserved_4_63 : 60; 1168 - u64 iqb_ldwb : 1; 1169 - u64 cbw_sty : 1; 1170 - u64 l2ld_cmd : 2; 1171 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1172 - u64 l2ld_cmd : 2; 1173 - u64 cbw_sty : 1; 1174 - u64 iqb_ldwb : 1; 1175 - u64 reserved_4_63 : 60; 1176 - #endif 1177 - } s; 1178 - }; 1179 - 1180 - static inline u64 ZIP_QUEX_GCFG(u64 param1) 1181 - { 1182 - if (param1 <= 7) 1183 - return 0x1A00ull + (param1 & 7) * 0x8ull; 1184 - pr_err("ZIP_QUEX_GCFG: %llu\n", param1); 1185 - return 0; 1186 - } 1187 - 1188 - /** 1189 - * union zip_quex_map - Represents the registers that control how each 1190 - * instruction queue maps to zip cores. 1191 - */ 1192 - union zip_quex_map { 1193 - u64 u_reg64; 1194 - struct zip_quex_map_s { 1195 - #if defined(__BIG_ENDIAN_BITFIELD) 1196 - u64 reserved_2_63 : 62; 1197 - u64 zce : 2; 1198 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1199 - u64 zce : 2; 1200 - u64 reserved_2_63 : 62; 1201 - #endif 1202 - } s; 1203 - }; 1204 - 1205 - static inline u64 ZIP_QUEX_MAP(u64 param1) 1206 - { 1207 - if (param1 <= 7) 1208 - return 0x1400ull + (param1 & 7) * 0x8ull; 1209 - pr_err("ZIP_QUEX_MAP: %llu\n", param1); 1210 - return 0; 1211 - } 1212 - 1213 - /** 1214 - * union zip_quex_sbuf_addr - Represents the registers that set the buffer 1215 - * parameters for the instruction queues. 1216 - * 1217 - * When quiescent (i.e. outstanding doorbell count is 0), it is safe to rewrite 1218 - * this register to effectively reset the command buffer state machine. 1219 - * These registers must be programmed after SW programs the corresponding 1220 - * ZIP_QUE(0..7)_SBUF_CTL. 1221 - */ 1222 - union zip_quex_sbuf_addr { 1223 - u64 u_reg64; 1224 - struct zip_quex_sbuf_addr_s { 1225 - #if defined(__BIG_ENDIAN_BITFIELD) 1226 - u64 reserved_49_63 : 15; 1227 - u64 ptr : 42; 1228 - u64 off : 7; 1229 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1230 - u64 off : 7; 1231 - u64 ptr : 42; 1232 - u64 reserved_49_63 : 15; 1233 - #endif 1234 - } s; 1235 - }; 1236 - 1237 - static inline u64 ZIP_QUEX_SBUF_ADDR(u64 param1) 1238 - { 1239 - if (param1 <= 7) 1240 - return 0x1000ull + (param1 & 7) * 0x8ull; 1241 - pr_err("ZIP_QUEX_SBUF_ADDR: %llu\n", param1); 1242 - return 0; 1243 - } 1244 - 1245 - /** 1246 - * union zip_quex_sbuf_ctl - Represents the registers that set the buffer 1247 - * parameters for the instruction queues. 1248 - * 1249 - * When quiescent (i.e. outstanding doorbell count is 0), it is safe to rewrite 1250 - * this register to effectively reset the command buffer state machine. 1251 - * These registers must be programmed before SW programs the corresponding 1252 - * ZIP_QUE(0..7)_SBUF_ADDR. 1253 - */ 1254 - union zip_quex_sbuf_ctl { 1255 - u64 u_reg64; 1256 - struct zip_quex_sbuf_ctl_s { 1257 - #if defined(__BIG_ENDIAN_BITFIELD) 1258 - u64 reserved_45_63 : 19; 1259 - u64 size : 13; 1260 - u64 inst_be : 1; 1261 - u64 reserved_24_30 : 7; 1262 - u64 stream_id : 8; 1263 - u64 reserved_12_15 : 4; 1264 - u64 aura : 12; 1265 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1266 - u64 aura : 12; 1267 - u64 reserved_12_15 : 4; 1268 - u64 stream_id : 8; 1269 - u64 reserved_24_30 : 7; 1270 - u64 inst_be : 1; 1271 - u64 size : 13; 1272 - u64 reserved_45_63 : 19; 1273 - #endif 1274 - } s; 1275 - }; 1276 - 1277 - static inline u64 ZIP_QUEX_SBUF_CTL(u64 param1) 1278 - { 1279 - if (param1 <= 7) 1280 - return 0x1200ull + (param1 & 7) * 0x8ull; 1281 - pr_err("ZIP_QUEX_SBUF_CTL: %llu\n", param1); 1282 - return 0; 1283 - } 1284 - 1285 - /** 1286 - * union zip_que_ena - Represents queue enable register 1287 - * 1288 - * If a queue is disabled, ZIP_CTL stops fetching instructions from the queue. 1289 - */ 1290 - union zip_que_ena { 1291 - u64 u_reg64; 1292 - struct zip_que_ena_s { 1293 - #if defined(__BIG_ENDIAN_BITFIELD) 1294 - u64 reserved_8_63 : 56; 1295 - u64 ena : 8; 1296 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1297 - u64 ena : 8; 1298 - u64 reserved_8_63 : 56; 1299 - #endif 1300 - } s; 1301 - }; 1302 - 1303 - #define ZIP_QUE_ENA 0x0500ull 1304 - 1305 - /** 1306 - * union zip_que_pri - Represents the register that defines the priority 1307 - * between instruction queues. 1308 - */ 1309 - union zip_que_pri { 1310 - u64 u_reg64; 1311 - struct zip_que_pri_s { 1312 - #if defined(__BIG_ENDIAN_BITFIELD) 1313 - u64 reserved_8_63 : 56; 1314 - u64 pri : 8; 1315 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1316 - u64 pri : 8; 1317 - u64 reserved_8_63 : 56; 1318 - #endif 1319 - } s; 1320 - }; 1321 - 1322 - #define ZIP_QUE_PRI 0x0508ull 1323 - 1324 - /** 1325 - * union zip_throttle - Represents the register that controls the maximum 1326 - * number of in-flight X2I data fetch transactions. 1327 - * 1328 - * Writing 0 to this register causes the ZIP module to temporarily suspend NCB 1329 - * accesses; it is not recommended for normal operation, but may be useful for 1330 - * diagnostics. 1331 - */ 1332 - union zip_throttle { 1333 - u64 u_reg64; 1334 - struct zip_throttle_s { 1335 - #if defined(__BIG_ENDIAN_BITFIELD) 1336 - u64 reserved_6_63 : 58; 1337 - u64 ld_infl : 6; 1338 - #elif defined(__LITTLE_ENDIAN_BITFIELD) 1339 - u64 ld_infl : 6; 1340 - u64 reserved_6_63 : 58; 1341 - #endif 1342 - } s; 1343 - }; 1344 - 1345 - #define ZIP_THROTTLE 0x0010ull 1346 - 1347 - #endif /* _CSRS_ZIP__ */