···530530source "drivers/crypto/marvell/Kconfig"531531source "drivers/crypto/intel/Kconfig"532532533533-config CRYPTO_DEV_CAVIUM_ZIP534534- tristate "Cavium ZIP driver"535535- depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)536536- help537537- Select this option if you want to enable compression/decompression538538- acceleration on Cavium's ARM based SoCs539539-540533config CRYPTO_DEV_QCE541534 tristate "Qualcomm crypto engine accelerator"542535 depends on ARCH_QCOM || COMPILE_TEST
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __COMMON_H__4747-#define __COMMON_H__4848-4949-#include <linux/delay.h>5050-#include <linux/init.h>5151-#include <linux/interrupt.h>5252-#include <linux/io.h>5353-#include <linux/kernel.h>5454-#include <linux/module.h>5555-#include <linux/pci.h>5656-#include <linux/seq_file.h>5757-#include <linux/string.h>5858-#include <linux/types.h>5959-6060-/* Device specific zlib function definitions */6161-#include "zip_device.h"6262-6363-/* ZIP device definitions */6464-#include "zip_main.h"6565-6666-/* ZIP memory allocation/deallocation related definitions */6767-#include "zip_mem.h"6868-6969-/* Device specific structure definitions */7070-#include "zip_regs.h"7171-7272-#define ZIP_ERROR -17373-7474-#define ZIP_FLUSH_FINISH 47575-7676-#define RAW_FORMAT 0 /* for rawpipe */7777-#define ZLIB_FORMAT 1 /* for zpipe */7878-#define GZIP_FORMAT 2 /* for gzpipe */7979-#define LZS_FORMAT 3 /* for lzspipe */8080-8181-/* Max number of ZIP devices supported */8282-#define MAX_ZIP_DEVICES 28383-8484-/* Configures the number of zip queues to be used */8585-#define ZIP_NUM_QUEUES 28686-8787-#define DYNAMIC_STOP_EXCESS 10248888-8989-/* Maximum buffer sizes in direct mode */9090-#define MAX_INPUT_BUFFER_SIZE (64 * 1024)9191-#define MAX_OUTPUT_BUFFER_SIZE (64 * 1024)9292-9393-/**9494- * struct zip_operation - common data structure for comp and decomp operations9595- * @input: Next input byte is read from here9696- * @output: Next output byte written here9797- * @ctx_addr: Inflate context buffer address9898- * @history: Pointer to the history buffer9999- * @input_len: Number of bytes available at next_in100100- * @input_total_len: Total number of input bytes read101101- * @output_len: Remaining free space at next_out102102- * @output_total_len: Total number of bytes output so far103103- * @csum: Checksum value of the uncompressed data104104- * @flush: Flush flag105105- * @format: Format (depends on stream's wrap)106106- * @speed: Speed depends on stream's level107107- * @ccode: Compression code ( stream's strategy)108108- * @lzs_flag: Flag for LZS support109109- * @begin_file: Beginning of file indication for inflate110110- * @history_len: Size of the history data111111- * @end_file: Ending of the file indication for inflate112112- * @compcode: Completion status of the ZIP invocation113113- * @bytes_read: Input bytes read in current instruction114114- * @bits_processed: Total bits processed for entire file115115- * @sizeofptr: To distinguish between ILP32 and LP64116116- * @sizeofzops: Optional just for padding117117- *118118- * This structure is used to maintain the required meta data for the119119- * comp and decomp operations.120120- */121121-struct zip_operation {122122- u8 *input;123123- u8 *output;124124- u64 ctx_addr;125125- u64 history;126126-127127- u32 input_len;128128- u32 input_total_len;129129-130130- u32 output_len;131131- u32 output_total_len;132132-133133- u32 csum;134134- u32 flush;135135-136136- u32 format;137137- u32 speed;138138- u32 ccode;139139- u32 lzs_flag;140140-141141- u32 begin_file;142142- u32 history_len;143143-144144- u32 end_file;145145- u32 compcode;146146- u32 bytes_read;147147- u32 bits_processed;148148-149149- u32 sizeofptr;150150- u32 sizeofzops;151151-};152152-153153-static inline int zip_poll_result(union zip_zres_s *result)154154-{155155- int retries = 1000;156156-157157- while (!result->s.compcode) {158158- if (!--retries) {159159- pr_err("ZIP ERR: request timed out");160160- return -ETIMEDOUT;161161- }162162- udelay(10);163163- /*164164- * Force re-reading of compcode which is updated165165- * by the ZIP coprocessor.166166- */167167- rmb();168168- }169169- return 0;170170-}171171-172172-/* error messages */173173-#define zip_err(fmt, args...) pr_err("ZIP ERR:%s():%d: " \174174- fmt "\n", __func__, __LINE__, ## args)175175-176176-#ifdef MSG_ENABLE177177-/* Enable all messages */178178-#define zip_msg(fmt, args...) pr_info("ZIP_MSG:" fmt "\n", ## args)179179-#else180180-#define zip_msg(fmt, args...)181181-#endif182182-183183-#if defined(ZIP_DEBUG_ENABLE) && defined(MSG_ENABLE)184184-185185-#ifdef DEBUG_LEVEL186186-187187-#define FILE_NAME (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : \188188- strrchr(__FILE__, '\\') ? strrchr(__FILE__, '\\') + 1 : __FILE__)189189-190190-#if DEBUG_LEVEL >= 4191191-192192-#define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s: %s() : %d: " \193193- fmt "\n", FILE_NAME, __func__, __LINE__, ## args)194194-195195-#elif DEBUG_LEVEL >= 3196196-197197-#define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s: %s() : %d: " \198198- fmt "\n", FILE_NAME, __func__, __LINE__, ## args)199199-200200-#elif DEBUG_LEVEL >= 2201201-202202-#define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s() : %d: " \203203- fmt "\n", __func__, __LINE__, ## args)204204-205205-#else206206-207207-#define zip_dbg(fmt, args...) pr_info("ZIP DBG:" fmt "\n", ## args)208208-209209-#endif /* DEBUG LEVEL >=4 */210210-211211-#else212212-213213-#define zip_dbg(fmt, args...) pr_info("ZIP DBG:" fmt "\n", ## args)214214-215215-#endif /* DEBUG_LEVEL */216216-#else217217-218218-#define zip_dbg(fmt, args...)219219-220220-#endif /* ZIP_DEBUG_ENABLE && MSG_ENABLE*/221221-222222-#endif
-261
drivers/crypto/cavium/zip/zip_crypto.c
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#include "zip_crypto.h"4747-4848-static void zip_static_init_zip_ops(struct zip_operation *zip_ops,4949- int lzs_flag)5050-{5151- zip_ops->flush = ZIP_FLUSH_FINISH;5252-5353- /* equivalent to level 6 of opensource zlib */5454- zip_ops->speed = 1;5555-5656- if (!lzs_flag) {5757- zip_ops->ccode = 0; /* Auto Huffman */5858- zip_ops->lzs_flag = 0;5959- zip_ops->format = ZLIB_FORMAT;6060- } else {6161- zip_ops->ccode = 3; /* LZS Encoding */6262- zip_ops->lzs_flag = 1;6363- zip_ops->format = LZS_FORMAT;6464- }6565- zip_ops->begin_file = 1;6666- zip_ops->history_len = 0;6767- zip_ops->end_file = 1;6868- zip_ops->compcode = 0;6969- zip_ops->csum = 1; /* Adler checksum desired */7070-}7171-7272-static int zip_ctx_init(struct zip_kernel_ctx *zip_ctx, int lzs_flag)7373-{7474- struct zip_operation *comp_ctx = &zip_ctx->zip_comp;7575- struct zip_operation *decomp_ctx = &zip_ctx->zip_decomp;7676-7777- zip_static_init_zip_ops(comp_ctx, lzs_flag);7878- zip_static_init_zip_ops(decomp_ctx, lzs_flag);7979-8080- comp_ctx->input = zip_data_buf_alloc(MAX_INPUT_BUFFER_SIZE);8181- if (!comp_ctx->input)8282- return -ENOMEM;8383-8484- comp_ctx->output = zip_data_buf_alloc(MAX_OUTPUT_BUFFER_SIZE);8585- if (!comp_ctx->output)8686- goto err_comp_input;8787-8888- decomp_ctx->input = zip_data_buf_alloc(MAX_INPUT_BUFFER_SIZE);8989- if (!decomp_ctx->input)9090- goto err_comp_output;9191-9292- decomp_ctx->output = zip_data_buf_alloc(MAX_OUTPUT_BUFFER_SIZE);9393- if (!decomp_ctx->output)9494- goto err_decomp_input;9595-9696- return 0;9797-9898-err_decomp_input:9999- zip_data_buf_free(decomp_ctx->input, MAX_INPUT_BUFFER_SIZE);100100-101101-err_comp_output:102102- zip_data_buf_free(comp_ctx->output, MAX_OUTPUT_BUFFER_SIZE);103103-104104-err_comp_input:105105- zip_data_buf_free(comp_ctx->input, MAX_INPUT_BUFFER_SIZE);106106-107107- return -ENOMEM;108108-}109109-110110-static void zip_ctx_exit(struct zip_kernel_ctx *zip_ctx)111111-{112112- struct zip_operation *comp_ctx = &zip_ctx->zip_comp;113113- struct zip_operation *dec_ctx = &zip_ctx->zip_decomp;114114-115115- zip_data_buf_free(comp_ctx->input, MAX_INPUT_BUFFER_SIZE);116116- zip_data_buf_free(comp_ctx->output, MAX_OUTPUT_BUFFER_SIZE);117117-118118- zip_data_buf_free(dec_ctx->input, MAX_INPUT_BUFFER_SIZE);119119- zip_data_buf_free(dec_ctx->output, MAX_OUTPUT_BUFFER_SIZE);120120-}121121-122122-static int zip_compress(const u8 *src, unsigned int slen,123123- u8 *dst, unsigned int *dlen,124124- struct zip_kernel_ctx *zip_ctx)125125-{126126- struct zip_operation *zip_ops = NULL;127127- struct zip_state *zip_state;128128- struct zip_device *zip = NULL;129129- int ret;130130-131131- if (!zip_ctx || !src || !dst || !dlen)132132- return -ENOMEM;133133-134134- zip = zip_get_device(zip_get_node_id());135135- if (!zip)136136- return -ENODEV;137137-138138- zip_state = kzalloc(sizeof(*zip_state), GFP_ATOMIC);139139- if (!zip_state)140140- return -ENOMEM;141141-142142- zip_ops = &zip_ctx->zip_comp;143143-144144- zip_ops->input_len = slen;145145- zip_ops->output_len = *dlen;146146- memcpy(zip_ops->input, src, slen);147147-148148- ret = zip_deflate(zip_ops, zip_state, zip);149149-150150- if (!ret) {151151- *dlen = zip_ops->output_len;152152- memcpy(dst, zip_ops->output, *dlen);153153- }154154- kfree(zip_state);155155- return ret;156156-}157157-158158-static int zip_decompress(const u8 *src, unsigned int slen,159159- u8 *dst, unsigned int *dlen,160160- struct zip_kernel_ctx *zip_ctx)161161-{162162- struct zip_operation *zip_ops = NULL;163163- struct zip_state *zip_state;164164- struct zip_device *zip = NULL;165165- int ret;166166-167167- if (!zip_ctx || !src || !dst || !dlen)168168- return -ENOMEM;169169-170170- zip = zip_get_device(zip_get_node_id());171171- if (!zip)172172- return -ENODEV;173173-174174- zip_state = kzalloc(sizeof(*zip_state), GFP_ATOMIC);175175- if (!zip_state)176176- return -ENOMEM;177177-178178- zip_ops = &zip_ctx->zip_decomp;179179- memcpy(zip_ops->input, src, slen);180180-181181- /* Work around for a bug in zlib which needs an extra bytes sometimes */182182- if (zip_ops->ccode != 3) /* Not LZS Encoding */183183- zip_ops->input[slen++] = 0;184184-185185- zip_ops->input_len = slen;186186- zip_ops->output_len = *dlen;187187-188188- ret = zip_inflate(zip_ops, zip_state, zip);189189-190190- if (!ret) {191191- *dlen = zip_ops->output_len;192192- memcpy(dst, zip_ops->output, *dlen);193193- }194194- kfree(zip_state);195195- return ret;196196-}197197-198198-/* SCOMP framework start */199199-void *zip_alloc_scomp_ctx_deflate(void)200200-{201201- int ret;202202- struct zip_kernel_ctx *zip_ctx;203203-204204- zip_ctx = kzalloc(sizeof(*zip_ctx), GFP_KERNEL);205205- if (!zip_ctx)206206- return ERR_PTR(-ENOMEM);207207-208208- ret = zip_ctx_init(zip_ctx, 0);209209-210210- if (ret) {211211- kfree_sensitive(zip_ctx);212212- return ERR_PTR(ret);213213- }214214-215215- return zip_ctx;216216-}217217-218218-void *zip_alloc_scomp_ctx_lzs(void)219219-{220220- int ret;221221- struct zip_kernel_ctx *zip_ctx;222222-223223- zip_ctx = kzalloc(sizeof(*zip_ctx), GFP_KERNEL);224224- if (!zip_ctx)225225- return ERR_PTR(-ENOMEM);226226-227227- ret = zip_ctx_init(zip_ctx, 1);228228-229229- if (ret) {230230- kfree_sensitive(zip_ctx);231231- return ERR_PTR(ret);232232- }233233-234234- return zip_ctx;235235-}236236-237237-void zip_free_scomp_ctx(void *ctx)238238-{239239- struct zip_kernel_ctx *zip_ctx = ctx;240240-241241- zip_ctx_exit(zip_ctx);242242- kfree_sensitive(zip_ctx);243243-}244244-245245-int zip_scomp_compress(struct crypto_scomp *tfm,246246- const u8 *src, unsigned int slen,247247- u8 *dst, unsigned int *dlen, void *ctx)248248-{249249- struct zip_kernel_ctx *zip_ctx = ctx;250250-251251- return zip_compress(src, slen, dst, dlen, zip_ctx);252252-}253253-254254-int zip_scomp_decompress(struct crypto_scomp *tfm,255255- const u8 *src, unsigned int slen,256256- u8 *dst, unsigned int *dlen, void *ctx)257257-{258258- struct zip_kernel_ctx *zip_ctx = ctx;259259-260260- return zip_decompress(src, slen, dst, dlen, zip_ctx);261261-} /* SCOMP framework end */
-68
drivers/crypto/cavium/zip/zip_crypto.h
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __ZIP_CRYPTO_H__4747-#define __ZIP_CRYPTO_H__4848-4949-#include <crypto/internal/scompress.h>5050-#include "common.h"5151-#include "zip_deflate.h"5252-#include "zip_inflate.h"5353-5454-struct zip_kernel_ctx {5555- struct zip_operation zip_comp;5656- struct zip_operation zip_decomp;5757-};5858-5959-void *zip_alloc_scomp_ctx_deflate(void);6060-void *zip_alloc_scomp_ctx_lzs(void);6161-void zip_free_scomp_ctx(void *zip_ctx);6262-int zip_scomp_compress(struct crypto_scomp *tfm,6363- const u8 *src, unsigned int slen,6464- u8 *dst, unsigned int *dlen, void *ctx);6565-int zip_scomp_decompress(struct crypto_scomp *tfm,6666- const u8 *src, unsigned int slen,6767- u8 *dst, unsigned int *dlen, void *ctx);6868-#endif
-200
drivers/crypto/cavium/zip/zip_deflate.c
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#include <linux/delay.h>4747-#include <linux/sched.h>4848-4949-#include "common.h"5050-#include "zip_deflate.h"5151-5252-/* Prepares the deflate zip command */5353-static int prepare_zip_command(struct zip_operation *zip_ops,5454- struct zip_state *s, union zip_inst_s *zip_cmd)5555-{5656- union zip_zres_s *result_ptr = &s->result;5757-5858- memset(zip_cmd, 0, sizeof(s->zip_cmd));5959- memset(result_ptr, 0, sizeof(s->result));6060-6161- /* IWORD #0 */6262- /* History gather */6363- zip_cmd->s.hg = 0;6464- /* compression enable = 1 for deflate */6565- zip_cmd->s.ce = 1;6666- /* sf (sync flush) */6767- zip_cmd->s.sf = 1;6868- /* ef (end of file) */6969- if (zip_ops->flush == ZIP_FLUSH_FINISH) {7070- zip_cmd->s.ef = 1;7171- zip_cmd->s.sf = 0;7272- }7373-7474- zip_cmd->s.cc = zip_ops->ccode;7575- /* ss (compression speed/storage) */7676- zip_cmd->s.ss = zip_ops->speed;7777-7878- /* IWORD #1 */7979- /* adler checksum */8080- zip_cmd->s.adlercrc32 = zip_ops->csum;8181- zip_cmd->s.historylength = zip_ops->history_len;8282- zip_cmd->s.dg = 0;8383-8484- /* IWORD # 6 and 7 - compression input/history pointer */8585- zip_cmd->s.inp_ptr_addr.s.addr = __pa(zip_ops->input);8686- zip_cmd->s.inp_ptr_ctl.s.length = (zip_ops->input_len +8787- zip_ops->history_len);8888- zip_cmd->s.ds = 0;8989-9090- /* IWORD # 8 and 9 - Output pointer */9191- zip_cmd->s.out_ptr_addr.s.addr = __pa(zip_ops->output);9292- zip_cmd->s.out_ptr_ctl.s.length = zip_ops->output_len;9393- /* maximum number of output-stream bytes that can be written */9494- zip_cmd->s.totaloutputlength = zip_ops->output_len;9595-9696- /* IWORD # 10 and 11 - Result pointer */9797- zip_cmd->s.res_ptr_addr.s.addr = __pa(result_ptr);9898- /* Clearing completion code */9999- result_ptr->s.compcode = 0;100100-101101- return 0;102102-}103103-104104-/**105105- * zip_deflate - API to offload deflate operation to hardware106106- * @zip_ops: Pointer to zip operation structure107107- * @s: Pointer to the structure representing zip state108108- * @zip_dev: Pointer to zip device structure109109- *110110- * This function prepares the zip deflate command and submits it to the zip111111- * engine for processing.112112- *113113- * Return: 0 if successful or error code114114- */115115-int zip_deflate(struct zip_operation *zip_ops, struct zip_state *s,116116- struct zip_device *zip_dev)117117-{118118- union zip_inst_s *zip_cmd = &s->zip_cmd;119119- union zip_zres_s *result_ptr = &s->result;120120- u32 queue;121121-122122- /* Prepares zip command based on the input parameters */123123- prepare_zip_command(zip_ops, s, zip_cmd);124124-125125- atomic64_add(zip_ops->input_len, &zip_dev->stats.comp_in_bytes);126126- /* Loads zip command into command queues and rings door bell */127127- queue = zip_load_instr(zip_cmd, zip_dev);128128-129129- /* Stats update for compression requests submitted */130130- atomic64_inc(&zip_dev->stats.comp_req_submit);131131-132132- /* Wait for completion or error */133133- zip_poll_result(result_ptr);134134-135135- /* Stats update for compression requests completed */136136- atomic64_inc(&zip_dev->stats.comp_req_complete);137137-138138- zip_ops->compcode = result_ptr->s.compcode;139139- switch (zip_ops->compcode) {140140- case ZIP_CMD_NOTDONE:141141- zip_dbg("Zip instruction not yet completed");142142- return ZIP_ERROR;143143-144144- case ZIP_CMD_SUCCESS:145145- zip_dbg("Zip instruction completed successfully");146146- zip_update_cmd_bufs(zip_dev, queue);147147- break;148148-149149- case ZIP_CMD_DTRUNC:150150- zip_dbg("Output Truncate error");151151- /* Returning ZIP_ERROR to avoid copy to user */152152- return ZIP_ERROR;153153-154154- default:155155- zip_err("Zip instruction failed. Code:%d", zip_ops->compcode);156156- return ZIP_ERROR;157157- }158158-159159- /* Update the CRC depending on the format */160160- switch (zip_ops->format) {161161- case RAW_FORMAT:162162- zip_dbg("RAW Format: %d ", zip_ops->format);163163- /* Get checksum from engine, need to feed it again */164164- zip_ops->csum = result_ptr->s.adler32;165165- break;166166-167167- case ZLIB_FORMAT:168168- zip_dbg("ZLIB Format: %d ", zip_ops->format);169169- zip_ops->csum = result_ptr->s.adler32;170170- break;171171-172172- case GZIP_FORMAT:173173- zip_dbg("GZIP Format: %d ", zip_ops->format);174174- zip_ops->csum = result_ptr->s.crc32;175175- break;176176-177177- case LZS_FORMAT:178178- zip_dbg("LZS Format: %d ", zip_ops->format);179179- break;180180-181181- default:182182- zip_err("Unknown Format:%d\n", zip_ops->format);183183- }184184-185185- atomic64_add(result_ptr->s.totalbyteswritten,186186- &zip_dev->stats.comp_out_bytes);187187-188188- /* Update output_len */189189- if (zip_ops->output_len < result_ptr->s.totalbyteswritten) {190190- /* Dynamic stop && strm->output_len < zipconstants[onfsize] */191191- zip_err("output_len (%d) < total bytes written(%d)\n",192192- zip_ops->output_len, result_ptr->s.totalbyteswritten);193193- zip_ops->output_len = 0;194194-195195- } else {196196- zip_ops->output_len = result_ptr->s.totalbyteswritten;197197- }198198-199199- return 0;200200-}
-62
drivers/crypto/cavium/zip/zip_deflate.h
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __ZIP_DEFLATE_H__4747-#define __ZIP_DEFLATE_H__4848-4949-/**5050- * zip_deflate - API to offload deflate operation to hardware5151- * @zip_ops: Pointer to zip operation structure5252- * @s: Pointer to the structure representing zip state5353- * @zip_dev: Pointer to the structure representing zip device5454- *5555- * This function prepares the zip deflate command and submits it to the zip5656- * engine by ringing the doorbell.5757- *5858- * Return: 0 if successful or error code5959- */6060-int zip_deflate(struct zip_operation *zip_ops, struct zip_state *s,6161- struct zip_device *zip_dev);6262-#endif
-202
drivers/crypto/cavium/zip/zip_device.c
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#include "common.h"4747-#include "zip_deflate.h"4848-4949-/**5050- * zip_cmd_queue_consumed - Calculates the space consumed in the command queue.5151- *5252- * @zip_dev: Pointer to zip device structure5353- * @queue: Queue number5454- *5555- * Return: Bytes consumed in the command queue buffer.5656- */5757-static inline u32 zip_cmd_queue_consumed(struct zip_device *zip_dev, int queue)5858-{5959- return ((zip_dev->iq[queue].sw_head - zip_dev->iq[queue].sw_tail) *6060- sizeof(u64 *));6161-}6262-6363-/**6464- * zip_load_instr - Submits the instruction into the ZIP command queue6565- * @instr: Pointer to the instruction to be submitted6666- * @zip_dev: Pointer to ZIP device structure to which the instruction is to6767- * be submitted6868- *6969- * This function copies the ZIP instruction to the command queue and rings the7070- * doorbell to notify the engine of the instruction submission. The command7171- * queue is maintained in a circular fashion. When there is space for exactly7272- * one instruction in the queue, next chunk pointer of the queue is made to7373- * point to the head of the queue, thus maintaining a circular queue.7474- *7575- * Return: Queue number to which the instruction was submitted7676- */7777-u32 zip_load_instr(union zip_inst_s *instr,7878- struct zip_device *zip_dev)7979-{8080- union zip_quex_doorbell dbell;8181- u32 queue = 0;8282- u32 consumed = 0;8383- u64 *ncb_ptr = NULL;8484- union zip_nptr_s ncp;8585-8686- /*8787- * Distribute the instructions between the enabled queues based on8888- * the CPU id.8989- */9090- if (raw_smp_processor_id() % 2 == 0)9191- queue = 0;9292- else9393- queue = 1;9494-9595- zip_dbg("CPU Core: %d Queue number:%d", raw_smp_processor_id(), queue);9696-9797- /* Take cmd buffer lock */9898- spin_lock(&zip_dev->iq[queue].lock);9999-100100- /*101101- * Command Queue implementation102102- * 1. If there is place for new instructions, push the cmd at sw_head.103103- * 2. If there is place for exactly one instruction, push the new cmd104104- * at the sw_head. Make sw_head point to the sw_tail to make it105105- * circular. Write sw_head's physical address to the "Next-Chunk106106- * Buffer Ptr" to make it cmd_hw_tail.107107- * 3. Ring the door bell.108108- */109109- zip_dbg("sw_head : %lx", zip_dev->iq[queue].sw_head);110110- zip_dbg("sw_tail : %lx", zip_dev->iq[queue].sw_tail);111111-112112- consumed = zip_cmd_queue_consumed(zip_dev, queue);113113- /* Check if there is space to push just one cmd */114114- if ((consumed + 128) == (ZIP_CMD_QBUF_SIZE - 8)) {115115- zip_dbg("Cmd queue space available for single command");116116- /* Space for one cmd, pust it and make it circular queue */117117- memcpy((u8 *)zip_dev->iq[queue].sw_head, (u8 *)instr,118118- sizeof(union zip_inst_s));119119- zip_dev->iq[queue].sw_head += 16; /* 16 64_bit words = 128B */120120-121121- /* Now, point the "Next-Chunk Buffer Ptr" to sw_head */122122- ncb_ptr = zip_dev->iq[queue].sw_head;123123-124124- zip_dbg("ncb addr :0x%lx sw_head addr :0x%lx",125125- ncb_ptr, zip_dev->iq[queue].sw_head - 16);126126-127127- /* Using Circular command queue */128128- zip_dev->iq[queue].sw_head = zip_dev->iq[queue].sw_tail;129129- /* Mark this buffer for free */130130- zip_dev->iq[queue].free_flag = 1;131131-132132- /* Write new chunk buffer address at "Next-Chunk Buffer Ptr" */133133- ncp.u_reg64 = 0ull;134134- ncp.s.addr = __pa(zip_dev->iq[queue].sw_head);135135- *ncb_ptr = ncp.u_reg64;136136- zip_dbg("*ncb_ptr :0x%lx sw_head[phys] :0x%lx",137137- *ncb_ptr, __pa(zip_dev->iq[queue].sw_head));138138-139139- zip_dev->iq[queue].pend_cnt++;140140-141141- } else {142142- zip_dbg("Enough space is available for commands");143143- /* Push this cmd to cmd queue buffer */144144- memcpy((u8 *)zip_dev->iq[queue].sw_head, (u8 *)instr,145145- sizeof(union zip_inst_s));146146- zip_dev->iq[queue].sw_head += 16; /* 16 64_bit words = 128B */147147-148148- zip_dev->iq[queue].pend_cnt++;149149- }150150- zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx",151151- zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail,152152- zip_dev->iq[queue].hw_tail);153153-154154- zip_dbg(" Pushed the new cmd : pend_cnt : %d",155155- zip_dev->iq[queue].pend_cnt);156156-157157- /* Ring the doorbell */158158- dbell.u_reg64 = 0ull;159159- dbell.s.dbell_cnt = 1;160160- zip_reg_write(dbell.u_reg64,161161- (zip_dev->reg_base + ZIP_QUEX_DOORBELL(queue)));162162-163163- /* Unlock cmd buffer lock */164164- spin_unlock(&zip_dev->iq[queue].lock);165165-166166- return queue;167167-}168168-169169-/**170170- * zip_update_cmd_bufs - Updates the queue statistics after posting the171171- * instruction172172- * @zip_dev: Pointer to zip device structure173173- * @queue: Queue number174174- */175175-void zip_update_cmd_bufs(struct zip_device *zip_dev, u32 queue)176176-{177177- /* Take cmd buffer lock */178178- spin_lock(&zip_dev->iq[queue].lock);179179-180180- /* Check if the previous buffer can be freed */181181- if (zip_dev->iq[queue].free_flag == 1) {182182- zip_dbg("Free flag. Free cmd buffer, adjust sw head and tail");183183- /* Reset the free flag */184184- zip_dev->iq[queue].free_flag = 0;185185-186186- /* Point the hw_tail to start of the new chunk buffer */187187- zip_dev->iq[queue].hw_tail = zip_dev->iq[queue].sw_head;188188- } else {189189- zip_dbg("Free flag not set. increment hw tail");190190- zip_dev->iq[queue].hw_tail += 16; /* 16 64_bit words = 128B */191191- }192192-193193- zip_dev->iq[queue].done_cnt++;194194- zip_dev->iq[queue].pend_cnt--;195195-196196- zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx",197197- zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail,198198- zip_dev->iq[queue].hw_tail);199199- zip_dbg(" Got CC : pend_cnt : %d\n", zip_dev->iq[queue].pend_cnt);200200-201201- spin_unlock(&zip_dev->iq[queue].lock);202202-}
-108
drivers/crypto/cavium/zip/zip_device.h
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __ZIP_DEVICE_H__4747-#define __ZIP_DEVICE_H__4848-4949-#include <linux/types.h>5050-#include "zip_main.h"5151-5252-struct sg_info {5353- /*5454- * Pointer to the input data when scatter_gather == 0 and5555- * pointer to the input gather list buffer when scatter_gather == 15656- */5757- union zip_zptr_s *gather;5858-5959- /*6060- * Pointer to the output data when scatter_gather == 0 and6161- * pointer to the output scatter list buffer when scatter_gather == 16262- */6363- union zip_zptr_s *scatter;6464-6565- /*6666- * Holds size of the output buffer pointed by scatter list6767- * when scatter_gather == 16868- */6969- u64 scatter_buf_size;7070-7171- /* for gather data */7272- u64 gather_enable;7373-7474- /* for scatter data */7575- u64 scatter_enable;7676-7777- /* Number of gather list pointers for gather data */7878- u32 gbuf_cnt;7979-8080- /* Number of scatter list pointers for scatter data */8181- u32 sbuf_cnt;8282-8383- /* Buffers allocation state */8484- u8 alloc_state;8585-};8686-8787-/**8888- * struct zip_state - Structure representing the required information related8989- * to a command9090- * @zip_cmd: Pointer to zip instruction structure9191- * @result: Pointer to zip result structure9292- * @ctx: Context pointer for inflate9393- * @history: Decompression history pointer9494- * @sginfo: Scatter-gather info structure9595- */9696-struct zip_state {9797- union zip_inst_s zip_cmd;9898- union zip_zres_s result;9999- union zip_zptr_s *ctx;100100- union zip_zptr_s *history;101101- struct sg_info sginfo;102102-};103103-104104-#define ZIP_CONTEXT_SIZE 2048105105-#define ZIP_INFLATE_HISTORY_SIZE 32768106106-#define ZIP_DEFLATE_HISTORY_SIZE 32768107107-108108-#endif
-223
drivers/crypto/cavium/zip/zip_inflate.c
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#include <linux/delay.h>4747-#include <linux/sched.h>4848-4949-#include "common.h"5050-#include "zip_inflate.h"5151-5252-static int prepare_inflate_zcmd(struct zip_operation *zip_ops,5353- struct zip_state *s, union zip_inst_s *zip_cmd)5454-{5555- union zip_zres_s *result_ptr = &s->result;5656-5757- memset(zip_cmd, 0, sizeof(s->zip_cmd));5858- memset(result_ptr, 0, sizeof(s->result));5959-6060- /* IWORD#0 */6161-6262- /* Decompression History Gather list - no gather list */6363- zip_cmd->s.hg = 0;6464- /* For decompression, CE must be 0x0. */6565- zip_cmd->s.ce = 0;6666- /* For decompression, SS must be 0x0. */6767- zip_cmd->s.ss = 0;6868- /* For decompression, SF should always be set. */6969- zip_cmd->s.sf = 1;7070-7171- /* Begin File */7272- if (zip_ops->begin_file == 0)7373- zip_cmd->s.bf = 0;7474- else7575- zip_cmd->s.bf = 1;7676-7777- zip_cmd->s.ef = 1;7878- /* 0: for Deflate decompression, 3: for LZS decompression */7979- zip_cmd->s.cc = zip_ops->ccode;8080-8181- /* IWORD #1*/8282-8383- /* adler checksum */8484- zip_cmd->s.adlercrc32 = zip_ops->csum;8585-8686- /*8787- * HISTORYLENGTH must be 0x0 for any ZIP decompress operation.8888- * History data is added to a decompression operation via IWORD3.8989- */9090- zip_cmd->s.historylength = 0;9191- zip_cmd->s.ds = 0;9292-9393- /* IWORD # 8 and 9 - Output pointer */9494- zip_cmd->s.out_ptr_addr.s.addr = __pa(zip_ops->output);9595- zip_cmd->s.out_ptr_ctl.s.length = zip_ops->output_len;9696-9797- /* Maximum number of output-stream bytes that can be written */9898- zip_cmd->s.totaloutputlength = zip_ops->output_len;9999-100100- zip_dbg("Data Direct Input case ");101101-102102- /* IWORD # 6 and 7 - input pointer */103103- zip_cmd->s.dg = 0;104104- zip_cmd->s.inp_ptr_addr.s.addr = __pa((u8 *)zip_ops->input);105105- zip_cmd->s.inp_ptr_ctl.s.length = zip_ops->input_len;106106-107107- /* IWORD # 10 and 11 - Result pointer */108108- zip_cmd->s.res_ptr_addr.s.addr = __pa(result_ptr);109109-110110- /* Clearing completion code */111111- result_ptr->s.compcode = 0;112112-113113- /* Returning 0 for time being.*/114114- return 0;115115-}116116-117117-/**118118- * zip_inflate - API to offload inflate operation to hardware119119- * @zip_ops: Pointer to zip operation structure120120- * @s: Pointer to the structure representing zip state121121- * @zip_dev: Pointer to zip device structure122122- *123123- * This function prepares the zip inflate command and submits it to the zip124124- * engine for processing.125125- *126126- * Return: 0 if successful or error code127127- */128128-int zip_inflate(struct zip_operation *zip_ops, struct zip_state *s,129129- struct zip_device *zip_dev)130130-{131131- union zip_inst_s *zip_cmd = &s->zip_cmd;132132- union zip_zres_s *result_ptr = &s->result;133133- u32 queue;134134-135135- /* Prepare inflate zip command */136136- prepare_inflate_zcmd(zip_ops, s, zip_cmd);137137-138138- atomic64_add(zip_ops->input_len, &zip_dev->stats.decomp_in_bytes);139139-140140- /* Load inflate command to zip queue and ring the doorbell */141141- queue = zip_load_instr(zip_cmd, zip_dev);142142-143143- /* Decompression requests submitted stats update */144144- atomic64_inc(&zip_dev->stats.decomp_req_submit);145145-146146- /* Wait for completion or error */147147- zip_poll_result(result_ptr);148148-149149- /* Decompression requests completed stats update */150150- atomic64_inc(&zip_dev->stats.decomp_req_complete);151151-152152- zip_ops->compcode = result_ptr->s.compcode;153153- switch (zip_ops->compcode) {154154- case ZIP_CMD_NOTDONE:155155- zip_dbg("Zip Instruction not yet completed\n");156156- return ZIP_ERROR;157157-158158- case ZIP_CMD_SUCCESS:159159- zip_dbg("Zip Instruction completed successfully\n");160160- break;161161-162162- case ZIP_CMD_DYNAMIC_STOP:163163- zip_dbg(" Dynamic stop Initiated\n");164164- break;165165-166166- default:167167- zip_dbg("Instruction failed. Code = %d\n", zip_ops->compcode);168168- atomic64_inc(&zip_dev->stats.decomp_bad_reqs);169169- zip_update_cmd_bufs(zip_dev, queue);170170- return ZIP_ERROR;171171- }172172-173173- zip_update_cmd_bufs(zip_dev, queue);174174-175175- if ((zip_ops->ccode == 3) && (zip_ops->flush == 4) &&176176- (zip_ops->compcode != ZIP_CMD_DYNAMIC_STOP))177177- result_ptr->s.ef = 1;178178-179179- zip_ops->csum = result_ptr->s.adler32;180180-181181- atomic64_add(result_ptr->s.totalbyteswritten,182182- &zip_dev->stats.decomp_out_bytes);183183-184184- if (zip_ops->output_len < result_ptr->s.totalbyteswritten) {185185- zip_err("output_len (%d) < total bytes written (%d)\n",186186- zip_ops->output_len, result_ptr->s.totalbyteswritten);187187- zip_ops->output_len = 0;188188- } else {189189- zip_ops->output_len = result_ptr->s.totalbyteswritten;190190- }191191-192192- zip_ops->bytes_read = result_ptr->s.totalbytesread;193193- zip_ops->bits_processed = result_ptr->s.totalbitsprocessed;194194- zip_ops->end_file = result_ptr->s.ef;195195- if (zip_ops->end_file) {196196- switch (zip_ops->format) {197197- case RAW_FORMAT:198198- zip_dbg("RAW Format: %d ", zip_ops->format);199199- /* Get checksum from engine */200200- zip_ops->csum = result_ptr->s.adler32;201201- break;202202-203203- case ZLIB_FORMAT:204204- zip_dbg("ZLIB Format: %d ", zip_ops->format);205205- zip_ops->csum = result_ptr->s.adler32;206206- break;207207-208208- case GZIP_FORMAT:209209- zip_dbg("GZIP Format: %d ", zip_ops->format);210210- zip_ops->csum = result_ptr->s.crc32;211211- break;212212-213213- case LZS_FORMAT:214214- zip_dbg("LZS Format: %d ", zip_ops->format);215215- break;216216-217217- default:218218- zip_err("Format error:%d\n", zip_ops->format);219219- }220220- }221221-222222- return 0;223223-}
-62
drivers/crypto/cavium/zip/zip_inflate.h
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __ZIP_INFLATE_H__4747-#define __ZIP_INFLATE_H__4848-4949-/**5050- * zip_inflate - API to offload inflate operation to hardware5151- * @zip_ops: Pointer to zip operation structure5252- * @s: Pointer to the structure representing zip state5353- * @zip_dev: Pointer to the structure representing zip device5454- *5555- * This function prepares the zip inflate command and submits it to the zip5656- * engine for processing.5757- *5858- * Return: 0 if successful or error code5959- */6060-int zip_inflate(struct zip_operation *zip_ops, struct zip_state *s,6161- struct zip_device *zip_dev);6262-#endif
-603
drivers/crypto/cavium/zip/zip_main.c
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#include "common.h"4747-#include "zip_crypto.h"4848-4949-#define DRV_NAME "ThunderX-ZIP"5050-5151-static struct zip_device *zip_dev[MAX_ZIP_DEVICES];5252-5353-static const struct pci_device_id zip_id_table[] = {5454- { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDERX_ZIP) },5555- { 0, }5656-};5757-5858-static void zip_debugfs_init(void);5959-static void zip_debugfs_exit(void);6060-static int zip_register_compression_device(void);6161-static void zip_unregister_compression_device(void);6262-6363-void zip_reg_write(u64 val, u64 __iomem *addr)6464-{6565- writeq(val, addr);6666-}6767-6868-u64 zip_reg_read(u64 __iomem *addr)6969-{7070- return readq(addr);7171-}7272-7373-/*7474- * Allocates new ZIP device structure7575- * Returns zip_device pointer or NULL if cannot allocate memory for zip_device7676- */7777-static struct zip_device *zip_alloc_device(struct pci_dev *pdev)7878-{7979- struct zip_device *zip = NULL;8080- int idx;8181-8282- for (idx = 0; idx < MAX_ZIP_DEVICES; idx++) {8383- if (!zip_dev[idx])8484- break;8585- }8686-8787- /* To ensure that the index is within the limit */8888- if (idx < MAX_ZIP_DEVICES)8989- zip = devm_kzalloc(&pdev->dev, sizeof(*zip), GFP_KERNEL);9090-9191- if (!zip)9292- return NULL;9393-9494- zip_dev[idx] = zip;9595- zip->index = idx;9696- return zip;9797-}9898-9999-/**100100- * zip_get_device - Get ZIP device based on node id of cpu101101- *102102- * @node: Node id of the current cpu103103- * Return: Pointer to Zip device structure104104- */105105-struct zip_device *zip_get_device(int node)106106-{107107- if ((node < MAX_ZIP_DEVICES) && (node >= 0))108108- return zip_dev[node];109109-110110- zip_err("ZIP device not found for node id %d\n", node);111111- return NULL;112112-}113113-114114-/**115115- * zip_get_node_id - Get the node id of the current cpu116116- *117117- * Return: Node id of the current cpu118118- */119119-int zip_get_node_id(void)120120-{121121- return cpu_to_node(raw_smp_processor_id());122122-}123123-124124-/* Initializes the ZIP h/w sub-system */125125-static int zip_init_hw(struct zip_device *zip)126126-{127127- union zip_cmd_ctl cmd_ctl;128128- union zip_constants constants;129129- union zip_que_ena que_ena;130130- union zip_quex_map que_map;131131- union zip_que_pri que_pri;132132-133133- union zip_quex_sbuf_addr que_sbuf_addr;134134- union zip_quex_sbuf_ctl que_sbuf_ctl;135135-136136- int q = 0;137137-138138- /* Enable the ZIP Engine(Core) Clock */139139- cmd_ctl.u_reg64 = zip_reg_read(zip->reg_base + ZIP_CMD_CTL);140140- cmd_ctl.s.forceclk = 1;141141- zip_reg_write(cmd_ctl.u_reg64 & 0xFF, (zip->reg_base + ZIP_CMD_CTL));142142-143143- zip_msg("ZIP_CMD_CTL : 0x%016llx",144144- zip_reg_read(zip->reg_base + ZIP_CMD_CTL));145145-146146- constants.u_reg64 = zip_reg_read(zip->reg_base + ZIP_CONSTANTS);147147- zip->depth = constants.s.depth;148148- zip->onfsize = constants.s.onfsize;149149- zip->ctxsize = constants.s.ctxsize;150150-151151- zip_msg("depth: 0x%016llx , onfsize : 0x%016llx , ctxsize : 0x%016llx",152152- zip->depth, zip->onfsize, zip->ctxsize);153153-154154- /*155155- * Program ZIP_QUE(0..7)_SBUF_ADDR and ZIP_QUE(0..7)_SBUF_CTL to156156- * have the correct buffer pointer and size configured for each157157- * instruction queue.158158- */159159- for (q = 0; q < ZIP_NUM_QUEUES; q++) {160160- que_sbuf_ctl.u_reg64 = 0ull;161161- que_sbuf_ctl.s.size = (ZIP_CMD_QBUF_SIZE / sizeof(u64));162162- que_sbuf_ctl.s.inst_be = 0;163163- que_sbuf_ctl.s.stream_id = 0;164164- zip_reg_write(que_sbuf_ctl.u_reg64,165165- (zip->reg_base + ZIP_QUEX_SBUF_CTL(q)));166166-167167- zip_msg("QUEX_SBUF_CTL[%d]: 0x%016llx", q,168168- zip_reg_read(zip->reg_base + ZIP_QUEX_SBUF_CTL(q)));169169- }170170-171171- for (q = 0; q < ZIP_NUM_QUEUES; q++) {172172- memset(&zip->iq[q], 0x0, sizeof(struct zip_iq));173173-174174- spin_lock_init(&zip->iq[q].lock);175175-176176- if (zip_cmd_qbuf_alloc(zip, q)) {177177- while (q != 0) {178178- q--;179179- zip_cmd_qbuf_free(zip, q);180180- }181181- return -ENOMEM;182182- }183183-184184- /* Initialize tail ptr to head */185185- zip->iq[q].sw_tail = zip->iq[q].sw_head;186186- zip->iq[q].hw_tail = zip->iq[q].sw_head;187187-188188- /* Write the physical addr to register */189189- que_sbuf_addr.u_reg64 = 0ull;190190- que_sbuf_addr.s.ptr = (__pa(zip->iq[q].sw_head) >>191191- ZIP_128B_ALIGN);192192-193193- zip_msg("QUE[%d]_PTR(PHYS): 0x%016llx", q,194194- (u64)que_sbuf_addr.s.ptr);195195-196196- zip_reg_write(que_sbuf_addr.u_reg64,197197- (zip->reg_base + ZIP_QUEX_SBUF_ADDR(q)));198198-199199- zip_msg("QUEX_SBUF_ADDR[%d]: 0x%016llx", q,200200- zip_reg_read(zip->reg_base + ZIP_QUEX_SBUF_ADDR(q)));201201-202202- zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx",203203- zip->iq[q].sw_head, zip->iq[q].sw_tail,204204- zip->iq[q].hw_tail);205205- zip_dbg("sw_head phy addr : 0x%lx", que_sbuf_addr.s.ptr);206206- }207207-208208- /*209209- * Queue-to-ZIP core mapping210210- * If a queue is not mapped to a particular core, it is equivalent to211211- * the ZIP core being disabled.212212- */213213- que_ena.u_reg64 = 0x0ull;214214- /* Enabling queues based on ZIP_NUM_QUEUES */215215- for (q = 0; q < ZIP_NUM_QUEUES; q++)216216- que_ena.s.ena |= (0x1 << q);217217- zip_reg_write(que_ena.u_reg64, (zip->reg_base + ZIP_QUE_ENA));218218-219219- zip_msg("QUE_ENA : 0x%016llx",220220- zip_reg_read(zip->reg_base + ZIP_QUE_ENA));221221-222222- for (q = 0; q < ZIP_NUM_QUEUES; q++) {223223- que_map.u_reg64 = 0ull;224224- /* Mapping each queue to two ZIP cores */225225- que_map.s.zce = 0x3;226226- zip_reg_write(que_map.u_reg64,227227- (zip->reg_base + ZIP_QUEX_MAP(q)));228228-229229- zip_msg("QUE_MAP(%d) : 0x%016llx", q,230230- zip_reg_read(zip->reg_base + ZIP_QUEX_MAP(q)));231231- }232232-233233- que_pri.u_reg64 = 0ull;234234- for (q = 0; q < ZIP_NUM_QUEUES; q++)235235- que_pri.s.pri |= (0x1 << q); /* Higher Priority RR */236236- zip_reg_write(que_pri.u_reg64, (zip->reg_base + ZIP_QUE_PRI));237237-238238- zip_msg("QUE_PRI %016llx", zip_reg_read(zip->reg_base + ZIP_QUE_PRI));239239-240240- return 0;241241-}242242-243243-static void zip_reset(struct zip_device *zip)244244-{245245- union zip_cmd_ctl cmd_ctl;246246-247247- cmd_ctl.u_reg64 = 0x0ull;248248- cmd_ctl.s.reset = 1; /* Forces ZIP cores to do reset */249249- zip_reg_write(cmd_ctl.u_reg64, (zip->reg_base + ZIP_CMD_CTL));250250-}251251-252252-static int zip_probe(struct pci_dev *pdev, const struct pci_device_id *ent)253253-{254254- struct device *dev = &pdev->dev;255255- struct zip_device *zip = NULL;256256- int err;257257-258258- zip = zip_alloc_device(pdev);259259- if (!zip)260260- return -ENOMEM;261261-262262- dev_info(dev, "Found ZIP device %d %x:%x on Node %d\n", zip->index,263263- pdev->vendor, pdev->device, dev_to_node(dev));264264-265265- pci_set_drvdata(pdev, zip);266266- zip->pdev = pdev;267267-268268- err = pci_enable_device(pdev);269269- if (err) {270270- dev_err(dev, "Failed to enable PCI device");271271- goto err_free_device;272272- }273273-274274- err = pci_request_regions(pdev, DRV_NAME);275275- if (err) {276276- dev_err(dev, "PCI request regions failed 0x%x", err);277277- goto err_disable_device;278278- }279279-280280- err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));281281- if (err) {282282- dev_err(dev, "Unable to get usable 48-bit DMA configuration\n");283283- goto err_release_regions;284284- }285285-286286- /* MAP configuration registers */287287- zip->reg_base = pci_ioremap_bar(pdev, PCI_CFG_ZIP_PF_BAR0);288288- if (!zip->reg_base) {289289- dev_err(dev, "ZIP: Cannot map BAR0 CSR memory space, aborting");290290- err = -ENOMEM;291291- goto err_release_regions;292292- }293293-294294- /* Initialize ZIP Hardware */295295- err = zip_init_hw(zip);296296- if (err)297297- goto err_release_regions;298298-299299- /* Register with the Kernel Crypto Interface */300300- err = zip_register_compression_device();301301- if (err < 0) {302302- zip_err("ZIP: Kernel Crypto Registration failed\n");303303- goto err_register;304304- }305305-306306- /* comp-decomp statistics are handled with debugfs interface */307307- zip_debugfs_init();308308-309309- return 0;310310-311311-err_register:312312- zip_reset(zip);313313-314314-err_release_regions:315315- if (zip->reg_base)316316- iounmap(zip->reg_base);317317- pci_release_regions(pdev);318318-319319-err_disable_device:320320- pci_disable_device(pdev);321321-322322-err_free_device:323323- pci_set_drvdata(pdev, NULL);324324-325325- /* Remove zip_dev from zip_device list, free the zip_device memory */326326- zip_dev[zip->index] = NULL;327327- devm_kfree(dev, zip);328328-329329- return err;330330-}331331-332332-static void zip_remove(struct pci_dev *pdev)333333-{334334- struct zip_device *zip = pci_get_drvdata(pdev);335335- int q = 0;336336-337337- if (!zip)338338- return;339339-340340- zip_debugfs_exit();341341-342342- zip_unregister_compression_device();343343-344344- if (zip->reg_base) {345345- zip_reset(zip);346346- iounmap(zip->reg_base);347347- }348348-349349- pci_release_regions(pdev);350350- pci_disable_device(pdev);351351-352352- /*353353- * Free Command Queue buffers. This free should be called for all354354- * the enabled Queues.355355- */356356- for (q = 0; q < ZIP_NUM_QUEUES; q++)357357- zip_cmd_qbuf_free(zip, q);358358-359359- pci_set_drvdata(pdev, NULL);360360- /* remove zip device from zip device list */361361- zip_dev[zip->index] = NULL;362362-}363363-364364-/* PCI Sub-System Interface */365365-static struct pci_driver zip_driver = {366366- .name = DRV_NAME,367367- .id_table = zip_id_table,368368- .probe = zip_probe,369369- .remove = zip_remove,370370-};371371-372372-/* Kernel Crypto Subsystem Interface */373373-374374-static struct scomp_alg zip_scomp_deflate = {375375- .alloc_ctx = zip_alloc_scomp_ctx_deflate,376376- .free_ctx = zip_free_scomp_ctx,377377- .compress = zip_scomp_compress,378378- .decompress = zip_scomp_decompress,379379- .base = {380380- .cra_name = "deflate",381381- .cra_driver_name = "deflate-scomp-cavium",382382- .cra_module = THIS_MODULE,383383- .cra_priority = 300,384384- }385385-};386386-387387-static struct scomp_alg zip_scomp_lzs = {388388- .alloc_ctx = zip_alloc_scomp_ctx_lzs,389389- .free_ctx = zip_free_scomp_ctx,390390- .compress = zip_scomp_compress,391391- .decompress = zip_scomp_decompress,392392- .base = {393393- .cra_name = "lzs",394394- .cra_driver_name = "lzs-scomp-cavium",395395- .cra_module = THIS_MODULE,396396- .cra_priority = 300,397397- }398398-};399399-400400-static int zip_register_compression_device(void)401401-{402402- int ret;403403-404404- ret = crypto_register_scomp(&zip_scomp_deflate);405405- if (ret < 0) {406406- zip_err("Deflate scomp algorithm registration failed\n");407407- return ret;408408- }409409-410410- ret = crypto_register_scomp(&zip_scomp_lzs);411411- if (ret < 0) {412412- zip_err("LZS scomp algorithm registration failed\n");413413- goto err_unregister_scomp_deflate;414414- }415415-416416- return ret;417417-418418-err_unregister_scomp_deflate:419419- crypto_unregister_scomp(&zip_scomp_deflate);420420-421421- return ret;422422-}423423-424424-static void zip_unregister_compression_device(void)425425-{426426- crypto_unregister_scomp(&zip_scomp_deflate);427427- crypto_unregister_scomp(&zip_scomp_lzs);428428-}429429-430430-/*431431- * debugfs functions432432- */433433-#ifdef CONFIG_DEBUG_FS434434-#include <linux/debugfs.h>435435-436436-/* Displays ZIP device statistics */437437-static int zip_stats_show(struct seq_file *s, void *unused)438438-{439439- u64 val = 0ull;440440- u64 avg_chunk = 0ull, avg_cr = 0ull;441441- u32 q = 0;442442-443443- int index = 0;444444- struct zip_device *zip;445445- struct zip_stats *st;446446-447447- for (index = 0; index < MAX_ZIP_DEVICES; index++) {448448- u64 pending = 0;449449-450450- if (zip_dev[index]) {451451- zip = zip_dev[index];452452- st = &zip->stats;453453-454454- /* Get all the pending requests */455455- for (q = 0; q < ZIP_NUM_QUEUES; q++) {456456- val = zip_reg_read((zip->reg_base +457457- ZIP_DBG_QUEX_STA(q)));458458- pending += val >> 32 & 0xffffff;459459- }460460-461461- val = atomic64_read(&st->comp_req_complete);462462- avg_chunk = (val) ? atomic64_read(&st->comp_in_bytes) / val : 0;463463-464464- val = atomic64_read(&st->comp_out_bytes);465465- avg_cr = (val) ? atomic64_read(&st->comp_in_bytes) / val : 0;466466- seq_printf(s, " ZIP Device %d Stats\n"467467- "-----------------------------------\n"468468- "Comp Req Submitted : \t%lld\n"469469- "Comp Req Completed : \t%lld\n"470470- "Compress In Bytes : \t%lld\n"471471- "Compressed Out Bytes : \t%lld\n"472472- "Average Chunk size : \t%llu\n"473473- "Average Compression ratio : \t%llu\n"474474- "Decomp Req Submitted : \t%lld\n"475475- "Decomp Req Completed : \t%lld\n"476476- "Decompress In Bytes : \t%lld\n"477477- "Decompressed Out Bytes : \t%lld\n"478478- "Decompress Bad requests : \t%lld\n"479479- "Pending Req : \t%lld\n"480480- "---------------------------------\n",481481- index,482482- (u64)atomic64_read(&st->comp_req_submit),483483- (u64)atomic64_read(&st->comp_req_complete),484484- (u64)atomic64_read(&st->comp_in_bytes),485485- (u64)atomic64_read(&st->comp_out_bytes),486486- avg_chunk,487487- avg_cr,488488- (u64)atomic64_read(&st->decomp_req_submit),489489- (u64)atomic64_read(&st->decomp_req_complete),490490- (u64)atomic64_read(&st->decomp_in_bytes),491491- (u64)atomic64_read(&st->decomp_out_bytes),492492- (u64)atomic64_read(&st->decomp_bad_reqs),493493- pending);494494- }495495- }496496- return 0;497497-}498498-499499-/* Clears stats data */500500-static int zip_clear_show(struct seq_file *s, void *unused)501501-{502502- int index = 0;503503-504504- for (index = 0; index < MAX_ZIP_DEVICES; index++) {505505- if (zip_dev[index]) {506506- memset(&zip_dev[index]->stats, 0,507507- sizeof(struct zip_stats));508508- seq_printf(s, "Cleared stats for zip %d\n", index);509509- }510510- }511511-512512- return 0;513513-}514514-515515-static struct zip_registers zipregs[64] = {516516- {"ZIP_CMD_CTL ", 0x0000ull},517517- {"ZIP_THROTTLE ", 0x0010ull},518518- {"ZIP_CONSTANTS ", 0x00A0ull},519519- {"ZIP_QUE0_MAP ", 0x1400ull},520520- {"ZIP_QUE1_MAP ", 0x1408ull},521521- {"ZIP_QUE_ENA ", 0x0500ull},522522- {"ZIP_QUE_PRI ", 0x0508ull},523523- {"ZIP_QUE0_DONE ", 0x2000ull},524524- {"ZIP_QUE1_DONE ", 0x2008ull},525525- {"ZIP_QUE0_DOORBELL ", 0x4000ull},526526- {"ZIP_QUE1_DOORBELL ", 0x4008ull},527527- {"ZIP_QUE0_SBUF_ADDR ", 0x1000ull},528528- {"ZIP_QUE1_SBUF_ADDR ", 0x1008ull},529529- {"ZIP_QUE0_SBUF_CTL ", 0x1200ull},530530- {"ZIP_QUE1_SBUF_CTL ", 0x1208ull},531531- { NULL, 0}532532-};533533-534534-/* Prints registers' contents */535535-static int zip_regs_show(struct seq_file *s, void *unused)536536-{537537- u64 val = 0;538538- int i = 0, index = 0;539539-540540- for (index = 0; index < MAX_ZIP_DEVICES; index++) {541541- if (zip_dev[index]) {542542- seq_printf(s, "--------------------------------\n"543543- " ZIP Device %d Registers\n"544544- "--------------------------------\n",545545- index);546546-547547- i = 0;548548-549549- while (zipregs[i].reg_name) {550550- val = zip_reg_read((zip_dev[index]->reg_base +551551- zipregs[i].reg_offset));552552- seq_printf(s, "%s: 0x%016llx\n",553553- zipregs[i].reg_name, val);554554- i++;555555- }556556- }557557- }558558- return 0;559559-}560560-561561-DEFINE_SHOW_ATTRIBUTE(zip_stats);562562-DEFINE_SHOW_ATTRIBUTE(zip_clear);563563-DEFINE_SHOW_ATTRIBUTE(zip_regs);564564-565565-/* Root directory for thunderx_zip debugfs entry */566566-static struct dentry *zip_debugfs_root;567567-568568-static void zip_debugfs_init(void)569569-{570570- if (!debugfs_initialized())571571- return;572572-573573- zip_debugfs_root = debugfs_create_dir("thunderx_zip", NULL);574574-575575- /* Creating files for entries inside thunderx_zip directory */576576- debugfs_create_file("zip_stats", 0444, zip_debugfs_root, NULL,577577- &zip_stats_fops);578578-579579- debugfs_create_file("zip_clear", 0444, zip_debugfs_root, NULL,580580- &zip_clear_fops);581581-582582- debugfs_create_file("zip_regs", 0444, zip_debugfs_root, NULL,583583- &zip_regs_fops);584584-585585-}586586-587587-static void zip_debugfs_exit(void)588588-{589589- debugfs_remove_recursive(zip_debugfs_root);590590-}591591-592592-#else593593-static void __init zip_debugfs_init(void) { }594594-static void __exit zip_debugfs_exit(void) { }595595-#endif596596-/* debugfs - end */597597-598598-module_pci_driver(zip_driver);599599-600600-MODULE_AUTHOR("Cavium Inc");601601-MODULE_DESCRIPTION("Cavium Inc ThunderX ZIP Driver");602602-MODULE_LICENSE("GPL v2");603603-MODULE_DEVICE_TABLE(pci, zip_id_table);
-120
drivers/crypto/cavium/zip/zip_main.h
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __ZIP_MAIN_H__4747-#define __ZIP_MAIN_H__4848-4949-#include "zip_device.h"5050-#include "zip_regs.h"5151-5252-/* PCI device IDs */5353-#define PCI_DEVICE_ID_THUNDERX_ZIP 0xA01A5454-5555-/* ZIP device BARs */5656-#define PCI_CFG_ZIP_PF_BAR0 0 /* Base addr for normal regs */5757-5858-/* Maximum available zip queues */5959-#define ZIP_MAX_NUM_QUEUES 86060-6161-#define ZIP_128B_ALIGN 76262-6363-/* Command queue buffer size */6464-#define ZIP_CMD_QBUF_SIZE (8064 + 8)6565-6666-struct zip_registers {6767- char *reg_name;6868- u64 reg_offset;6969-};7070-7171-/* ZIP Compression - Decompression stats */7272-struct zip_stats {7373- atomic64_t comp_req_submit;7474- atomic64_t comp_req_complete;7575- atomic64_t decomp_req_submit;7676- atomic64_t decomp_req_complete;7777- atomic64_t comp_in_bytes;7878- atomic64_t comp_out_bytes;7979- atomic64_t decomp_in_bytes;8080- atomic64_t decomp_out_bytes;8181- atomic64_t decomp_bad_reqs;8282-};8383-8484-/* ZIP Instruction Queue */8585-struct zip_iq {8686- u64 *sw_head;8787- u64 *sw_tail;8888- u64 *hw_tail;8989- u64 done_cnt;9090- u64 pend_cnt;9191- u64 free_flag;9292-9393- /* ZIP IQ lock */9494- spinlock_t lock;9595-};9696-9797-/* ZIP Device */9898-struct zip_device {9999- u32 index;100100- void __iomem *reg_base;101101- struct pci_dev *pdev;102102-103103- /* Different ZIP Constants */104104- u64 depth;105105- u64 onfsize;106106- u64 ctxsize;107107-108108- struct zip_iq iq[ZIP_MAX_NUM_QUEUES];109109- struct zip_stats stats;110110-};111111-112112-/* Prototypes */113113-struct zip_device *zip_get_device(int node_id);114114-int zip_get_node_id(void);115115-void zip_reg_write(u64 val, u64 __iomem *addr);116116-u64 zip_reg_read(u64 __iomem *addr);117117-void zip_update_cmd_bufs(struct zip_device *zip_dev, u32 queue);118118-u32 zip_load_instr(union zip_inst_s *instr, struct zip_device *zip_dev);119119-120120-#endif /* ZIP_MAIN_H */
-114
drivers/crypto/cavium/zip/zip_mem.c
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#include <linux/types.h>4747-#include <linux/vmalloc.h>4848-4949-#include "common.h"5050-5151-/**5252- * zip_cmd_qbuf_alloc - Allocates a cmd buffer for ZIP Instruction Queue5353- * @zip: Pointer to zip device structure5454- * @q: Queue number to allocate bufffer to5555- * Return: 0 if successful, -ENOMEM otherwise5656- */5757-int zip_cmd_qbuf_alloc(struct zip_device *zip, int q)5858-{5959- zip->iq[q].sw_head = (u64 *)__get_free_pages((GFP_KERNEL | GFP_DMA),6060- get_order(ZIP_CMD_QBUF_SIZE));6161-6262- if (!zip->iq[q].sw_head)6363- return -ENOMEM;6464-6565- memset(zip->iq[q].sw_head, 0, ZIP_CMD_QBUF_SIZE);6666-6767- zip_dbg("cmd_qbuf_alloc[%d] Success : %p\n", q, zip->iq[q].sw_head);6868- return 0;6969-}7070-7171-/**7272- * zip_cmd_qbuf_free - Frees the cmd Queue buffer7373- * @zip: Pointer to zip device structure7474- * @q: Queue number to free buffer of7575- */7676-void zip_cmd_qbuf_free(struct zip_device *zip, int q)7777-{7878- zip_dbg("Freeing cmd_qbuf 0x%lx\n", zip->iq[q].sw_tail);7979-8080- free_pages((u64)zip->iq[q].sw_tail, get_order(ZIP_CMD_QBUF_SIZE));8181-}8282-8383-/**8484- * zip_data_buf_alloc - Allocates memory for a data bufffer8585- * @size: Size of the buffer to allocate8686- * Returns: Pointer to the buffer allocated8787- */8888-u8 *zip_data_buf_alloc(u64 size)8989-{9090- u8 *ptr;9191-9292- ptr = (u8 *)__get_free_pages((GFP_KERNEL | GFP_DMA),9393- get_order(size));9494-9595- if (!ptr)9696- return NULL;9797-9898- memset(ptr, 0, size);9999-100100- zip_dbg("Data buffer allocation success\n");101101- return ptr;102102-}103103-104104-/**105105- * zip_data_buf_free - Frees the memory of a data buffer106106- * @ptr: Pointer to the buffer107107- * @size: Buffer size108108- */109109-void zip_data_buf_free(u8 *ptr, u64 size)110110-{111111- zip_dbg("Freeing data buffer 0x%lx\n", ptr);112112-113113- free_pages((u64)ptr, get_order(size));114114-}
-78
drivers/crypto/cavium/zip/zip_mem.h
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __ZIP_MEM_H__4747-#define __ZIP_MEM_H__4848-4949-/**5050- * zip_cmd_qbuf_free - Frees the cmd Queue buffer5151- * @zip: Pointer to zip device structure5252- * @q: Queue nmber to free buffer of5353- */5454-void zip_cmd_qbuf_free(struct zip_device *zip, int q);5555-5656-/**5757- * zip_cmd_qbuf_alloc - Allocates a Chunk/cmd buffer for ZIP Inst(cmd) Queue5858- * @zip: Pointer to zip device structure5959- * @q: Queue number to allocate bufffer to6060- * Return: 0 if successful, 1 otherwise6161- */6262-int zip_cmd_qbuf_alloc(struct zip_device *zip, int q);6363-6464-/**6565- * zip_data_buf_alloc - Allocates memory for a data bufffer6666- * @size: Size of the buffer to allocate6767- * Returns: Pointer to the buffer allocated6868- */6969-u8 *zip_data_buf_alloc(u64 size);7070-7171-/**7272- * zip_data_buf_free - Frees the memory of a data buffer7373- * @ptr: Pointer to the buffer7474- * @size: Buffer size7575- */7676-void zip_data_buf_free(u8 *ptr, u64 size);7777-7878-#endif
-1347
drivers/crypto/cavium/zip/zip_regs.h
···11-/***********************license start************************************22- * Copyright (c) 2003-2017 Cavium, Inc.33- * All rights reserved.44- *55- * License: one of 'Cavium License' or 'GNU General Public License Version 2'66- *77- * This file is provided under the terms of the Cavium License (see below)88- * or under the terms of GNU General Public License, Version 2, as99- * published by the Free Software Foundation. When using or redistributing1010- * this file, you may do so under either license.1111- *1212- * Cavium License: Redistribution and use in source and binary forms, with1313- * or without modification, are permitted provided that the following1414- * conditions are met:1515- *1616- * * Redistributions of source code must retain the above copyright1717- * notice, this list of conditions and the following disclaimer.1818- *1919- * * Redistributions in binary form must reproduce the above2020- * copyright notice, this list of conditions and the following2121- * disclaimer in the documentation and/or other materials provided2222- * with the distribution.2323- *2424- * * Neither the name of Cavium Inc. nor the names of its contributors may be2525- * used to endorse or promote products derived from this software without2626- * specific prior written permission.2727- *2828- * This Software, including technical data, may be subject to U.S. export2929- * control laws, including the U.S. Export Administration Act and its3030- * associated regulations, and may be subject to export or import3131- * regulations in other countries.3232- *3333- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"3434- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS3535- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH3636- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY3737- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT3838- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)3939- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A4040- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET4141- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE4242- * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES4343- * WITH YOU.4444- ***********************license end**************************************/4545-4646-#ifndef __ZIP_REGS_H__4747-#define __ZIP_REGS_H__4848-4949-/*5050- * Configuration and status register (CSR) address and type definitions for5151- * Cavium ZIP.5252- */5353-5454-#include <linux/kern_levels.h>5555-5656-/* ZIP invocation result completion status codes */5757-#define ZIP_CMD_NOTDONE 0x05858-5959-/* Successful completion. */6060-#define ZIP_CMD_SUCCESS 0x16161-6262-/* Output truncated */6363-#define ZIP_CMD_DTRUNC 0x26464-6565-/* Dynamic Stop */6666-#define ZIP_CMD_DYNAMIC_STOP 0x36767-6868-/* Uncompress ran out of input data when IWORD0[EF] was set */6969-#define ZIP_CMD_ITRUNC 0x47070-7171-/* Uncompress found the reserved block type 3 */7272-#define ZIP_CMD_RBLOCK 0x57373-7474-/*7575- * Uncompress found LEN != ZIP_CMD_NLEN in an uncompressed block in the input.7676- */7777-#define ZIP_CMD_NLEN 0x67878-7979-/* Uncompress found a bad code in the main Huffman codes. */8080-#define ZIP_CMD_BADCODE 0x78181-8282-/* Uncompress found a bad code in the 19 Huffman codes encoding lengths. */8383-#define ZIP_CMD_BADCODE2 0x88484-8585-/* Compress found a zero-length input. */8686-#define ZIP_CMD_ZERO_LEN 0x98787-8888-/* The compress or decompress encountered an internal parity error. */8989-#define ZIP_CMD_PARITY 0xA9090-9191-/*9292- * Uncompress found a string identifier that precedes the uncompressed data and9393- * decompression history.9494- */9595-#define ZIP_CMD_FATAL 0xB9696-9797-/**9898- * enum zip_int_vec_e - ZIP MSI-X Vector Enumeration, enumerates the MSI-X9999- * interrupt vectors.100100- */101101-enum zip_int_vec_e {102102- ZIP_INT_VEC_E_ECCE = 0x10,103103- ZIP_INT_VEC_E_FIFE = 0x11,104104- ZIP_INT_VEC_E_QUE0_DONE = 0x0,105105- ZIP_INT_VEC_E_QUE0_ERR = 0x8,106106- ZIP_INT_VEC_E_QUE1_DONE = 0x1,107107- ZIP_INT_VEC_E_QUE1_ERR = 0x9,108108- ZIP_INT_VEC_E_QUE2_DONE = 0x2,109109- ZIP_INT_VEC_E_QUE2_ERR = 0xa,110110- ZIP_INT_VEC_E_QUE3_DONE = 0x3,111111- ZIP_INT_VEC_E_QUE3_ERR = 0xb,112112- ZIP_INT_VEC_E_QUE4_DONE = 0x4,113113- ZIP_INT_VEC_E_QUE4_ERR = 0xc,114114- ZIP_INT_VEC_E_QUE5_DONE = 0x5,115115- ZIP_INT_VEC_E_QUE5_ERR = 0xd,116116- ZIP_INT_VEC_E_QUE6_DONE = 0x6,117117- ZIP_INT_VEC_E_QUE6_ERR = 0xe,118118- ZIP_INT_VEC_E_QUE7_DONE = 0x7,119119- ZIP_INT_VEC_E_QUE7_ERR = 0xf,120120- ZIP_INT_VEC_E_ENUM_LAST = 0x12,121121-};122122-123123-/**124124- * union zip_zptr_addr_s - ZIP Generic Pointer Structure for ADDR.125125- *126126- * It is the generic format of pointers in ZIP_INST_S.127127- */128128-union zip_zptr_addr_s {129129- u64 u_reg64;130130- struct {131131-#if defined(__BIG_ENDIAN_BITFIELD)132132- u64 reserved_49_63 : 15;133133- u64 addr : 49;134134-#elif defined(__LITTLE_ENDIAN_BITFIELD)135135- u64 addr : 49;136136- u64 reserved_49_63 : 15;137137-#endif138138- } s;139139-140140-};141141-142142-/**143143- * union zip_zptr_ctl_s - ZIP Generic Pointer Structure for CTL.144144- *145145- * It is the generic format of pointers in ZIP_INST_S.146146- */147147-union zip_zptr_ctl_s {148148- u64 u_reg64;149149- struct {150150-#if defined(__BIG_ENDIAN_BITFIELD)151151- u64 reserved_112_127 : 16;152152- u64 length : 16;153153- u64 reserved_67_95 : 29;154154- u64 fw : 1;155155- u64 nc : 1;156156- u64 data_be : 1;157157-#elif defined(__LITTLE_ENDIAN_BITFIELD)158158- u64 data_be : 1;159159- u64 nc : 1;160160- u64 fw : 1;161161- u64 reserved_67_95 : 29;162162- u64 length : 16;163163- u64 reserved_112_127 : 16;164164-#endif165165- } s;166166-};167167-168168-/**169169- * union zip_inst_s - ZIP Instruction Structure.170170- * Each ZIP instruction has 16 words (they are called IWORD0 to IWORD15 within171171- * the structure).172172- */173173-union zip_inst_s {174174- u64 u_reg64[16];175175- struct {176176-#if defined(__BIG_ENDIAN_BITFIELD)177177- u64 doneint : 1;178178- u64 reserved_56_62 : 7;179179- u64 totaloutputlength : 24;180180- u64 reserved_27_31 : 5;181181- u64 exn : 3;182182- u64 reserved_23_23 : 1;183183- u64 exbits : 7;184184- u64 reserved_12_15 : 4;185185- u64 sf : 1;186186- u64 ss : 2;187187- u64 cc : 2;188188- u64 ef : 1;189189- u64 bf : 1;190190- u64 ce : 1;191191- u64 reserved_3_3 : 1;192192- u64 ds : 1;193193- u64 dg : 1;194194- u64 hg : 1;195195-#elif defined(__LITTLE_ENDIAN_BITFIELD)196196- u64 hg : 1;197197- u64 dg : 1;198198- u64 ds : 1;199199- u64 reserved_3_3 : 1;200200- u64 ce : 1;201201- u64 bf : 1;202202- u64 ef : 1;203203- u64 cc : 2;204204- u64 ss : 2;205205- u64 sf : 1;206206- u64 reserved_12_15 : 4;207207- u64 exbits : 7;208208- u64 reserved_23_23 : 1;209209- u64 exn : 3;210210- u64 reserved_27_31 : 5;211211- u64 totaloutputlength : 24;212212- u64 reserved_56_62 : 7;213213- u64 doneint : 1;214214-#endif215215-#if defined(__BIG_ENDIAN_BITFIELD)216216- u64 historylength : 16;217217- u64 reserved_96_111 : 16;218218- u64 adlercrc32 : 32;219219-#elif defined(__LITTLE_ENDIAN_BITFIELD)220220- u64 adlercrc32 : 32;221221- u64 reserved_96_111 : 16;222222- u64 historylength : 16;223223-#endif224224- union zip_zptr_addr_s ctx_ptr_addr;225225- union zip_zptr_ctl_s ctx_ptr_ctl;226226- union zip_zptr_addr_s his_ptr_addr;227227- union zip_zptr_ctl_s his_ptr_ctl;228228- union zip_zptr_addr_s inp_ptr_addr;229229- union zip_zptr_ctl_s inp_ptr_ctl;230230- union zip_zptr_addr_s out_ptr_addr;231231- union zip_zptr_ctl_s out_ptr_ctl;232232- union zip_zptr_addr_s res_ptr_addr;233233- union zip_zptr_ctl_s res_ptr_ctl;234234-#if defined(__BIG_ENDIAN_BITFIELD)235235- u64 reserved_817_831 : 15;236236- u64 wq_ptr : 49;237237-#elif defined(__LITTLE_ENDIAN_BITFIELD)238238- u64 wq_ptr : 49;239239- u64 reserved_817_831 : 15;240240-#endif241241-#if defined(__BIG_ENDIAN_BITFIELD)242242- u64 reserved_882_895 : 14;243243- u64 tt : 2;244244- u64 reserved_874_879 : 6;245245- u64 grp : 10;246246- u64 tag : 32;247247-#elif defined(__LITTLE_ENDIAN_BITFIELD)248248- u64 tag : 32;249249- u64 grp : 10;250250- u64 reserved_874_879 : 6;251251- u64 tt : 2;252252- u64 reserved_882_895 : 14;253253-#endif254254-#if defined(__BIG_ENDIAN_BITFIELD)255255- u64 reserved_896_959 : 64;256256-#elif defined(__LITTLE_ENDIAN_BITFIELD)257257- u64 reserved_896_959 : 64;258258-#endif259259-#if defined(__BIG_ENDIAN_BITFIELD)260260- u64 reserved_960_1023 : 64;261261-#elif defined(__LITTLE_ENDIAN_BITFIELD)262262- u64 reserved_960_1023 : 64;263263-#endif264264- } s;265265-};266266-267267-/**268268- * union zip_nptr_s - ZIP Instruction Next-Chunk-Buffer Pointer (NPTR)269269- * Structure270270- *271271- * ZIP_NPTR structure is used to chain all the zip instruction buffers272272- * together. ZIP instruction buffers are managed (allocated and released) by273273- * the software.274274- */275275-union zip_nptr_s {276276- u64 u_reg64;277277- struct {278278-#if defined(__BIG_ENDIAN_BITFIELD)279279- u64 reserved_49_63 : 15;280280- u64 addr : 49;281281-#elif defined(__LITTLE_ENDIAN_BITFIELD)282282- u64 addr : 49;283283- u64 reserved_49_63 : 15;284284-#endif285285- } s;286286-};287287-288288-/**289289- * union zip_zptr_s - ZIP Generic Pointer Structure.290290- *291291- * It is the generic format of pointers in ZIP_INST_S.292292- */293293-union zip_zptr_s {294294- u64 u_reg64[2];295295- struct {296296-#if defined(__BIG_ENDIAN_BITFIELD)297297- u64 reserved_49_63 : 15;298298- u64 addr : 49;299299-#elif defined(__LITTLE_ENDIAN_BITFIELD)300300- u64 addr : 49;301301- u64 reserved_49_63 : 15;302302-#endif303303-#if defined(__BIG_ENDIAN_BITFIELD)304304- u64 reserved_112_127 : 16;305305- u64 length : 16;306306- u64 reserved_67_95 : 29;307307- u64 fw : 1;308308- u64 nc : 1;309309- u64 data_be : 1;310310-#elif defined(__LITTLE_ENDIAN_BITFIELD)311311- u64 data_be : 1;312312- u64 nc : 1;313313- u64 fw : 1;314314- u64 reserved_67_95 : 29;315315- u64 length : 16;316316- u64 reserved_112_127 : 16;317317-#endif318318- } s;319319-};320320-321321-/**322322- * union zip_zres_s - ZIP Result Structure323323- *324324- * The ZIP coprocessor writes the result structure after it completes the325325- * invocation. The result structure is exactly 24 bytes, and each invocation of326326- * the ZIP coprocessor produces exactly one result structure.327327- */328328-union zip_zres_s {329329- u64 u_reg64[3];330330- struct {331331-#if defined(__BIG_ENDIAN_BITFIELD)332332- u64 crc32 : 32;333333- u64 adler32 : 32;334334-#elif defined(__LITTLE_ENDIAN_BITFIELD)335335- u64 adler32 : 32;336336- u64 crc32 : 32;337337-#endif338338-#if defined(__BIG_ENDIAN_BITFIELD)339339- u64 totalbyteswritten : 32;340340- u64 totalbytesread : 32;341341-#elif defined(__LITTLE_ENDIAN_BITFIELD)342342- u64 totalbytesread : 32;343343- u64 totalbyteswritten : 32;344344-#endif345345-#if defined(__BIG_ENDIAN_BITFIELD)346346- u64 totalbitsprocessed : 32;347347- u64 doneint : 1;348348- u64 reserved_155_158 : 4;349349- u64 exn : 3;350350- u64 reserved_151_151 : 1;351351- u64 exbits : 7;352352- u64 reserved_137_143 : 7;353353- u64 ef : 1;354354-355355- volatile u64 compcode : 8;356356-#elif defined(__LITTLE_ENDIAN_BITFIELD)357357-358358- volatile u64 compcode : 8;359359- u64 ef : 1;360360- u64 reserved_137_143 : 7;361361- u64 exbits : 7;362362- u64 reserved_151_151 : 1;363363- u64 exn : 3;364364- u64 reserved_155_158 : 4;365365- u64 doneint : 1;366366- u64 totalbitsprocessed : 32;367367-#endif368368- } s;369369-};370370-371371-/**372372- * union zip_cmd_ctl - Structure representing the register that controls373373- * clock and reset.374374- */375375-union zip_cmd_ctl {376376- u64 u_reg64;377377- struct zip_cmd_ctl_s {378378-#if defined(__BIG_ENDIAN_BITFIELD)379379- u64 reserved_2_63 : 62;380380- u64 forceclk : 1;381381- u64 reset : 1;382382-#elif defined(__LITTLE_ENDIAN_BITFIELD)383383- u64 reset : 1;384384- u64 forceclk : 1;385385- u64 reserved_2_63 : 62;386386-#endif387387- } s;388388-};389389-390390-#define ZIP_CMD_CTL 0x0ull391391-392392-/**393393- * union zip_constants - Data structure representing the register that contains394394- * all of the current implementation-related parameters of the zip core in this395395- * chip.396396- */397397-union zip_constants {398398- u64 u_reg64;399399- struct zip_constants_s {400400-#if defined(__BIG_ENDIAN_BITFIELD)401401- u64 nexec : 8;402402- u64 reserved_49_55 : 7;403403- u64 syncflush_capable : 1;404404- u64 depth : 16;405405- u64 onfsize : 12;406406- u64 ctxsize : 12;407407- u64 reserved_1_7 : 7;408408- u64 disabled : 1;409409-#elif defined(__LITTLE_ENDIAN_BITFIELD)410410- u64 disabled : 1;411411- u64 reserved_1_7 : 7;412412- u64 ctxsize : 12;413413- u64 onfsize : 12;414414- u64 depth : 16;415415- u64 syncflush_capable : 1;416416- u64 reserved_49_55 : 7;417417- u64 nexec : 8;418418-#endif419419- } s;420420-};421421-422422-#define ZIP_CONSTANTS 0x00A0ull423423-424424-/**425425- * union zip_corex_bist_status - Represents registers which have the BIST426426- * status of memories in zip cores.427427- *428428- * Each bit is the BIST result of an individual memory429429- * (per bit, 0 = pass and 1 = fail).430430- */431431-union zip_corex_bist_status {432432- u64 u_reg64;433433- struct zip_corex_bist_status_s {434434-#if defined(__BIG_ENDIAN_BITFIELD)435435- u64 reserved_53_63 : 11;436436- u64 bstatus : 53;437437-#elif defined(__LITTLE_ENDIAN_BITFIELD)438438- u64 bstatus : 53;439439- u64 reserved_53_63 : 11;440440-#endif441441- } s;442442-};443443-444444-static inline u64 ZIP_COREX_BIST_STATUS(u64 param1)445445-{446446- if (param1 <= 1)447447- return 0x0520ull + (param1 & 1) * 0x8ull;448448- pr_err("ZIP_COREX_BIST_STATUS: %llu\n", param1);449449- return 0;450450-}451451-452452-/**453453- * union zip_ctl_bist_status - Represents register that has the BIST status of454454- * memories in ZIP_CTL (instruction buffer, G/S pointer FIFO, input data455455- * buffer, output data buffers).456456- *457457- * Each bit is the BIST result of an individual memory458458- * (per bit, 0 = pass and 1 = fail).459459- */460460-union zip_ctl_bist_status {461461- u64 u_reg64;462462- struct zip_ctl_bist_status_s {463463-#if defined(__BIG_ENDIAN_BITFIELD)464464- u64 reserved_9_63 : 55;465465- u64 bstatus : 9;466466-#elif defined(__LITTLE_ENDIAN_BITFIELD)467467- u64 bstatus : 9;468468- u64 reserved_9_63 : 55;469469-#endif470470- } s;471471-};472472-473473-#define ZIP_CTL_BIST_STATUS 0x0510ull474474-475475-/**476476- * union zip_ctl_cfg - Represents the register that controls the behavior of477477- * the ZIP DMA engines.478478- *479479- * It is recommended to keep default values for normal operation. Changing the480480- * values of the fields may be useful for diagnostics.481481- */482482-union zip_ctl_cfg {483483- u64 u_reg64;484484- struct zip_ctl_cfg_s {485485-#if defined(__BIG_ENDIAN_BITFIELD)486486- u64 reserved_52_63 : 12;487487- u64 ildf : 4;488488- u64 reserved_36_47 : 12;489489- u64 drtf : 4;490490- u64 reserved_27_31 : 5;491491- u64 stcf : 3;492492- u64 reserved_19_23 : 5;493493- u64 ldf : 3;494494- u64 reserved_2_15 : 14;495495- u64 busy : 1;496496- u64 reserved_0_0 : 1;497497-#elif defined(__LITTLE_ENDIAN_BITFIELD)498498- u64 reserved_0_0 : 1;499499- u64 busy : 1;500500- u64 reserved_2_15 : 14;501501- u64 ldf : 3;502502- u64 reserved_19_23 : 5;503503- u64 stcf : 3;504504- u64 reserved_27_31 : 5;505505- u64 drtf : 4;506506- u64 reserved_36_47 : 12;507507- u64 ildf : 4;508508- u64 reserved_52_63 : 12;509509-#endif510510- } s;511511-};512512-513513-#define ZIP_CTL_CFG 0x0560ull514514-515515-/**516516- * union zip_dbg_corex_inst - Represents the registers that reflect the status517517- * of the current instruction that the ZIP core is executing or has executed.518518- *519519- * These registers are only for debug use.520520- */521521-union zip_dbg_corex_inst {522522- u64 u_reg64;523523- struct zip_dbg_corex_inst_s {524524-#if defined(__BIG_ENDIAN_BITFIELD)525525- u64 busy : 1;526526- u64 reserved_35_62 : 28;527527- u64 qid : 3;528528- u64 iid : 32;529529-#elif defined(__LITTLE_ENDIAN_BITFIELD)530530- u64 iid : 32;531531- u64 qid : 3;532532- u64 reserved_35_62 : 28;533533- u64 busy : 1;534534-#endif535535- } s;536536-};537537-538538-static inline u64 ZIP_DBG_COREX_INST(u64 param1)539539-{540540- if (param1 <= 1)541541- return 0x0640ull + (param1 & 1) * 0x8ull;542542- pr_err("ZIP_DBG_COREX_INST: %llu\n", param1);543543- return 0;544544-}545545-546546-/**547547- * union zip_dbg_corex_sta - Represents registers that reflect the status of548548- * the zip cores.549549- *550550- * They are for debug use only.551551- */552552-union zip_dbg_corex_sta {553553- u64 u_reg64;554554- struct zip_dbg_corex_sta_s {555555-#if defined(__BIG_ENDIAN_BITFIELD)556556- u64 busy : 1;557557- u64 reserved_37_62 : 26;558558- u64 ist : 5;559559- u64 nie : 32;560560-#elif defined(__LITTLE_ENDIAN_BITFIELD)561561- u64 nie : 32;562562- u64 ist : 5;563563- u64 reserved_37_62 : 26;564564- u64 busy : 1;565565-#endif566566- } s;567567-};568568-569569-static inline u64 ZIP_DBG_COREX_STA(u64 param1)570570-{571571- if (param1 <= 1)572572- return 0x0680ull + (param1 & 1) * 0x8ull;573573- pr_err("ZIP_DBG_COREX_STA: %llu\n", param1);574574- return 0;575575-}576576-577577-/**578578- * union zip_dbg_quex_sta - Represets registers that reflect status of the zip579579- * instruction queues.580580- *581581- * They are for debug use only.582582- */583583-union zip_dbg_quex_sta {584584- u64 u_reg64;585585- struct zip_dbg_quex_sta_s {586586-#if defined(__BIG_ENDIAN_BITFIELD)587587- u64 busy : 1;588588- u64 reserved_56_62 : 7;589589- u64 rqwc : 24;590590- u64 nii : 32;591591-#elif defined(__LITTLE_ENDIAN_BITFIELD)592592- u64 nii : 32;593593- u64 rqwc : 24;594594- u64 reserved_56_62 : 7;595595- u64 busy : 1;596596-#endif597597- } s;598598-};599599-600600-static inline u64 ZIP_DBG_QUEX_STA(u64 param1)601601-{602602- if (param1 <= 7)603603- return 0x1800ull + (param1 & 7) * 0x8ull;604604- pr_err("ZIP_DBG_QUEX_STA: %llu\n", param1);605605- return 0;606606-}607607-608608-/**609609- * union zip_ecc_ctl - Represents the register that enables ECC for each610610- * individual internal memory that requires ECC.611611- *612612- * For debug purpose, it can also flip one or two bits in the ECC data.613613- */614614-union zip_ecc_ctl {615615- u64 u_reg64;616616- struct zip_ecc_ctl_s {617617-#if defined(__BIG_ENDIAN_BITFIELD)618618- u64 reserved_19_63 : 45;619619- u64 vmem_cdis : 1;620620- u64 vmem_fs : 2;621621- u64 reserved_15_15 : 1;622622- u64 idf1_cdis : 1;623623- u64 idf1_fs : 2;624624- u64 reserved_11_11 : 1;625625- u64 idf0_cdis : 1;626626- u64 idf0_fs : 2;627627- u64 reserved_7_7 : 1;628628- u64 gspf_cdis : 1;629629- u64 gspf_fs : 2;630630- u64 reserved_3_3 : 1;631631- u64 iqf_cdis : 1;632632- u64 iqf_fs : 2;633633-#elif defined(__LITTLE_ENDIAN_BITFIELD)634634- u64 iqf_fs : 2;635635- u64 iqf_cdis : 1;636636- u64 reserved_3_3 : 1;637637- u64 gspf_fs : 2;638638- u64 gspf_cdis : 1;639639- u64 reserved_7_7 : 1;640640- u64 idf0_fs : 2;641641- u64 idf0_cdis : 1;642642- u64 reserved_11_11 : 1;643643- u64 idf1_fs : 2;644644- u64 idf1_cdis : 1;645645- u64 reserved_15_15 : 1;646646- u64 vmem_fs : 2;647647- u64 vmem_cdis : 1;648648- u64 reserved_19_63 : 45;649649-#endif650650- } s;651651-};652652-653653-#define ZIP_ECC_CTL 0x0568ull654654-655655-/* NCB - zip_ecce_ena_w1c */656656-union zip_ecce_ena_w1c {657657- u64 u_reg64;658658- struct zip_ecce_ena_w1c_s {659659-#if defined(__BIG_ENDIAN_BITFIELD)660660- u64 reserved_37_63 : 27;661661- u64 dbe : 5;662662- u64 reserved_5_31 : 27;663663- u64 sbe : 5;664664-#elif defined(__LITTLE_ENDIAN_BITFIELD)665665- u64 sbe : 5;666666- u64 reserved_5_31 : 27;667667- u64 dbe : 5;668668- u64 reserved_37_63 : 27;669669-#endif670670- } s;671671-};672672-673673-#define ZIP_ECCE_ENA_W1C 0x0598ull674674-675675-/* NCB - zip_ecce_ena_w1s */676676-union zip_ecce_ena_w1s {677677- u64 u_reg64;678678- struct zip_ecce_ena_w1s_s {679679-#if defined(__BIG_ENDIAN_BITFIELD)680680- u64 reserved_37_63 : 27;681681- u64 dbe : 5;682682- u64 reserved_5_31 : 27;683683- u64 sbe : 5;684684-#elif defined(__LITTLE_ENDIAN_BITFIELD)685685- u64 sbe : 5;686686- u64 reserved_5_31 : 27;687687- u64 dbe : 5;688688- u64 reserved_37_63 : 27;689689-#endif690690- } s;691691-};692692-693693-#define ZIP_ECCE_ENA_W1S 0x0590ull694694-695695-/**696696- * union zip_ecce_int - Represents the register that contains the status of the697697- * ECC interrupt sources.698698- */699699-union zip_ecce_int {700700- u64 u_reg64;701701- struct zip_ecce_int_s {702702-#if defined(__BIG_ENDIAN_BITFIELD)703703- u64 reserved_37_63 : 27;704704- u64 dbe : 5;705705- u64 reserved_5_31 : 27;706706- u64 sbe : 5;707707-#elif defined(__LITTLE_ENDIAN_BITFIELD)708708- u64 sbe : 5;709709- u64 reserved_5_31 : 27;710710- u64 dbe : 5;711711- u64 reserved_37_63 : 27;712712-#endif713713- } s;714714-};715715-716716-#define ZIP_ECCE_INT 0x0580ull717717-718718-/* NCB - zip_ecce_int_w1s */719719-union zip_ecce_int_w1s {720720- u64 u_reg64;721721- struct zip_ecce_int_w1s_s {722722-#if defined(__BIG_ENDIAN_BITFIELD)723723- u64 reserved_37_63 : 27;724724- u64 dbe : 5;725725- u64 reserved_5_31 : 27;726726- u64 sbe : 5;727727-#elif defined(__LITTLE_ENDIAN_BITFIELD)728728- u64 sbe : 5;729729- u64 reserved_5_31 : 27;730730- u64 dbe : 5;731731- u64 reserved_37_63 : 27;732732-#endif733733- } s;734734-};735735-736736-#define ZIP_ECCE_INT_W1S 0x0588ull737737-738738-/* NCB - zip_fife_ena_w1c */739739-union zip_fife_ena_w1c {740740- u64 u_reg64;741741- struct zip_fife_ena_w1c_s {742742-#if defined(__BIG_ENDIAN_BITFIELD)743743- u64 reserved_42_63 : 22;744744- u64 asserts : 42;745745-#elif defined(__LITTLE_ENDIAN_BITFIELD)746746- u64 asserts : 42;747747- u64 reserved_42_63 : 22;748748-#endif749749- } s;750750-};751751-752752-#define ZIP_FIFE_ENA_W1C 0x0090ull753753-754754-/* NCB - zip_fife_ena_w1s */755755-union zip_fife_ena_w1s {756756- u64 u_reg64;757757- struct zip_fife_ena_w1s_s {758758-#if defined(__BIG_ENDIAN_BITFIELD)759759- u64 reserved_42_63 : 22;760760- u64 asserts : 42;761761-#elif defined(__LITTLE_ENDIAN_BITFIELD)762762- u64 asserts : 42;763763- u64 reserved_42_63 : 22;764764-#endif765765- } s;766766-};767767-768768-#define ZIP_FIFE_ENA_W1S 0x0088ull769769-770770-/* NCB - zip_fife_int */771771-union zip_fife_int {772772- u64 u_reg64;773773- struct zip_fife_int_s {774774-#if defined(__BIG_ENDIAN_BITFIELD)775775- u64 reserved_42_63 : 22;776776- u64 asserts : 42;777777-#elif defined(__LITTLE_ENDIAN_BITFIELD)778778- u64 asserts : 42;779779- u64 reserved_42_63 : 22;780780-#endif781781- } s;782782-};783783-784784-#define ZIP_FIFE_INT 0x0078ull785785-786786-/* NCB - zip_fife_int_w1s */787787-union zip_fife_int_w1s {788788- u64 u_reg64;789789- struct zip_fife_int_w1s_s {790790-#if defined(__BIG_ENDIAN_BITFIELD)791791- u64 reserved_42_63 : 22;792792- u64 asserts : 42;793793-#elif defined(__LITTLE_ENDIAN_BITFIELD)794794- u64 asserts : 42;795795- u64 reserved_42_63 : 22;796796-#endif797797- } s;798798-};799799-800800-#define ZIP_FIFE_INT_W1S 0x0080ull801801-802802-/**803803- * union zip_msix_pbax - Represents the register that is the MSI-X PBA table804804- *805805- * The bit number is indexed by the ZIP_INT_VEC_E enumeration.806806- */807807-union zip_msix_pbax {808808- u64 u_reg64;809809- struct zip_msix_pbax_s {810810-#if defined(__BIG_ENDIAN_BITFIELD)811811- u64 pend : 64;812812-#elif defined(__LITTLE_ENDIAN_BITFIELD)813813- u64 pend : 64;814814-#endif815815- } s;816816-};817817-818818-static inline u64 ZIP_MSIX_PBAX(u64 param1)819819-{820820- if (param1 == 0)821821- return 0x0000838000FF0000ull;822822- pr_err("ZIP_MSIX_PBAX: %llu\n", param1);823823- return 0;824824-}825825-826826-/**827827- * union zip_msix_vecx_addr - Represents the register that is the MSI-X vector828828- * table, indexed by the ZIP_INT_VEC_E enumeration.829829- */830830-union zip_msix_vecx_addr {831831- u64 u_reg64;832832- struct zip_msix_vecx_addr_s {833833-#if defined(__BIG_ENDIAN_BITFIELD)834834- u64 reserved_49_63 : 15;835835- u64 addr : 47;836836- u64 reserved_1_1 : 1;837837- u64 secvec : 1;838838-#elif defined(__LITTLE_ENDIAN_BITFIELD)839839- u64 secvec : 1;840840- u64 reserved_1_1 : 1;841841- u64 addr : 47;842842- u64 reserved_49_63 : 15;843843-#endif844844- } s;845845-};846846-847847-static inline u64 ZIP_MSIX_VECX_ADDR(u64 param1)848848-{849849- if (param1 <= 17)850850- return 0x0000838000F00000ull + (param1 & 31) * 0x10ull;851851- pr_err("ZIP_MSIX_VECX_ADDR: %llu\n", param1);852852- return 0;853853-}854854-855855-/**856856- * union zip_msix_vecx_ctl - Represents the register that is the MSI-X vector857857- * table, indexed by the ZIP_INT_VEC_E enumeration.858858- */859859-union zip_msix_vecx_ctl {860860- u64 u_reg64;861861- struct zip_msix_vecx_ctl_s {862862-#if defined(__BIG_ENDIAN_BITFIELD)863863- u64 reserved_33_63 : 31;864864- u64 mask : 1;865865- u64 reserved_20_31 : 12;866866- u64 data : 20;867867-#elif defined(__LITTLE_ENDIAN_BITFIELD)868868- u64 data : 20;869869- u64 reserved_20_31 : 12;870870- u64 mask : 1;871871- u64 reserved_33_63 : 31;872872-#endif873873- } s;874874-};875875-876876-static inline u64 ZIP_MSIX_VECX_CTL(u64 param1)877877-{878878- if (param1 <= 17)879879- return 0x0000838000F00008ull + (param1 & 31) * 0x10ull;880880- pr_err("ZIP_MSIX_VECX_CTL: %llu\n", param1);881881- return 0;882882-}883883-884884-/**885885- * union zip_quex_done - Represents the registers that contain the per-queue886886- * instruction done count.887887- */888888-union zip_quex_done {889889- u64 u_reg64;890890- struct zip_quex_done_s {891891-#if defined(__BIG_ENDIAN_BITFIELD)892892- u64 reserved_20_63 : 44;893893- u64 done : 20;894894-#elif defined(__LITTLE_ENDIAN_BITFIELD)895895- u64 done : 20;896896- u64 reserved_20_63 : 44;897897-#endif898898- } s;899899-};900900-901901-static inline u64 ZIP_QUEX_DONE(u64 param1)902902-{903903- if (param1 <= 7)904904- return 0x2000ull + (param1 & 7) * 0x8ull;905905- pr_err("ZIP_QUEX_DONE: %llu\n", param1);906906- return 0;907907-}908908-909909-/**910910- * union zip_quex_done_ack - Represents the registers on write to which will911911- * decrement the per-queue instructiona done count.912912- */913913-union zip_quex_done_ack {914914- u64 u_reg64;915915- struct zip_quex_done_ack_s {916916-#if defined(__BIG_ENDIAN_BITFIELD)917917- u64 reserved_20_63 : 44;918918- u64 done_ack : 20;919919-#elif defined(__LITTLE_ENDIAN_BITFIELD)920920- u64 done_ack : 20;921921- u64 reserved_20_63 : 44;922922-#endif923923- } s;924924-};925925-926926-static inline u64 ZIP_QUEX_DONE_ACK(u64 param1)927927-{928928- if (param1 <= 7)929929- return 0x2200ull + (param1 & 7) * 0x8ull;930930- pr_err("ZIP_QUEX_DONE_ACK: %llu\n", param1);931931- return 0;932932-}933933-934934-/**935935- * union zip_quex_done_ena_w1c - Represents the register which when written936936- * 1 to will disable the DONEINT interrupt for the queue.937937- */938938-union zip_quex_done_ena_w1c {939939- u64 u_reg64;940940- struct zip_quex_done_ena_w1c_s {941941-#if defined(__BIG_ENDIAN_BITFIELD)942942- u64 reserved_1_63 : 63;943943- u64 done_ena : 1;944944-#elif defined(__LITTLE_ENDIAN_BITFIELD)945945- u64 done_ena : 1;946946- u64 reserved_1_63 : 63;947947-#endif948948- } s;949949-};950950-951951-static inline u64 ZIP_QUEX_DONE_ENA_W1C(u64 param1)952952-{953953- if (param1 <= 7)954954- return 0x2600ull + (param1 & 7) * 0x8ull;955955- pr_err("ZIP_QUEX_DONE_ENA_W1C: %llu\n", param1);956956- return 0;957957-}958958-959959-/**960960- * union zip_quex_done_ena_w1s - Represents the register that when written 1 to961961- * will enable the DONEINT interrupt for the queue.962962- */963963-union zip_quex_done_ena_w1s {964964- u64 u_reg64;965965- struct zip_quex_done_ena_w1s_s {966966-#if defined(__BIG_ENDIAN_BITFIELD)967967- u64 reserved_1_63 : 63;968968- u64 done_ena : 1;969969-#elif defined(__LITTLE_ENDIAN_BITFIELD)970970- u64 done_ena : 1;971971- u64 reserved_1_63 : 63;972972-#endif973973- } s;974974-};975975-976976-static inline u64 ZIP_QUEX_DONE_ENA_W1S(u64 param1)977977-{978978- if (param1 <= 7)979979- return 0x2400ull + (param1 & 7) * 0x8ull;980980- pr_err("ZIP_QUEX_DONE_ENA_W1S: %llu\n", param1);981981- return 0;982982-}983983-984984-/**985985- * union zip_quex_done_wait - Represents the register that specifies the per986986- * queue interrupt coalescing settings.987987- */988988-union zip_quex_done_wait {989989- u64 u_reg64;990990- struct zip_quex_done_wait_s {991991-#if defined(__BIG_ENDIAN_BITFIELD)992992- u64 reserved_48_63 : 16;993993- u64 time_wait : 16;994994- u64 reserved_20_31 : 12;995995- u64 num_wait : 20;996996-#elif defined(__LITTLE_ENDIAN_BITFIELD)997997- u64 num_wait : 20;998998- u64 reserved_20_31 : 12;999999- u64 time_wait : 16;10001000- u64 reserved_48_63 : 16;10011001-#endif10021002- } s;10031003-};10041004-10051005-static inline u64 ZIP_QUEX_DONE_WAIT(u64 param1)10061006-{10071007- if (param1 <= 7)10081008- return 0x2800ull + (param1 & 7) * 0x8ull;10091009- pr_err("ZIP_QUEX_DONE_WAIT: %llu\n", param1);10101010- return 0;10111011-}10121012-10131013-/**10141014- * union zip_quex_doorbell - Represents doorbell registers for the ZIP10151015- * instruction queues.10161016- */10171017-union zip_quex_doorbell {10181018- u64 u_reg64;10191019- struct zip_quex_doorbell_s {10201020-#if defined(__BIG_ENDIAN_BITFIELD)10211021- u64 reserved_20_63 : 44;10221022- u64 dbell_cnt : 20;10231023-#elif defined(__LITTLE_ENDIAN_BITFIELD)10241024- u64 dbell_cnt : 20;10251025- u64 reserved_20_63 : 44;10261026-#endif10271027- } s;10281028-};10291029-10301030-static inline u64 ZIP_QUEX_DOORBELL(u64 param1)10311031-{10321032- if (param1 <= 7)10331033- return 0x4000ull + (param1 & 7) * 0x8ull;10341034- pr_err("ZIP_QUEX_DOORBELL: %llu\n", param1);10351035- return 0;10361036-}10371037-10381038-union zip_quex_err_ena_w1c {10391039- u64 u_reg64;10401040- struct zip_quex_err_ena_w1c_s {10411041-#if defined(__BIG_ENDIAN_BITFIELD)10421042- u64 reserved_5_63 : 59;10431043- u64 mdbe : 1;10441044- u64 nwrp : 1;10451045- u64 nrrp : 1;10461046- u64 irde : 1;10471047- u64 dovf : 1;10481048-#elif defined(__LITTLE_ENDIAN_BITFIELD)10491049- u64 dovf : 1;10501050- u64 irde : 1;10511051- u64 nrrp : 1;10521052- u64 nwrp : 1;10531053- u64 mdbe : 1;10541054- u64 reserved_5_63 : 59;10551055-#endif10561056- } s;10571057-};10581058-10591059-static inline u64 ZIP_QUEX_ERR_ENA_W1C(u64 param1)10601060-{10611061- if (param1 <= 7)10621062- return 0x3600ull + (param1 & 7) * 0x8ull;10631063- pr_err("ZIP_QUEX_ERR_ENA_W1C: %llu\n", param1);10641064- return 0;10651065-}10661066-10671067-union zip_quex_err_ena_w1s {10681068- u64 u_reg64;10691069- struct zip_quex_err_ena_w1s_s {10701070-#if defined(__BIG_ENDIAN_BITFIELD)10711071- u64 reserved_5_63 : 59;10721072- u64 mdbe : 1;10731073- u64 nwrp : 1;10741074- u64 nrrp : 1;10751075- u64 irde : 1;10761076- u64 dovf : 1;10771077-#elif defined(__LITTLE_ENDIAN_BITFIELD)10781078- u64 dovf : 1;10791079- u64 irde : 1;10801080- u64 nrrp : 1;10811081- u64 nwrp : 1;10821082- u64 mdbe : 1;10831083- u64 reserved_5_63 : 59;10841084-#endif10851085- } s;10861086-};10871087-10881088-static inline u64 ZIP_QUEX_ERR_ENA_W1S(u64 param1)10891089-{10901090- if (param1 <= 7)10911091- return 0x3400ull + (param1 & 7) * 0x8ull;10921092- pr_err("ZIP_QUEX_ERR_ENA_W1S: %llu\n", param1);10931093- return 0;10941094-}10951095-10961096-/**10971097- * union zip_quex_err_int - Represents registers that contain the per-queue10981098- * error interrupts.10991099- */11001100-union zip_quex_err_int {11011101- u64 u_reg64;11021102- struct zip_quex_err_int_s {11031103-#if defined(__BIG_ENDIAN_BITFIELD)11041104- u64 reserved_5_63 : 59;11051105- u64 mdbe : 1;11061106- u64 nwrp : 1;11071107- u64 nrrp : 1;11081108- u64 irde : 1;11091109- u64 dovf : 1;11101110-#elif defined(__LITTLE_ENDIAN_BITFIELD)11111111- u64 dovf : 1;11121112- u64 irde : 1;11131113- u64 nrrp : 1;11141114- u64 nwrp : 1;11151115- u64 mdbe : 1;11161116- u64 reserved_5_63 : 59;11171117-#endif11181118- } s;11191119-};11201120-11211121-static inline u64 ZIP_QUEX_ERR_INT(u64 param1)11221122-{11231123- if (param1 <= 7)11241124- return 0x3000ull + (param1 & 7) * 0x8ull;11251125- pr_err("ZIP_QUEX_ERR_INT: %llu\n", param1);11261126- return 0;11271127-}11281128-11291129-/* NCB - zip_que#_err_int_w1s */11301130-union zip_quex_err_int_w1s {11311131- u64 u_reg64;11321132- struct zip_quex_err_int_w1s_s {11331133-#if defined(__BIG_ENDIAN_BITFIELD)11341134- u64 reserved_5_63 : 59;11351135- u64 mdbe : 1;11361136- u64 nwrp : 1;11371137- u64 nrrp : 1;11381138- u64 irde : 1;11391139- u64 dovf : 1;11401140-#elif defined(__LITTLE_ENDIAN_BITFIELD)11411141- u64 dovf : 1;11421142- u64 irde : 1;11431143- u64 nrrp : 1;11441144- u64 nwrp : 1;11451145- u64 mdbe : 1;11461146- u64 reserved_5_63 : 59;11471147-#endif11481148- } s;11491149-};11501150-11511151-static inline u64 ZIP_QUEX_ERR_INT_W1S(u64 param1)11521152-{11531153- if (param1 <= 7)11541154- return 0x3200ull + (param1 & 7) * 0x8ull;11551155- pr_err("ZIP_QUEX_ERR_INT_W1S: %llu\n", param1);11561156- return 0;11571157-}11581158-11591159-/**11601160- * union zip_quex_gcfg - Represents the registers that reflect status of the11611161- * zip instruction queues,debug use only.11621162- */11631163-union zip_quex_gcfg {11641164- u64 u_reg64;11651165- struct zip_quex_gcfg_s {11661166-#if defined(__BIG_ENDIAN_BITFIELD)11671167- u64 reserved_4_63 : 60;11681168- u64 iqb_ldwb : 1;11691169- u64 cbw_sty : 1;11701170- u64 l2ld_cmd : 2;11711171-#elif defined(__LITTLE_ENDIAN_BITFIELD)11721172- u64 l2ld_cmd : 2;11731173- u64 cbw_sty : 1;11741174- u64 iqb_ldwb : 1;11751175- u64 reserved_4_63 : 60;11761176-#endif11771177- } s;11781178-};11791179-11801180-static inline u64 ZIP_QUEX_GCFG(u64 param1)11811181-{11821182- if (param1 <= 7)11831183- return 0x1A00ull + (param1 & 7) * 0x8ull;11841184- pr_err("ZIP_QUEX_GCFG: %llu\n", param1);11851185- return 0;11861186-}11871187-11881188-/**11891189- * union zip_quex_map - Represents the registers that control how each11901190- * instruction queue maps to zip cores.11911191- */11921192-union zip_quex_map {11931193- u64 u_reg64;11941194- struct zip_quex_map_s {11951195-#if defined(__BIG_ENDIAN_BITFIELD)11961196- u64 reserved_2_63 : 62;11971197- u64 zce : 2;11981198-#elif defined(__LITTLE_ENDIAN_BITFIELD)11991199- u64 zce : 2;12001200- u64 reserved_2_63 : 62;12011201-#endif12021202- } s;12031203-};12041204-12051205-static inline u64 ZIP_QUEX_MAP(u64 param1)12061206-{12071207- if (param1 <= 7)12081208- return 0x1400ull + (param1 & 7) * 0x8ull;12091209- pr_err("ZIP_QUEX_MAP: %llu\n", param1);12101210- return 0;12111211-}12121212-12131213-/**12141214- * union zip_quex_sbuf_addr - Represents the registers that set the buffer12151215- * parameters for the instruction queues.12161216- *12171217- * When quiescent (i.e. outstanding doorbell count is 0), it is safe to rewrite12181218- * this register to effectively reset the command buffer state machine.12191219- * These registers must be programmed after SW programs the corresponding12201220- * ZIP_QUE(0..7)_SBUF_CTL.12211221- */12221222-union zip_quex_sbuf_addr {12231223- u64 u_reg64;12241224- struct zip_quex_sbuf_addr_s {12251225-#if defined(__BIG_ENDIAN_BITFIELD)12261226- u64 reserved_49_63 : 15;12271227- u64 ptr : 42;12281228- u64 off : 7;12291229-#elif defined(__LITTLE_ENDIAN_BITFIELD)12301230- u64 off : 7;12311231- u64 ptr : 42;12321232- u64 reserved_49_63 : 15;12331233-#endif12341234- } s;12351235-};12361236-12371237-static inline u64 ZIP_QUEX_SBUF_ADDR(u64 param1)12381238-{12391239- if (param1 <= 7)12401240- return 0x1000ull + (param1 & 7) * 0x8ull;12411241- pr_err("ZIP_QUEX_SBUF_ADDR: %llu\n", param1);12421242- return 0;12431243-}12441244-12451245-/**12461246- * union zip_quex_sbuf_ctl - Represents the registers that set the buffer12471247- * parameters for the instruction queues.12481248- *12491249- * When quiescent (i.e. outstanding doorbell count is 0), it is safe to rewrite12501250- * this register to effectively reset the command buffer state machine.12511251- * These registers must be programmed before SW programs the corresponding12521252- * ZIP_QUE(0..7)_SBUF_ADDR.12531253- */12541254-union zip_quex_sbuf_ctl {12551255- u64 u_reg64;12561256- struct zip_quex_sbuf_ctl_s {12571257-#if defined(__BIG_ENDIAN_BITFIELD)12581258- u64 reserved_45_63 : 19;12591259- u64 size : 13;12601260- u64 inst_be : 1;12611261- u64 reserved_24_30 : 7;12621262- u64 stream_id : 8;12631263- u64 reserved_12_15 : 4;12641264- u64 aura : 12;12651265-#elif defined(__LITTLE_ENDIAN_BITFIELD)12661266- u64 aura : 12;12671267- u64 reserved_12_15 : 4;12681268- u64 stream_id : 8;12691269- u64 reserved_24_30 : 7;12701270- u64 inst_be : 1;12711271- u64 size : 13;12721272- u64 reserved_45_63 : 19;12731273-#endif12741274- } s;12751275-};12761276-12771277-static inline u64 ZIP_QUEX_SBUF_CTL(u64 param1)12781278-{12791279- if (param1 <= 7)12801280- return 0x1200ull + (param1 & 7) * 0x8ull;12811281- pr_err("ZIP_QUEX_SBUF_CTL: %llu\n", param1);12821282- return 0;12831283-}12841284-12851285-/**12861286- * union zip_que_ena - Represents queue enable register12871287- *12881288- * If a queue is disabled, ZIP_CTL stops fetching instructions from the queue.12891289- */12901290-union zip_que_ena {12911291- u64 u_reg64;12921292- struct zip_que_ena_s {12931293-#if defined(__BIG_ENDIAN_BITFIELD)12941294- u64 reserved_8_63 : 56;12951295- u64 ena : 8;12961296-#elif defined(__LITTLE_ENDIAN_BITFIELD)12971297- u64 ena : 8;12981298- u64 reserved_8_63 : 56;12991299-#endif13001300- } s;13011301-};13021302-13031303-#define ZIP_QUE_ENA 0x0500ull13041304-13051305-/**13061306- * union zip_que_pri - Represents the register that defines the priority13071307- * between instruction queues.13081308- */13091309-union zip_que_pri {13101310- u64 u_reg64;13111311- struct zip_que_pri_s {13121312-#if defined(__BIG_ENDIAN_BITFIELD)13131313- u64 reserved_8_63 : 56;13141314- u64 pri : 8;13151315-#elif defined(__LITTLE_ENDIAN_BITFIELD)13161316- u64 pri : 8;13171317- u64 reserved_8_63 : 56;13181318-#endif13191319- } s;13201320-};13211321-13221322-#define ZIP_QUE_PRI 0x0508ull13231323-13241324-/**13251325- * union zip_throttle - Represents the register that controls the maximum13261326- * number of in-flight X2I data fetch transactions.13271327- *13281328- * Writing 0 to this register causes the ZIP module to temporarily suspend NCB13291329- * accesses; it is not recommended for normal operation, but may be useful for13301330- * diagnostics.13311331- */13321332-union zip_throttle {13331333- u64 u_reg64;13341334- struct zip_throttle_s {13351335-#if defined(__BIG_ENDIAN_BITFIELD)13361336- u64 reserved_6_63 : 58;13371337- u64 ld_infl : 6;13381338-#elif defined(__LITTLE_ENDIAN_BITFIELD)13391339- u64 ld_infl : 6;13401340- u64 reserved_6_63 : 58;13411341-#endif13421342- } s;13431343-};13441344-13451345-#define ZIP_THROTTLE 0x0010ull13461346-13471347-#endif /* _CSRS_ZIP__ */