arm: mmp: Make use of the DT supported clock

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>

authored by

Chao Xie and committed by

Michael Turquette 11 years ago d41ef540 51454eb4

+113 -64

6 changed files

expand all

arch

arm

boot

dts

mmp2.dtsi

pxa168.dtsi

pxa910.dtsi

mach-mmp

Kconfig

mmp-dt.c

mmp2-dt.c

+27

arch/arm/boot/dts/mmp2.dtsi

··· 8 8 */ 9 9 10 10 #include "skeleton.dtsi" 11 + #include <dt-bindings/clock/marvell,mmp2.h> 11 12 12 13 / { 13 14 aliases { ··· 136 135 compatible = "mrvl,mmp-uart"; 137 136 reg = <0xd4030000 0x1000>; 138 137 interrupts = <27>; 138 + clocks = <&soc_clocks MMP2_CLK_UART0>; 139 + resets = <&soc_clocks MMP2_CLK_UART0>; 139 140 status = "disabled"; 140 141 }; 141 142 ··· 145 142 compatible = "mrvl,mmp-uart"; 146 143 reg = <0xd4017000 0x1000>; 147 144 interrupts = <28>; 145 + clocks = <&soc_clocks MMP2_CLK_UART1>; 146 + resets = <&soc_clocks MMP2_CLK_UART1>; 148 147 status = "disabled"; 149 148 }; 150 149 ··· 154 149 compatible = "mrvl,mmp-uart"; 155 150 reg = <0xd4018000 0x1000>; 156 151 interrupts = <24>; 152 + clocks = <&soc_clocks MMP2_CLK_UART2>; 153 + resets = <&soc_clocks MMP2_CLK_UART2>; 157 154 status = "disabled"; 158 155 }; 159 156 ··· 163 156 compatible = "mrvl,mmp-uart"; 164 157 reg = <0xd4016000 0x1000>; 165 158 interrupts = <46>; 159 + clocks = <&soc_clocks MMP2_CLK_UART3>; 160 + resets = <&soc_clocks MMP2_CLK_UART3>; 166 161 status = "disabled"; 167 162 }; 168 163 ··· 177 168 #gpio-cells = <2>; 178 169 interrupts = <49>; 179 170 interrupt-names = "gpio_mux"; 171 + clocks = <&soc_clocks MMP2_CLK_GPIO>; 172 + resets = <&soc_clocks MMP2_CLK_GPIO>; 180 173 interrupt-controller; 181 174 #interrupt-cells = <1>; 182 175 ranges; ··· 212 201 compatible = "mrvl,mmp-twsi"; 213 202 reg = <0xd4011000 0x1000>; 214 203 interrupts = <7>; 204 + clocks = <&soc_clocks MMP2_CLK_TWSI0>; 205 + resets = <&soc_clocks MMP2_CLK_TWSI0>; 215 206 #address-cells = <1>; 216 207 #size-cells = <0>; 217 208 mrvl,i2c-fast-mode; ··· 224 211 compatible = "mrvl,mmp-twsi"; 225 212 reg = <0xd4025000 0x1000>; 226 213 interrupts = <58>; 214 + clocks = <&soc_clocks MMP2_CLK_TWSI1>; 215 + resets = <&soc_clocks MMP2_CLK_TWSI1>; 227 216 status = "disabled"; 228 217 }; 229 218 ··· 235 220 interrupts = <1 0>; 236 221 interrupt-names = "rtc 1Hz", "rtc alarm"; 237 222 interrupt-parent = <&intcmux5>; 223 + clocks = <&soc_clocks MMP2_CLK_RTC>; 224 + resets = <&soc_clocks MMP2_CLK_RTC>; 238 225 status = "disabled"; 239 226 }; 227 + }; 228 + 229 + soc_clocks: clocks{ 230 + compatible = "marvell,mmp2-clock"; 231 + reg = <0xd4050000 0x1000>, 232 + <0xd4282800 0x400>, 233 + <0xd4015000 0x1000>; 234 + reg-names = "mpmu", "apmu", "apbc"; 235 + #clock-cells = <1>; 236 + #reset-cells = <1>; 240 237 }; 241 238 }; 242 239 };

+25

arch/arm/boot/dts/pxa168.dtsi

··· 8 8 */ 9 9 10 10 #include "skeleton.dtsi" 11 + #include <dt-bindings/clock/marvell,pxa168.h> 11 12 12 13 / { 13 14 aliases { ··· 60 59 compatible = "mrvl,mmp-uart"; 61 60 reg = <0xd4017000 0x1000>; 62 61 interrupts = <27>; 62 + clocks = <&soc_clocks PXA168_CLK_UART0>; 63 + resets = <&soc_clocks PXA168_CLK_UART0>; 63 64 status = "disabled"; 64 65 }; 65 66 ··· 69 66 compatible = "mrvl,mmp-uart"; 70 67 reg = <0xd4018000 0x1000>; 71 68 interrupts = <28>; 69 + clocks = <&soc_clocks PXA168_CLK_UART1>; 70 + resets = <&soc_clocks PXA168_CLK_UART1>; 72 71 status = "disabled"; 73 72 }; 74 73 ··· 78 73 compatible = "mrvl,mmp-uart"; 79 74 reg = <0xd4026000 0x1000>; 80 75 interrupts = <29>; 76 + clocks = <&soc_clocks PXA168_CLK_UART2>; 77 + resets = <&soc_clocks PXA168_CLK_UART2>; 81 78 status = "disabled"; 82 79 }; 83 80 ··· 91 84 gpio-controller; 92 85 #gpio-cells = <2>; 93 86 interrupts = <49>; 87 + clocks = <&soc_clocks PXA168_CLK_GPIO>; 88 + resets = <&soc_clocks PXA168_CLK_GPIO>; 94 89 interrupt-names = "gpio_mux"; 95 90 interrupt-controller; 96 91 #interrupt-cells = <1>; ··· 119 110 compatible = "mrvl,mmp-twsi"; 120 111 reg = <0xd4011000 0x1000>; 121 112 interrupts = <7>; 113 + clocks = <&soc_clocks PXA168_CLK_TWSI0>; 114 + resets = <&soc_clocks PXA168_CLK_TWSI0>; 122 115 mrvl,i2c-fast-mode; 123 116 status = "disabled"; 124 117 }; ··· 129 118 compatible = "mrvl,mmp-twsi"; 130 119 reg = <0xd4025000 0x1000>; 131 120 interrupts = <58>; 121 + clocks = <&soc_clocks PXA168_CLK_TWSI1>; 122 + resets = <&soc_clocks PXA168_CLK_TWSI1>; 132 123 status = "disabled"; 133 124 }; 134 125 ··· 139 126 reg = <0xd4010000 0x1000>; 140 127 interrupts = <5 6>; 141 128 interrupt-names = "rtc 1Hz", "rtc alarm"; 129 + clocks = <&soc_clocks PXA168_CLK_RTC>; 130 + resets = <&soc_clocks PXA168_CLK_RTC>; 142 131 status = "disabled"; 143 132 }; 133 + }; 134 + 135 + soc_clocks: clocks{ 136 + compatible = "marvell,pxa168-clock"; 137 + reg = <0xd4050000 0x1000>, 138 + <0xd4282800 0x400>, 139 + <0xd4015000 0x1000>; 140 + reg-names = "mpmu", "apmu", "apbc"; 141 + #clock-cells = <1>; 142 + #reset-cells = <1>; 144 143 }; 145 144 }; 146 145 };

+26

arch/arm/boot/dts/pxa910.dtsi

··· 8 8 */ 9 9 10 10 #include "skeleton.dtsi" 11 + #include <dt-bindings/clock/marvell,pxa910.h> 11 12 12 13 / { 13 14 aliases { ··· 72 71 compatible = "mrvl,mmp-uart"; 73 72 reg = <0xd4017000 0x1000>; 74 73 interrupts = <27>; 74 + clocks = <&soc_clocks PXA910_CLK_UART0>; 75 + resets = <&soc_clocks PXA910_CLK_UART0>; 75 76 status = "disabled"; 76 77 }; 77 78 ··· 81 78 compatible = "mrvl,mmp-uart"; 82 79 reg = <0xd4018000 0x1000>; 83 80 interrupts = <28>; 81 + clocks = <&soc_clocks PXA910_CLK_UART1>; 82 + resets = <&soc_clocks PXA910_CLK_UART1>; 84 83 status = "disabled"; 85 84 }; 86 85 ··· 90 85 compatible = "mrvl,mmp-uart"; 91 86 reg = <0xd4036000 0x1000>; 92 87 interrupts = <59>; 88 + clocks = <&soc_clocks PXA910_CLK_UART2>; 89 + resets = <&soc_clocks PXA910_CLK_UART2>; 93 90 status = "disabled"; 94 91 }; 95 92 ··· 104 97 #gpio-cells = <2>; 105 98 interrupts = <49>; 106 99 interrupt-names = "gpio_mux"; 100 + clocks = <&soc_clocks PXA910_CLK_GPIO>; 101 + resets = <&soc_clocks PXA910_CLK_GPIO>; 107 102 interrupt-controller; 108 103 #interrupt-cells = <1>; 109 104 ranges; ··· 133 124 #size-cells = <0>; 134 125 reg = <0xd4011000 0x1000>; 135 126 interrupts = <7>; 127 + clocks = <&soc_clocks PXA910_CLK_TWSI0>; 128 + resets = <&soc_clocks PXA910_CLK_TWSI0>; 136 129 mrvl,i2c-fast-mode; 137 130 status = "disabled"; 138 131 }; ··· 145 134 #size-cells = <0>; 146 135 reg = <0xd4037000 0x1000>; 147 136 interrupts = <54>; 137 + clocks = <&soc_clocks PXA910_CLK_TWSI1>; 138 + resets = <&soc_clocks PXA910_CLK_TWSI1>; 148 139 status = "disabled"; 149 140 }; 150 141 ··· 155 142 reg = <0xd4010000 0x1000>; 156 143 interrupts = <5 6>; 157 144 interrupt-names = "rtc 1Hz", "rtc alarm"; 145 + clocks = <&soc_clocks PXA910_CLK_RTC>; 146 + resets = <&soc_clocks PXA910_CLK_RTC>; 158 147 status = "disabled"; 159 148 }; 149 + }; 150 + 151 + soc_clocks: clocks{ 152 + compatible = "marvell,pxa910-clock"; 153 + reg = <0xd4050000 0x1000>, 154 + <0xd4282800 0x400>, 155 + <0xd4015000 0x1000>, 156 + <0xd403b000 0x1000>; 157 + reg-names = "mpmu", "apmu", "apbc", "apbcp"; 158 + #clock-cells = <1>; 159 + #reset-cells = <1>; 160 160 }; 161 161 }; 162 162 };

+6 -6

arch/arm/mach-mmp/Kconfig

··· 86 86 87 87 config MACH_MMP_DT 88 88 bool "Support MMP (ARMv5) platforms from device tree" 89 - select CPU_PXA168 90 - select CPU_PXA910 91 89 select USE_OF 92 90 select PINCTRL 93 91 select PINCTRL_SINGLE 92 + select COMMON_CLK 93 + select ARCH_HAS_RESET_CONTROLLER 94 + select CPU_MOHAWK 94 95 help 95 96 Include support for Marvell MMP2 based platforms using 96 97 the device tree. Needn't select any other machine while ··· 100 99 config MACH_MMP2_DT 101 100 bool "Support MMP2 (ARMv7) platforms from device tree" 102 101 depends on !CPU_MOHAWK 103 - select CPU_MMP2 104 102 select USE_OF 105 103 select PINCTRL 106 104 select PINCTRL_SINGLE 105 + select COMMON_CLK 106 + select ARCH_HAS_RESET_CONTROLLER 107 + select CPU_PJ4 107 108 help 108 109 Include support for Marvell MMP2 based platforms using 109 110 the device tree. ··· 114 111 115 112 config CPU_PXA168 116 113 bool 117 - select COMMON_CLK 118 114 select CPU_MOHAWK 119 115 help 120 116 Select code specific to PXA168 121 117 122 118 config CPU_PXA910 123 119 bool 124 - select COMMON_CLK 125 120 select CPU_MOHAWK 126 121 help 127 122 Select code specific to PXA910 128 123 129 124 config CPU_MMP2 130 125 bool 131 - select COMMON_CLK 132 126 select CPU_PJ4 133 127 help 134 128 Select code specific to MMP2. MMP2 is ARMv7 compatible.

+20 -41

arch/arm/mach-mmp/mmp-dt.c

··· 11 11 12 12 #include <linux/irqchip.h> 13 13 #include <linux/of_platform.h> 14 + #include <linux/clk-provider.h> 14 15 #include <asm/mach/arch.h> 15 16 #include <asm/mach/time.h> 17 + #include <asm/hardware/cache-tauros2.h> 16 18 17 19 #include "common.h" 18 20 19 21 extern void __init mmp_dt_init_timer(void); 20 22 21 - static const struct of_dev_auxdata pxa168_auxdata_lookup[] __initconst = { 22 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL), 23 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL), 24 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4026000, "pxa2xx-uart.2", NULL), 25 - OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL), 26 - OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL), 27 - OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp-gpio", NULL), 28 - OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL), 29 - {} 30 - }; 31 - 32 - static const struct of_dev_auxdata pxa910_auxdata_lookup[] __initconst = { 33 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.0", NULL), 34 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.1", NULL), 35 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4036000, "pxa2xx-uart.2", NULL), 36 - OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL), 37 - OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4037000, "pxa2xx-i2c.1", NULL), 38 - OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp-gpio", NULL), 39 - OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL), 40 - {} 41 - }; 42 - 43 - static void __init pxa168_dt_init(void) 44 - { 45 - of_platform_populate(NULL, of_default_bus_match_table, 46 - pxa168_auxdata_lookup, NULL); 47 - } 48 - 49 - static void __init pxa910_dt_init(void) 50 - { 51 - of_platform_populate(NULL, of_default_bus_match_table, 52 - pxa910_auxdata_lookup, NULL); 53 - } 54 - 55 - static const char *mmp_dt_board_compat[] __initdata = { 23 + static const char *pxa168_dt_board_compat[] __initdata = { 56 24 "mrvl,pxa168-aspenite", 25 + NULL, 26 + }; 27 + 28 + static const char *pxa910_dt_board_compat[] __initdata = { 57 29 "mrvl,pxa910-dkb", 58 30 NULL, 59 31 }; 60 32 33 + static void __init mmp_init_time(void) 34 + { 35 + #ifdef CONFIG_CACHE_TAUROS2 36 + tauros2_init(0); 37 + #endif 38 + mmp_dt_init_timer(); 39 + of_clk_init(NULL); 40 + } 41 + 61 42 DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)") 62 43 .map_io = mmp_map_io, 63 - .init_time = mmp_dt_init_timer, 64 - .init_machine = pxa168_dt_init, 65 - .dt_compat = mmp_dt_board_compat, 44 + .init_time = mmp_init_time, 45 + .dt_compat = pxa168_dt_board_compat, 66 46 MACHINE_END 67 47 68 48 DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)") 69 49 .map_io = mmp_map_io, 70 - .init_time = mmp_dt_init_timer, 71 - .init_machine = pxa910_dt_init, 72 - .dt_compat = mmp_dt_board_compat, 50 + .init_time = mmp_init_time, 51 + .dt_compat = pxa910_dt_board_compat, 73 52 MACHINE_END

+9 -17

arch/arm/mach-mmp/mmp2-dt.c

··· 12 12 #include <linux/io.h> 13 13 #include <linux/irqchip.h> 14 14 #include <linux/of_platform.h> 15 + #include <linux/clk-provider.h> 15 16 #include <asm/mach/arch.h> 16 17 #include <asm/mach/time.h> 18 + #include <asm/hardware/cache-tauros2.h> 17 19 18 20 #include "common.h" 19 21 20 22 extern void __init mmp_dt_init_timer(void); 21 23 22 - static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = { 23 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4030000, "pxa2xx-uart.0", NULL), 24 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4017000, "pxa2xx-uart.1", NULL), 25 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4018000, "pxa2xx-uart.2", NULL), 26 - OF_DEV_AUXDATA("mrvl,mmp-uart", 0xd4016000, "pxa2xx-uart.3", NULL), 27 - OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4011000, "pxa2xx-i2c.0", NULL), 28 - OF_DEV_AUXDATA("mrvl,mmp-twsi", 0xd4025000, "pxa2xx-i2c.1", NULL), 29 - OF_DEV_AUXDATA("marvell,mmp-gpio", 0xd4019000, "mmp2-gpio", NULL), 30 - OF_DEV_AUXDATA("mrvl,mmp-rtc", 0xd4010000, "sa1100-rtc", NULL), 31 - {} 32 - }; 33 - 34 - static void __init mmp2_dt_init(void) 24 + static void __init mmp_init_time(void) 35 25 { 36 - of_platform_populate(NULL, of_default_bus_match_table, 37 - mmp2_auxdata_lookup, NULL); 26 + #ifdef CONFIG_CACHE_TAUROS2 27 + tauros2_init(0); 28 + #endif 29 + mmp_dt_init_timer(); 30 + of_clk_init(NULL); 38 31 } 39 32 40 33 static const char *mmp2_dt_board_compat[] __initdata = { ··· 37 44 38 45 DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)") 39 46 .map_io = mmp_map_io, 40 - .init_time = mmp_dt_init_timer, 41 - .init_machine = mmp2_dt_init, 47 + .init_time = mmp_init_time, 42 48 .dt_compat = mmp2_dt_board_compat, 43 49 MACHINE_END