Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drivers: net: cpsw-phy-sel: add dra7xx support for phy sel

Add dra7xx support for selecting the phy mode which is present in control
module of dra7xx SoC

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Mugunthan V N and committed by
David S. Miller
d415fa1b 84ef36bd

+58 -2
+2 -1
Documentation/devicetree/bindings/net/cpsw-phy-sel.txt
··· 2 2 ----------------------------------------------- 3 3 4 4 Required properties: 5 - - compatible : Should be "ti,am3352-cpsw-phy-sel" 5 + - compatible : Should be "ti,am3352-cpsw-phy-sel" for am335x platform and 6 + "ti,dra7xx-cpsw-phy-sel" for dra7xx platform 6 7 - reg : physical base address and size of the cpsw 7 8 registers map 8 9 - reg-names : names of the register map given in "reg" node
+56 -1
drivers/net/ethernet/ti/cpsw-phy-sel.c
··· 29 29 #define AM33XX_GMII_SEL_RMII2_IO_CLK_EN BIT(7) 30 30 #define AM33XX_GMII_SEL_RMII1_IO_CLK_EN BIT(6) 31 31 32 + #define GMII_SEL_MODE_MASK 0x3 33 + 32 34 struct cpsw_phy_sel_priv { 33 35 struct device *dev; 34 36 u32 __iomem *gmii_sel; ··· 67 65 break; 68 66 }; 69 67 70 - mask = 0x3 << (slave * 2) | BIT(slave + 6); 68 + mask = GMII_SEL_MODE_MASK << (slave * 2) | BIT(slave + 6); 71 69 mode <<= slave * 2; 72 70 73 71 if (priv->rmii_clock_external) { ··· 76 74 else 77 75 mode |= AM33XX_GMII_SEL_RMII2_IO_CLK_EN; 78 76 } 77 + 78 + reg &= ~mask; 79 + reg |= mode; 80 + 81 + writel(reg, priv->gmii_sel); 82 + } 83 + 84 + static void cpsw_gmii_sel_dra7xx(struct cpsw_phy_sel_priv *priv, 85 + phy_interface_t phy_mode, int slave) 86 + { 87 + u32 reg; 88 + u32 mask; 89 + u32 mode = 0; 90 + 91 + reg = readl(priv->gmii_sel); 92 + 93 + switch (phy_mode) { 94 + case PHY_INTERFACE_MODE_RMII: 95 + mode = AM33XX_GMII_SEL_MODE_RMII; 96 + break; 97 + 98 + case PHY_INTERFACE_MODE_RGMII: 99 + case PHY_INTERFACE_MODE_RGMII_ID: 100 + case PHY_INTERFACE_MODE_RGMII_RXID: 101 + case PHY_INTERFACE_MODE_RGMII_TXID: 102 + mode = AM33XX_GMII_SEL_MODE_RGMII; 103 + break; 104 + 105 + case PHY_INTERFACE_MODE_MII: 106 + default: 107 + mode = AM33XX_GMII_SEL_MODE_MII; 108 + break; 109 + }; 110 + 111 + switch (slave) { 112 + case 0: 113 + mask = GMII_SEL_MODE_MASK; 114 + break; 115 + case 1: 116 + mask = GMII_SEL_MODE_MASK << 4; 117 + mode <<= 4; 118 + break; 119 + default: 120 + dev_err(priv->dev, "invalid slave number...\n"); 121 + return; 122 + } 123 + 124 + if (priv->rmii_clock_external) 125 + dev_err(priv->dev, "RMII External clock is not supported\n"); 79 126 80 127 reg &= ~mask; 81 128 reg |= mode; ··· 162 111 { 163 112 .compatible = "ti,am3352-cpsw-phy-sel", 164 113 .data = &cpsw_gmii_sel_am3352, 114 + }, 115 + { 116 + .compatible = "ti,dra7xx-cpsw-phy-sel", 117 + .data = &cpsw_gmii_sel_dra7xx, 165 118 }, 166 119 {} 167 120 };