Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

x86/hpet: Rename variables to prepare for switching to channels

struct hpet_dev is gone with the next change as the clockevent storage
moves into struct hpet_channel. So the variable name hdev will not make
sense anymore. Ditto for timer vs. channel and similar details.

Doing the rename in the change makes the patch harder to review. Doing it
afterward is problematic vs. tracking down issues. Doing it upfront is the
easiest solution as it does not change functionality.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Andi Kleen <andi.kleen@intel.com>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Ravi Shankar <ravi.v.shankar@intel.com>
Link: https://lkml.kernel.org/r/20190623132436.093113681@linutronix.de

authored by

Ingo Molnar and committed by
Thomas Gleixner
d415c754 af5a1dad

+62 -62
+62 -62
arch/x86/kernel/hpet.c
··· 315 315 pr_debug("Clockevent registered\n"); 316 316 } 317 317 318 - static int hpet_set_periodic(struct clock_event_device *evt, int timer) 318 + static int hpet_set_periodic(struct clock_event_device *evt, int channel) 319 319 { 320 320 unsigned int cfg, cmp, now; 321 321 uint64_t delta; ··· 325 325 delta >>= evt->shift; 326 326 now = hpet_readl(HPET_COUNTER); 327 327 cmp = now + (unsigned int)delta; 328 - cfg = hpet_readl(HPET_Tn_CFG(timer)); 328 + cfg = hpet_readl(HPET_Tn_CFG(channel)); 329 329 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL | 330 330 HPET_TN_32BIT; 331 - hpet_writel(cfg, HPET_Tn_CFG(timer)); 332 - hpet_writel(cmp, HPET_Tn_CMP(timer)); 331 + hpet_writel(cfg, HPET_Tn_CFG(channel)); 332 + hpet_writel(cmp, HPET_Tn_CMP(channel)); 333 333 udelay(1); 334 334 /* 335 335 * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL ··· 338 338 * (See AMD-8111 HyperTransport I/O Hub Data Sheet, 339 339 * Publication # 24674) 340 340 */ 341 - hpet_writel((unsigned int)delta, HPET_Tn_CMP(timer)); 341 + hpet_writel((unsigned int)delta, HPET_Tn_CMP(channel)); 342 342 hpet_start_counter(); 343 343 hpet_print_config(); 344 344 345 345 return 0; 346 346 } 347 347 348 - static int hpet_set_oneshot(struct clock_event_device *evt, int timer) 348 + static int hpet_set_oneshot(struct clock_event_device *evt, int channel) 349 349 { 350 350 unsigned int cfg; 351 351 352 - cfg = hpet_readl(HPET_Tn_CFG(timer)); 352 + cfg = hpet_readl(HPET_Tn_CFG(channel)); 353 353 cfg &= ~HPET_TN_PERIODIC; 354 354 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT; 355 - hpet_writel(cfg, HPET_Tn_CFG(timer)); 355 + hpet_writel(cfg, HPET_Tn_CFG(channel)); 356 356 357 357 return 0; 358 358 } 359 359 360 - static int hpet_shutdown(struct clock_event_device *evt, int timer) 360 + static int hpet_shutdown(struct clock_event_device *evt, int channel) 361 361 { 362 362 unsigned int cfg; 363 363 364 - cfg = hpet_readl(HPET_Tn_CFG(timer)); 364 + cfg = hpet_readl(HPET_Tn_CFG(channel)); 365 365 cfg &= ~HPET_TN_ENABLE; 366 - hpet_writel(cfg, HPET_Tn_CFG(timer)); 366 + hpet_writel(cfg, HPET_Tn_CFG(channel)); 367 367 368 368 return 0; 369 369 } ··· 460 460 461 461 void hpet_msi_unmask(struct irq_data *data) 462 462 { 463 - struct hpet_dev *hdev = irq_data_get_irq_handler_data(data); 463 + struct hpet_dev *hc = irq_data_get_irq_handler_data(data); 464 464 unsigned int cfg; 465 465 466 466 /* unmask it */ 467 - cfg = hpet_readl(HPET_Tn_CFG(hdev->num)); 467 + cfg = hpet_readl(HPET_Tn_CFG(hc->num)); 468 468 cfg |= HPET_TN_ENABLE | HPET_TN_FSB; 469 - hpet_writel(cfg, HPET_Tn_CFG(hdev->num)); 469 + hpet_writel(cfg, HPET_Tn_CFG(hc->num)); 470 470 } 471 471 472 472 void hpet_msi_mask(struct irq_data *data) 473 473 { 474 - struct hpet_dev *hdev = irq_data_get_irq_handler_data(data); 474 + struct hpet_dev *hc = irq_data_get_irq_handler_data(data); 475 475 unsigned int cfg; 476 476 477 477 /* mask it */ 478 - cfg = hpet_readl(HPET_Tn_CFG(hdev->num)); 478 + cfg = hpet_readl(HPET_Tn_CFG(hc->num)); 479 479 cfg &= ~(HPET_TN_ENABLE | HPET_TN_FSB); 480 - hpet_writel(cfg, HPET_Tn_CFG(hdev->num)); 480 + hpet_writel(cfg, HPET_Tn_CFG(hc->num)); 481 481 } 482 482 483 - void hpet_msi_write(struct hpet_dev *hdev, struct msi_msg *msg) 483 + void hpet_msi_write(struct hpet_dev *hc, struct msi_msg *msg) 484 484 { 485 - hpet_writel(msg->data, HPET_Tn_ROUTE(hdev->num)); 486 - hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hdev->num) + 4); 485 + hpet_writel(msg->data, HPET_Tn_ROUTE(hc->num)); 486 + hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hc->num) + 4); 487 487 } 488 488 489 489 static int hpet_msi_shutdown(struct clock_event_device *evt) ··· 503 503 504 504 static int hpet_msi_resume(struct clock_event_device *evt) 505 505 { 506 - struct hpet_dev *hdev = clockevent_to_channel(evt); 507 - struct irq_data *data = irq_get_irq_data(hdev->irq); 506 + struct hpet_dev *hc = clockevent_to_channel(evt); 507 + struct irq_data *data = irq_get_irq_data(hc->irq); 508 508 struct msi_msg msg; 509 509 510 510 /* Restore the MSI msg and unmask the interrupt */ 511 511 irq_chip_compose_msi_msg(data, &msg); 512 - hpet_msi_write(hdev, &msg); 512 + hpet_msi_write(hc, &msg); 513 513 hpet_msi_unmask(data); 514 514 return 0; 515 515 } ··· 522 522 523 523 static irqreturn_t hpet_interrupt_handler(int irq, void *data) 524 524 { 525 - struct hpet_dev *dev = data; 526 - struct clock_event_device *evt = &dev->evt; 525 + struct hpet_dev *hc = data; 526 + struct clock_event_device *evt = &hc->evt; 527 527 528 528 if (!evt->event_handler) { 529 - pr_info("Spurious interrupt HPET timer %d\n", dev->num); 529 + pr_info("Spurious interrupt HPET channel %d\n", hc->num); 530 530 return IRQ_HANDLED; 531 531 } 532 532 ··· 551 551 return 0; 552 552 } 553 553 554 - static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu) 554 + static void init_one_hpet_msi_clockevent(struct hpet_dev *hc, int cpu) 555 555 { 556 - struct clock_event_device *evt = &hdev->evt; 556 + struct clock_event_device *evt = &hc->evt; 557 557 558 - if (!(hdev->flags & HPET_DEV_VALID)) 558 + if (!(hc->flags & HPET_DEV_VALID)) 559 559 return; 560 560 561 - hdev->cpu = cpu; 562 - per_cpu(cpu_hpet_dev, cpu) = hdev; 563 - evt->name = hdev->name; 564 - hpet_setup_irq(hdev); 565 - evt->irq = hdev->irq; 561 + hc->cpu = cpu; 562 + per_cpu(cpu_hpet_dev, cpu) = hc; 563 + evt->name = hc->name; 564 + hpet_setup_irq(hc); 565 + evt->irq = hc->irq; 566 566 567 567 evt->rating = 110; 568 568 evt->features = CLOCK_EVT_FEAT_ONESHOT; 569 - if (hdev->flags & HPET_DEV_PERI_CAP) { 569 + if (hc->flags & HPET_DEV_PERI_CAP) { 570 570 evt->features |= CLOCK_EVT_FEAT_PERIODIC; 571 571 evt->set_state_periodic = hpet_msi_set_periodic; 572 572 } ··· 575 575 evt->set_state_oneshot = hpet_msi_set_oneshot; 576 576 evt->tick_resume = hpet_msi_resume; 577 577 evt->set_next_event = hpet_msi_next_event; 578 - evt->cpumask = cpumask_of(hdev->cpu); 578 + evt->cpumask = cpumask_of(hc->cpu); 579 579 580 580 clockevents_config_and_register(evt, hpet_freq, HPET_MIN_PROG_DELTA, 581 581 0x7FFFFFFF); ··· 589 589 return NULL; 590 590 591 591 for (i = 0; i < hpet_base.nr_channels; i++) { 592 - struct hpet_dev *hdev = &hpet_devs[i]; 592 + struct hpet_dev *hc = &hpet_devs[i]; 593 593 594 - if (!(hdev->flags & HPET_DEV_VALID)) 594 + if (!(hc->flags & HPET_DEV_VALID)) 595 595 continue; 596 596 if (test_and_set_bit(HPET_DEV_USED_BIT, 597 - (unsigned long *)&hdev->flags)) 597 + (unsigned long *)&hc->flags)) 598 598 continue; 599 - return hdev; 599 + return hc; 600 600 } 601 601 return NULL; 602 602 } 603 603 604 604 static int hpet_cpuhp_online(unsigned int cpu) 605 605 { 606 - struct hpet_dev *hdev = hpet_get_unused_timer(); 606 + struct hpet_dev *hc = hpet_get_unused_timer(); 607 607 608 - if (hdev) 609 - init_one_hpet_msi_clockevent(hdev, cpu); 608 + if (hc) 609 + init_one_hpet_msi_clockevent(hc, cpu); 610 610 return 0; 611 611 } 612 612 613 613 static int hpet_cpuhp_dead(unsigned int cpu) 614 614 { 615 - struct hpet_dev *hdev = per_cpu(cpu_hpet_dev, cpu); 615 + struct hpet_dev *hc = per_cpu(cpu_hpet_dev, cpu); 616 616 617 - if (!hdev) 617 + if (!hc) 618 618 return 0; 619 - free_irq(hdev->irq, hdev); 620 - hdev->flags &= ~HPET_DEV_USED; 619 + free_irq(hc->irq, hc); 620 + hc->flags &= ~HPET_DEV_USED; 621 621 per_cpu(cpu_hpet_dev, cpu) = NULL; 622 622 return 0; 623 623 } ··· 653 653 return; 654 654 655 655 for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) { 656 - struct hpet_dev *hdev = &hpet_devs[num_timers_used]; 656 + struct hpet_dev *hc = &hpet_devs[num_timers_used]; 657 657 unsigned int cfg = hpet_base.channels[i].boot_cfg; 658 658 659 659 /* Only consider HPET timer with MSI support */ 660 660 if (!(cfg & HPET_TN_FSB_CAP)) 661 661 continue; 662 662 663 - hdev->flags = 0; 663 + hc->flags = 0; 664 664 if (cfg & HPET_TN_PERIODIC_CAP) 665 - hdev->flags |= HPET_DEV_PERI_CAP; 666 - sprintf(hdev->name, "hpet%d", i); 667 - hdev->num = i; 665 + hc->flags |= HPET_DEV_PERI_CAP; 666 + sprintf(hc->name, "hpet%d", i); 667 + hc->num = i; 668 668 669 - irq = hpet_assign_irq(hpet_domain, hdev, hdev->num); 669 + irq = hpet_assign_irq(hpet_domain, hc, hc->num); 670 670 if (irq <= 0) 671 671 continue; 672 672 673 - hdev->irq = irq; 674 - hdev->flags |= HPET_DEV_FSB_CAP; 675 - hdev->flags |= HPET_DEV_VALID; 673 + hc->irq = irq; 674 + hc->flags |= HPET_DEV_FSB_CAP; 675 + hc->flags |= HPET_DEV_VALID; 676 676 num_timers_used++; 677 677 if (num_timers_used == num_possible_cpus()) 678 678 break; ··· 691 691 return; 692 692 693 693 for (i = 0; i < hpet_base.nr_channels; i++) { 694 - struct hpet_dev *hdev = &hpet_devs[i]; 694 + struct hpet_dev *hc = &hpet_devs[i]; 695 695 696 - if (!(hdev->flags & HPET_DEV_VALID)) 696 + if (!(hc->flags & HPET_DEV_VALID)) 697 697 continue; 698 698 699 - hd->hd_irq[hdev->num] = hdev->irq; 700 - hpet_reserve_timer(hd, hdev->num); 699 + hd->hd_irq[hc->num] = hc->irq; 700 + hpet_reserve_timer(hd, hc->num); 701 701 } 702 702 } 703 703 #endif ··· 1138 1138 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler); 1139 1139 1140 1140 /* 1141 - * Timer 1 for RTC emulation. We use one shot mode, as periodic mode 1142 - * is not supported by all HPET implementations for timer 1. 1141 + * Channel 1 for RTC emulation. We use one shot mode, as periodic mode 1142 + * is not supported by all HPET implementations for channel 1. 1143 1143 * 1144 1144 * hpet_rtc_timer_init() is called when the rtc is initialized. 1145 1145 */