Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'regulator-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator

Pull regulator updates from Mark Brown:
"The core work this time around has mostly been around the code to
manage regulator modes, simplifying the interface for configuring
modes to not take account of the voltage and as a side effect
resolving a bootstrapping issue on systems where we can't read the
voltage from the regulator.

Otherwise it's been quite a quiet release with some new drivers and a
devm helper:

- Make the load handling in the Qualcomm RPMH regulators much more
idiomatic and general cleanups to the handling of load
configuration

- devm helper for a combined get and enable operation

- Support for MediaTek MT6331, Qualcomm PM660, 660L and PM6125, Texas
Instruments TPS65219"

* tag 'regulator-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (45 commits)
dt-bindings: gpio-regulator: add vin-supply property support
regulator: gpio: Add input_supply support in gpio_regulator_config
regulator: tps65219: Fix is_enabled checking in tps65219_set_bypass
regulator: qcom,rpmh: add pm660 and pm660l pmics
regulator: qcom-rpmh: add pm660 and pm660l pmics
regulator: of: Fix kernel-doc
regulator: of: Fix kernel-doc
regulator: Add driver for MT6332 PMIC regulators
regulator: Add bindings for MT6332 regulator
regulator: Add driver for MT6331 PMIC regulators
regulator: Add bindings for MT6331 regulator
regulator: tps65219: Fix .bypass_val_on setting
regulator: qcom_rpm: Fix circular deferral regression
regulator: core: Prevent integer underflow
regulator: dt-bindings: qcom,rpmh: Indicate regulator-allow-set-load dependencies
regulator: bd9576: switch to using devm_fwnode_gpiod_get()
regulator: bd71815: switch to using devm_fwnode_gpiod_get()
regulator: core: Fix regulator supply registration with sysfs
regulator: tps65219: change tps65219_regulator_irq_types to static
regulator: core: Don't err if allow-set-load but no allowed-modes
...

+2990 -358
+1
Documentation/devicetree/bindings/regulator/dlg,da9121.yaml
··· 83 83 84 84 regulators: 85 85 type: object 86 + additionalProperties: false 86 87 description: | 87 88 List of regulators provided by the device 88 89
+3
Documentation/devicetree/bindings/regulator/gpio-regulator.yaml
··· 85 85 - current 86 86 default: voltage 87 87 88 + vin-supply: 89 + description: Input supply phandle. 90 + 88 91 required: 89 92 - compatible 90 93 - regulator-name
+1
Documentation/devicetree/bindings/regulator/maxim,max77802.yaml
··· 79 79 patternProperties: 80 80 regulator-state-(standby|mem|disk): 81 81 type: object 82 + additionalProperties: true 82 83 properties: 83 84 regulator-mode: false 84 85
+1
Documentation/devicetree/bindings/regulator/maxim,max8997.yaml
··· 111 111 112 112 regulators: 113 113 type: object 114 + additionalProperties: false 114 115 description: 115 116 List of child nodes that specify the regulators. 116 117
+273
Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/regulator/mediatek,mt6331-regulator.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: MT6331 Regulator from MediaTek Integrated 8 + 9 + maintainers: 10 + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 11 + 12 + description: | 13 + The MT6331 PMIC provides 6 BUCK and 21 LDO (Low Dropout) regulators 14 + and nodes are named according to the regulator type: 15 + buck-<name> and ldo-<name>. 16 + MT6331 regulators node should be sub node of the MT6397 MFD node. 17 + 18 + patternProperties: 19 + "^buck-v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$": 20 + type: object 21 + $ref: "regulator.yaml#" 22 + 23 + properties: 24 + regulator-name: 25 + pattern: "^v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$" 26 + 27 + unevaluatedProperties: false 28 + 29 + "^ldo-v(avdd32aud|auxa32)$": 30 + type: object 31 + $ref: "regulator.yaml#" 32 + 33 + properties: 34 + regulator-name: 35 + pattern: "^v(avdd32aud|auxa32)$" 36 + 37 + unevaluatedProperties: false 38 + 39 + "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$": 40 + type: object 41 + $ref: "regulator.yaml#" 42 + 43 + properties: 44 + regulator-name: 45 + pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$" 46 + 47 + unevaluatedProperties: false 48 + 49 + "^ldo-vcam(a|af|d|io)$": 50 + type: object 51 + $ref: "regulator.yaml#" 52 + 53 + properties: 54 + regulator-name: 55 + pattern: "^vcam(a|af|d|io)$" 56 + 57 + unevaluatedProperties: false 58 + 59 + "^ldo-vtcxo[12]$": 60 + type: object 61 + $ref: "regulator.yaml#" 62 + 63 + properties: 64 + regulator-name: 65 + pattern: "^vtcxo[12]$" 66 + 67 + required: 68 + - regulator-name 69 + 70 + unevaluatedProperties: false 71 + 72 + "^ldo-vgp[1234]$": 73 + type: object 74 + $ref: "regulator.yaml#" 75 + 76 + properties: 77 + regulator-name: 78 + pattern: "^vgp[12]$" 79 + 80 + required: 81 + - regulator-name 82 + 83 + unevaluatedProperties: false 84 + 85 + additionalProperties: false 86 + 87 + examples: 88 + - | 89 + pmic { 90 + regulators { 91 + mt6331_vdvfs11_reg: buck-vdvfs11 { 92 + regulator-name = "vdvfs11"; 93 + regulator-min-microvolt = <700000>; 94 + regulator-max-microvolt = <1493750>; 95 + regulator-ramp-delay = <12500>; 96 + regulator-enable-ramp-delay = <1>; 97 + regulator-allowed-modes = <0 1>; 98 + }; 99 + mt6331_vdvfs12_reg: buck-vdvfs12 { 100 + regulator-name = "vdvfs12"; 101 + regulator-min-microvolt = <700000>; 102 + regulator-max-microvolt = <1493750>; 103 + regulator-ramp-delay = <12500>; 104 + regulator-enable-ramp-delay = <1>; 105 + regulator-allowed-modes = <0 1>; 106 + }; 107 + mt6331_vdvfs13_reg: buck-vdvfs13 { 108 + regulator-name = "vdvfs13"; 109 + regulator-min-microvolt = <700000>; 110 + regulator-max-microvolt = <1493750>; 111 + regulator-ramp-delay = <12500>; 112 + regulator-enable-ramp-delay = <1>; 113 + regulator-allowed-modes = <0 1>; 114 + }; 115 + mt6331_vdvfs14_reg: buck-vdvfs14 { 116 + regulator-name = "vdvfs14"; 117 + regulator-min-microvolt = <700000>; 118 + regulator-max-microvolt = <1493750>; 119 + regulator-ramp-delay = <12500>; 120 + regulator-enable-ramp-delay = <1>; 121 + regulator-allowed-modes = <0 1>; 122 + }; 123 + mt6331_vcore2_reg: buck-vcore2 { 124 + regulator-name = "vcore2"; 125 + regulator-min-microvolt = <700000>; 126 + regulator-max-microvolt = <1493750>; 127 + regulator-ramp-delay = <12500>; 128 + regulator-enable-ramp-delay = <1>; 129 + regulator-allowed-modes = <0 1>; 130 + }; 131 + mt6331_vio18_reg: buck-vio18 { 132 + regulator-name = "vio18"; 133 + regulator-min-microvolt = <1800000>; 134 + regulator-max-microvolt = <1800000>; 135 + regulator-ramp-delay = <12500>; 136 + regulator-enable-ramp-delay = <0>; 137 + regulator-allowed-modes = <0 1>; 138 + }; 139 + mt6331_vtcxo1_reg: ldo-vtcxo1 { 140 + regulator-name = "vtcxo1"; 141 + regulator-min-microvolt = <2800000>; 142 + regulator-max-microvolt = <2800000>; 143 + regulator-always-on; 144 + regulator-boot-on; 145 + }; 146 + mt6331_vtcxo2_reg: ldo-vtcxo2 { 147 + regulator-name = "vtcxo2"; 148 + regulator-min-microvolt = <2800000>; 149 + regulator-max-microvolt = <2800000>; 150 + regulator-always-on; 151 + regulator-boot-on; 152 + }; 153 + mt6331_avdd32_aud_reg: ldo-avdd32aud { 154 + regulator-name = "avdd32_aud"; 155 + regulator-min-microvolt = <2800000>; 156 + regulator-max-microvolt = <3200000>; 157 + }; 158 + mt6331_vauxa32_reg: ldo-vauxa32 { 159 + regulator-name = "vauxa32"; 160 + regulator-min-microvolt = <2800000>; 161 + regulator-max-microvolt = <3200000>; 162 + }; 163 + mt6331_vcama_reg: ldo-vcama { 164 + regulator-name = "vcama"; 165 + regulator-min-microvolt = <1500000>; 166 + regulator-max-microvolt = <2800000>; 167 + regulator-always-on; 168 + }; 169 + mt6331_vio28_reg: ldo-vio28 { 170 + regulator-name = "vio28"; 171 + regulator-min-microvolt = <2800000>; 172 + regulator-max-microvolt = <2800000>; 173 + regulator-always-on; 174 + regulator-boot-on; 175 + }; 176 + mt6331_vcamaf_reg: ldo-vcamaf { 177 + regulator-name = "vcam_af"; 178 + regulator-min-microvolt = <1200000>; 179 + regulator-max-microvolt = <3300000>; 180 + }; 181 + mt6331_vmc_reg: ldo-vmc { 182 + regulator-name = "vmc"; 183 + regulator-min-microvolt = <1800000>; 184 + regulator-max-microvolt = <3300000>; 185 + }; 186 + mt6331_vmch_reg: ldo-vmch { 187 + regulator-name = "vmch"; 188 + regulator-min-microvolt = <3000000>; 189 + regulator-max-microvolt = <3300000>; 190 + }; 191 + mt6331_vemc33_reg: ldo-vemc33 { 192 + regulator-name = "vemc33"; 193 + regulator-min-microvolt = <3300000>; 194 + regulator-max-microvolt = <3300000>; 195 + }; 196 + mt6331_vgp1_reg: ldo-vgp1 { 197 + regulator-name = "vgp1"; 198 + regulator-min-microvolt = <1200000>; 199 + regulator-max-microvolt = <3300000>; 200 + }; 201 + mt6331_vsim1_reg: ldo-vsim1 { 202 + regulator-name = "vsim1"; 203 + regulator-min-microvolt = <1700000>; 204 + regulator-max-microvolt = <3100000>; 205 + }; 206 + mt6331_vsim2_reg: ldo-vsim2 { 207 + regulator-name = "vsim2"; 208 + regulator-min-microvolt = <1700000>; 209 + regulator-max-microvolt = <3100000>; 210 + }; 211 + mt6331_vmipi_reg: ldo-vmipi { 212 + regulator-name = "vmipi"; 213 + regulator-min-microvolt = <1200000>; 214 + regulator-max-microvolt = <3300000>; 215 + }; 216 + mt6331_vibr_reg: ldo-vibr { 217 + regulator-name = "vibr"; 218 + regulator-min-microvolt = <1200000>; 219 + regulator-max-microvolt = <3300000>; 220 + }; 221 + mt6331_vgp4_reg: ldo-vgp4 { 222 + regulator-name = "vgp4"; 223 + regulator-min-microvolt = <1600000>; 224 + regulator-max-microvolt = <2200000>; 225 + }; 226 + mt6331_vcamd_reg: ldo-vcamd { 227 + regulator-name = "vcamd"; 228 + regulator-min-microvolt = <900000>; 229 + regulator-max-microvolt = <1500000>; 230 + }; 231 + mt6331_vusb10_reg: ldo-vusb10 { 232 + regulator-name = "vusb"; 233 + regulator-min-microvolt = <1000000>; 234 + regulator-max-microvolt = <1300000>; 235 + regulator-boot-on; 236 + }; 237 + mt6331_vcamio_reg: ldo-vcamio { 238 + regulator-name = "vcam_io"; 239 + regulator-min-microvolt = <1200000>; 240 + regulator-max-microvolt = <1800000>; 241 + }; 242 + mt6331_vsram_reg: ldo-vsram { 243 + regulator-name = "vsram"; 244 + regulator-min-microvolt = <1012500>; 245 + regulator-max-microvolt = <1012500>; 246 + regulator-always-on; 247 + regulator-boot-on; 248 + }; 249 + mt6331_vgp2_reg: ldo-vgp2 { 250 + regulator-name = "vgp2"; 251 + regulator-min-microvolt = <1100000>; 252 + regulator-max-microvolt = <1500000>; 253 + regulator-boot-on; 254 + }; 255 + mt6331_vgp3_reg: ldo-vgp3 { 256 + regulator-name = "vgp3"; 257 + regulator-min-microvolt = <1200000>; 258 + regulator-max-microvolt = <1800000>; 259 + }; 260 + mt6331_vrtc_reg: ldo-vrtc { 261 + regulator-name = "vrtc"; 262 + regulator-min-microvolt = <2800000>; 263 + regulator-max-microvolt = <2800000>; 264 + regulator-always-on; 265 + }; 266 + mt6331_vdig18_reg: ldo-vdig18 { 267 + regulator-name = "dvdd18_dig"; 268 + regulator-min-microvolt = <1800000>; 269 + regulator-max-microvolt = <1800000>; 270 + }; 271 + }; 272 + }; 273 + ...
+112
Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/regulator/mediatek,mt6332-regulator.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: MT6332 Regulator from MediaTek Integrated 8 + 9 + maintainers: 10 + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 11 + 12 + description: | 13 + The MT6332 Companion PMIC provides 6 BUCK and 4 LDO (Low Dropout) 14 + regulators and nodes are named according to the regulator type: 15 + buck-<name> and ldo-<name>. 16 + MT6332 regulators node should be sub node of the MT6397 MFD node. 17 + 18 + patternProperties: 19 + "^buck-v(dram|dvfs2|pa|rf18a|rf18b|sbst)$": 20 + type: object 21 + $ref: "regulator.yaml#" 22 + 23 + properties: 24 + regulator-name: 25 + pattern: "^v(dram|dvfs2|pa|rf18a|rf18b|sbst)$" 26 + 27 + unevaluatedProperties: false 28 + 29 + "^ldo-v(bif28|dig18|sram|usb33)$": 30 + type: object 31 + $ref: "regulator.yaml#" 32 + 33 + properties: 34 + regulator-name: 35 + pattern: "^v(bif28|dig18|sram|usb33)$" 36 + 37 + unevaluatedProperties: false 38 + 39 + additionalProperties: false 40 + 41 + examples: 42 + - | 43 + pmic { 44 + regulators { 45 + mt6332_vdram_reg: buck-vdram { 46 + regulator-name = "vdram"; 47 + regulator-min-microvolt = <700000>; 48 + regulator-max-microvolt = <1493750>; 49 + regulator-ramp-delay = <12500>; 50 + regulator-allowed-modes = <0 1>; 51 + regulator-always-on; 52 + }; 53 + mt6332_vdvfs2_reg: buck-vdvfs2 { 54 + regulator-name = "vdvfs2"; 55 + regulator-min-microvolt = <700000>; 56 + regulator-max-microvolt = <1312500>; 57 + regulator-ramp-delay = <12500>; 58 + regulator-enable-ramp-delay = <1>; 59 + regulator-allowed-modes = <0 1>; 60 + }; 61 + mt6332_vpa_reg: buck-vpa { 62 + regulator-name = "vpa"; 63 + regulator-min-microvolt = <500000>; 64 + regulator-max-microvolt = <3400000>; 65 + }; 66 + mt6332_vrf18a_reg: buck-vrf18a { 67 + regulator-name = "vrf18a"; 68 + regulator-min-microvolt = <1050000>; 69 + regulator-max-microvolt = <2240625>; 70 + regulator-allowed-modes = <0 1>; 71 + }; 72 + mt6332_vrf18b_reg: buck-vrf18b { 73 + regulator-name = "vrf18b"; 74 + regulator-min-microvolt = <1050000>; 75 + regulator-max-microvolt = <2240625>; 76 + regulator-allowed-modes = <0 1>; 77 + }; 78 + mt6332_vsbst_reg: buck-vsbst { 79 + regulator-name = "vsbst"; 80 + regulator-min-microvolt = <3500000>; 81 + regulator-max-microvolt = <7468750>; 82 + }; 83 + mt6332_vauxb32_reg: ldo-vauxb32 { 84 + regulator-name = "vauxb32"; 85 + regulator-min-microvolt = <2800000>; 86 + regulator-max-microvolt = <3200000>; 87 + }; 88 + mt6332_vbif28_reg: ldo-vbif28 { 89 + regulator-name = "vbif28"; 90 + regulator-min-microvolt = <2800000>; 91 + regulator-max-microvolt = <2800000>; 92 + }; 93 + mt6332_vdig18_reg: ldo-vdig18 { 94 + regulator-name = "vdig18"; 95 + regulator-min-microvolt = <1200000>; 96 + regulator-max-microvolt = <1800000>; 97 + regulator-always-on; 98 + }; 99 + mt6332_vsram_reg: ldo-vsram { 100 + regulator-name = "vauxa32"; 101 + regulator-min-microvolt = <700000>; 102 + regulator-max-microvolt = <1493750>; 103 + regulator-always-on; 104 + }; 105 + mt6332_vusb33_reg: ldo-vusb33 { 106 + regulator-name = "vusb33"; 107 + regulator-min-microvolt = <3300000>; 108 + regulator-max-microvolt = <3300000>; 109 + }; 110 + }; 111 + }; 112 + ...
+1
Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
··· 29 29 "^vbuck[1-4]$": 30 30 type: object 31 31 $ref: "regulator.yaml#" 32 + unevaluatedProperties: false 32 33 33 34 properties: 34 35 regulator-compatible:
+40
Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
··· 37 37 For PM6150, smps1 - smps5, ldo1 - ldo19 38 38 For PM6150L, smps1 - smps8, ldo1 - ldo11, bob 39 39 For PM6350, smps1 - smps5, ldo1 - ldo22 40 + For PM660, smps1 - smps6, ldo1 - ldo3, ldo5 - ldo19 41 + For PM660L, smps1 - smps3, smps5, ldo1 - ldo8, bob 40 42 For PM7325, smps1 - smps8, ldo1 - ldo19 41 43 For PM8005, smps1 - smps4 42 44 For PM8009, smps1 - smps2, ldo1 - ldo7 ··· 59 57 - qcom,pm6150-rpmh-regulators 60 58 - qcom,pm6150l-rpmh-regulators 61 59 - qcom,pm6350-rpmh-regulators 60 + - qcom,pm660-rpmh-regulators 61 + - qcom,pm660l-rpmh-regulators 62 62 - qcom,pm7325-rpmh-regulators 63 63 - qcom,pm8005-rpmh-regulators 64 64 - qcom,pm8009-rpmh-regulators ··· 103 99 type: object 104 100 $ref: "regulator.yaml#" 105 101 description: BOB regulator node. 102 + dependencies: 103 + regulator-allow-set-load: ["regulator-allowed-modes"] 106 104 107 105 patternProperties: 108 106 "^(smps|ldo|lvs)[0-9]+$": 109 107 type: object 110 108 $ref: "regulator.yaml#" 111 109 description: smps/ldo regulator nodes(s). 110 + dependencies: 111 + regulator-allow-set-load: ["regulator-allowed-modes"] 112 112 113 113 required: 114 114 - compatible ··· 151 143 vdd-l9-l10-supply: true 152 144 patternProperties: 153 145 "^vdd-s[1-8]-supply$": true 146 + 147 + - if: 148 + properties: 149 + compatible: 150 + enum: 151 + - qcom,pm660-rpmh-regulators 152 + then: 153 + properties: 154 + vdd-l1-l6-l7-supply: true 155 + vdd-l2-l3-supply: true 156 + vdd-l5-supply: true 157 + vdd-l8-l9-l10-l11-l12-l13-l14-supply: true 158 + vdd-l15-l16-l17-l18-l19-supply: true 159 + patternProperties: 160 + "^vdd-s[1-6]-supply$": true 161 + 162 + - if: 163 + properties: 164 + compatible: 165 + enum: 166 + - qcom,pm660l-rpmh-regulators 167 + then: 168 + properties: 169 + vdd-bob-supply: 170 + description: BOB regulator parent supply phandle. 171 + vdd-l1-l9-l10-supply: true 172 + vdd-l2-supply: true 173 + vdd-l3-l5-l7-l8-supply: true 174 + vdd-l4-l6-supply: true 175 + vdd-s3-s4-supply: true 176 + patternProperties: 177 + "^vdd-s[125]-supply$": true 154 178 155 179 - if: 156 180 properties:
+15 -11
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml
··· 24 24 25 25 For mp5496, s2 26 26 27 + For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, 28 + l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22 29 + 30 + For pm6125 s1, s2, s3, s4, s5, s6, s7, s8, l1, l2, l3, l5, l6, l7, l8, l9, 31 + l10, l22, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24 32 + 33 + For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22, 34 + l12, l13, l14, l15, l16, l17, l18, l19 35 + 36 + For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob 37 + 27 38 For pm8226, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, 28 39 l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, 29 40 l26, l27, l28, lvs1 ··· 63 52 l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, 64 53 l20, l21, l22, l23, l24, l25, l26, l27, l28, lvs1, lvs2 65 54 66 - For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22, 67 - l12, l13, l14, l15, l16, l17, l18, l19 68 - 69 - For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob 70 - 71 55 For pma8084, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, 72 56 l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, 73 57 l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1 ··· 74 68 For pms405, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, 75 69 l12, l13 76 70 77 - For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, 78 - l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22 79 - 80 71 maintainers: 81 72 - Andy Gross <agross@kernel.org> 82 73 - Bjorn Andersson <bjorn.andersson@linaro.org> ··· 82 79 compatible: 83 80 enum: 84 81 - qcom,rpm-mp5496-regulators 82 + - qcom,rpm-pm2250-regulators 83 + - qcom,rpm-pm6125-regulators 84 + - qcom,rpm-pm660-regulators 85 + - qcom,rpm-pm660l-regulators 85 86 - qcom,rpm-pm8226-regulators 86 87 - qcom,rpm-pm8841-regulators 87 88 - qcom,rpm-pm8909-regulators ··· 95 88 - qcom,rpm-pm8953-regulators 96 89 - qcom,rpm-pm8994-regulators 97 90 - qcom,rpm-pm8998-regulators 98 - - qcom,rpm-pm660-regulators 99 - - qcom,rpm-pm660l-regulators 100 91 - qcom,rpm-pma8084-regulators 101 92 - qcom,rpm-pmi8994-regulators 102 93 - qcom,rpm-pmi8998-regulators 103 94 - qcom,rpm-pms405-regulators 104 - - qcom,rpm-pm2250-regulators 105 95 106 96 patternProperties: 107 97 ".*-supply$":
+32
Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml
··· 12 12 properties: 13 13 compatible: 14 14 enum: 15 + - qcom,pm6125-regulators 15 16 - qcom,pm660-regulators 16 17 - qcom,pm660l-regulators 17 18 - qcom,pm8004-regulators ··· 111 110 compatible: 112 111 contains: 113 112 enum: 113 + - qcom,pm6125-regulators 114 + then: 115 + properties: 116 + vdd_l1_l7_l17_l18-supply: true 117 + vdd_l2_l3_l4-supply: true 118 + vdd_l5_l15_l19_l20_l21_l22-supply: true 119 + vdd_l6_l8-supply: true 120 + vdd_l9_l11-supply: true 121 + vdd_l10_l13_l14-supply: true 122 + vdd_l12_l16-supply: true 123 + vdd_l23_l24-supply: true 124 + patternProperties: 125 + "^vdd_s[1-8]-supply$": true 126 + 127 + - if: 128 + properties: 129 + compatible: 130 + contains: 131 + enum: 114 132 - qcom,pm660-regulators 115 133 then: 116 134 properties: ··· 140 120 vdd_l8_l9_l10_l11_l12_l13_l14-supply: true 141 121 patternProperties: 142 122 "^vdd_s[1-6]-supply$": true 123 + 143 124 - if: 144 125 properties: 145 126 compatible: ··· 155 134 vdd_l4_l6-supply: true 156 135 patternProperties: 157 136 "^vdd_s[1-5]-supply$": true 137 + 158 138 - if: 159 139 properties: 160 140 compatible: ··· 165 143 then: 166 144 patternProperties: 167 145 "^vdd_s[25]-supply$": true 146 + 168 147 - if: 169 148 properties: 170 149 compatible: ··· 175 152 then: 176 153 patternProperties: 177 154 "^vdd_s[1-4]-supply$": true 155 + 178 156 - if: 179 157 properties: 180 158 compatible: ··· 195 171 vdd_lvs1-supply: true 196 172 patternProperties: 197 173 "^vdd_s[1-5]-supply$": true 174 + 198 175 - if: 199 176 properties: 200 177 compatible: ··· 205 180 then: 206 181 patternProperties: 207 182 "^vdd_s[1-8]-supply$": true 183 + 208 184 - if: 209 185 properties: 210 186 compatible: ··· 221 195 patternProperties: 222 196 "^vdd_l[27]-supply$": true 223 197 "^vdd_s[1-4]-supply$": true 198 + 224 199 - if: 225 200 properties: 226 201 compatible: ··· 250 223 vin_5vs-supply: true 251 224 patternProperties: 252 225 "^vdd_s[1-3]-supply$": true 226 + 253 227 - if: 254 228 properties: 255 229 compatible: ··· 269 241 vdd_l9_l10_l13_l14_l15_l18-supply: true 270 242 patternProperties: 271 243 "^vdd_s[1-6]-supply$": true 244 + 272 245 - if: 273 246 properties: 274 247 compatible: ··· 294 265 vdd_lvs_1_2-supply: true 295 266 patternProperties: 296 267 "^vdd_s[1-9][0-2]?-supply$": true 268 + 297 269 - if: 298 270 properties: 299 271 compatible: ··· 306 276 vdd_l1-supply: true 307 277 patternProperties: 308 278 "^vdd_s[1-3]-supply$": true 279 + 309 280 - if: 310 281 properties: 311 282 compatible: ··· 322 291 patternProperties: 323 292 "^vdd_l[479]-supply$": true 324 293 "^vdd_s[1-5]-supply$": true 294 + 325 295 - if: 326 296 properties: 327 297 compatible:
+16
Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml
··· 20 20 21 21 lab: 22 22 type: object 23 + additionalProperties: false 23 24 24 25 properties: 25 26 qcom,soft-start-us: ··· 34 33 description: 35 34 Short-circuit and over-current interrupts for lab. 36 35 36 + interrupt-names: 37 + minItems: 1 38 + items: 39 + - const: sc-err 40 + - const: ocp 41 + 37 42 required: 38 43 - interrupts 44 + - interrupt-names 39 45 40 46 ibb: 41 47 type: object 48 + additionalProperties: false 42 49 43 50 properties: 44 51 qcom,discharge-resistor-kohms: ··· 61 52 description: 62 53 Short-circuit and over-current interrupts for ibb. 63 54 55 + interrupt-names: 56 + minItems: 1 57 + items: 58 + - const: sc-err 59 + - const: ocp 60 + 64 61 required: 65 62 - interrupts 63 + - interrupt-names 66 64 67 65 required: 68 66 - compatible
+1
Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml
··· 42 42 "^DSV(P|N)$": 43 43 type: object 44 44 $ref: regulator.yaml# 45 + unevaluatedProperties: false 45 46 description: 46 47 Properties for single display bias regulator. 47 48
+1
Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml
··· 27 27 description: 28 28 properties for wled regulator 29 29 $ref: regulator.yaml# 30 + unevaluatedProperties: false 30 31 31 32 properties: 32 33 regulator-name:
+173
Documentation/devicetree/bindings/regulator/ti,tps65219.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/regulator/ti,tps65219.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: TI tps65219 Power Management Integrated Circuit regulators 8 + 9 + maintainers: 10 + - Jerome Neanne <jerome.neanne@baylibre.com> 11 + 12 + description: | 13 + Regulator nodes should be named to buck<number> and ldo<number>. 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - ti,tps65219 19 + 20 + reg: 21 + maxItems: 1 22 + 23 + system-power-controller: 24 + type: boolean 25 + description: Optional property that indicates that this device is 26 + controlling system power. 27 + 28 + interrupts: 29 + description: Short-circuit, over-current, under-voltage for regulators, PB interrupts. 30 + maxItems: 1 31 + 32 + interrupt-controller: true 33 + 34 + '#interrupt-cells': 35 + description: Specifies the PIN numbers and Flags, as defined in 36 + include/dt-bindings/interrupt-controller/irq.h 37 + const: 1 38 + 39 + ti,power-button: 40 + type: boolean 41 + description: | 42 + Optional property that sets the EN/PB/VSENSE pin to be a 43 + power-button. 44 + TPS65219 has a multipurpose pin called EN/PB/VSENSE that can be either 45 + 1. EN in which case it functions as an enable pin. 46 + 2. VSENSE which compares the voltages and triggers an automatic 47 + on/off request. 48 + 3. PB in which case it can be configured to trigger an interrupt 49 + to the SoC. 50 + ti,power-button reflects the last one of those options 51 + where the board has a button wired to the pin and triggers 52 + an interrupt on pressing it. 53 + 54 + patternProperties: 55 + "^buck[1-3]-supply$": 56 + description: Input supply phandle of one regulator. 57 + 58 + "^ldo[1-4]-supply$": 59 + description: Input supply phandle of one regulator. 60 + 61 + regulators: 62 + type: object 63 + description: | 64 + list of regulators provided by this controller 65 + 66 + patternProperties: 67 + "^ldo[1-4]$": 68 + type: object 69 + $ref: regulator.yaml# 70 + description: 71 + Properties for single LDO regulator. 72 + 73 + unevaluatedProperties: false 74 + 75 + "^buck[1-3]$": 76 + type: object 77 + $ref: regulator.yaml# 78 + description: 79 + Properties for single BUCK regulator. 80 + 81 + unevaluatedProperties: false 82 + 83 + additionalProperties: false 84 + 85 + required: 86 + - compatible 87 + - reg 88 + - interrupts 89 + - regulators 90 + 91 + additionalProperties: false 92 + 93 + examples: 94 + - | 95 + #include <dt-bindings/interrupt-controller/arm-gic.h> 96 + i2c { 97 + #address-cells = <1>; 98 + #size-cells = <0>; 99 + 100 + tps65219: pmic@30 { 101 + compatible = "ti,tps65219"; 102 + reg = <0x30>; 103 + buck1-supply = <&vcc_3v3_sys>; 104 + buck2-supply = <&vcc_3v3_sys>; 105 + buck3-supply = <&vcc_3v3_sys>; 106 + ldo1-supply = <&vcc_3v3_sys>; 107 + ldo2-supply = <&buck2_reg>; 108 + ldo3-supply = <&vcc_3v3_sys>; 109 + ldo4-supply = <&vcc_3v3_sys>; 110 + 111 + pinctrl-0 = <&pmic_irq_pins_default>; 112 + 113 + interrupt-parent = <&gic500>; 114 + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 115 + ti,power-button; 116 + 117 + regulators { 118 + buck1_reg: buck1 { 119 + regulator-name = "VDD_CORE"; 120 + regulator-min-microvolt = <750000>; 121 + regulator-max-microvolt = <750000>; 122 + regulator-boot-on; 123 + regulator-always-on; 124 + }; 125 + 126 + buck2_reg: buck2 { 127 + regulator-name = "VCC1V8"; 128 + regulator-min-microvolt = <1800000>; 129 + regulator-max-microvolt = <1800000>; 130 + regulator-boot-on; 131 + regulator-always-on; 132 + }; 133 + 134 + buck3_reg: buck3 { 135 + regulator-name = "VDD_LPDDR4"; 136 + regulator-min-microvolt = <1100000>; 137 + regulator-max-microvolt = <1100000>; 138 + regulator-boot-on; 139 + regulator-always-on; 140 + }; 141 + 142 + ldo1_reg: ldo1 { 143 + regulator-name = "VDDSHV_SD_IO_PMIC"; 144 + regulator-min-microvolt = <33000000>; 145 + regulator-max-microvolt = <33000000>; 146 + }; 147 + 148 + ldo2_reg: ldo2 { 149 + regulator-name = "VDDAR_CORE"; 150 + regulator-min-microvolt = <850000>; 151 + regulator-max-microvolt = <850000>; 152 + regulator-boot-on; 153 + regulator-always-on; 154 + }; 155 + 156 + ldo3_reg: ldo3 { 157 + regulator-name = "VDDA_1V8"; 158 + regulator-min-microvolt = <18000000>; 159 + regulator-max-microvolt = <18000000>; 160 + regulator-boot-on; 161 + regulator-always-on; 162 + }; 163 + 164 + ldo4_reg: ldo4 { 165 + regulator-name = "VDD_PHY_2V5"; 166 + regulator-min-microvolt = <25000000>; 167 + regulator-max-microvolt = <25000000>; 168 + regulator-boot-on; 169 + regulator-always-on; 170 + }; 171 + }; 172 + }; 173 + };
+11
Documentation/driver-api/driver-model/devres.rst
··· 407 407 devm_fwnode_pwm_get() 408 408 409 409 REGULATOR 410 + devm_regulator_bulk_register_supply_alias() 410 411 devm_regulator_bulk_get() 412 + devm_regulator_bulk_get_enable() 413 + devm_regulator_bulk_put() 411 414 devm_regulator_get() 415 + devm_regulator_get_enable() 416 + devm_regulator_get_enable_optional() 417 + devm_regulator_get_exclusive() 418 + devm_regulator_get_optional() 419 + devm_regulator_irq_helper() 412 420 devm_regulator_put() 413 421 devm_regulator_register() 422 + devm_regulator_register_notifier() 423 + devm_regulator_register_supply_alias() 424 + devm_regulator_unregister_notifier() 414 425 415 426 RESET 416 427 devm_reset_control_get()
+1
MAINTAINERS
··· 14957 14957 F: drivers/regulator/pbias-regulator.c 14958 14958 F: drivers/regulator/tps65217-regulator.c 14959 14959 F: drivers/regulator/tps65218-regulator.c 14960 + F: drivers/regulator/tps65219-regulator.c 14960 14961 F: drivers/regulator/tps65910-regulator.c 14961 14962 F: drivers/regulator/twl-regulator.c 14962 14963 F: drivers/regulator/twl6030-regulator.c
+27
drivers/regulator/Kconfig
··· 787 787 This driver supports the control of different power rails of device 788 788 through regulator interface. 789 789 790 + config REGULATOR_MT6331 791 + tristate "MediaTek MT6331 PMIC" 792 + depends on MFD_MT6397 793 + help 794 + Say y here to select this option to enable the power regulator of 795 + MediaTek MT6331 PMIC. 796 + This driver supports the control of different power rails of device 797 + through regulator interface 798 + 799 + config REGULATOR_MT6332 800 + tristate "MediaTek MT6332 PMIC" 801 + depends on MFD_MT6397 802 + help 803 + Say y here to select this option to enable the power regulator of 804 + MediaTek MT6332 PMIC. 805 + This driver supports the control of different power rails of device 806 + through regulator interface 807 + 790 808 config REGULATOR_MT6358 791 809 tristate "MediaTek MT6358 PMIC" 792 810 depends on MFD_MT6397 ··· 1401 1383 provides six step-down converters and one general-purpose LDO 1402 1384 voltage regulators. It supports software based voltage control 1403 1385 for different voltage domains 1386 + 1387 + config REGULATOR_TPS65219 1388 + tristate "TI TPS65219 Power regulators" 1389 + depends on MFD_TPS65219 && OF 1390 + help 1391 + This driver supports TPS65219 voltage regulator chips. 1392 + TPS65219 series of PMICs have 3 single phase BUCKs & 4 LDOs 1393 + voltage regulators. It supports software based voltage control 1394 + for different voltage domains. 1404 1395 1405 1396 config REGULATOR_TPS6524X 1406 1397 tristate "TI TPS6524X Power regulators"
+3
drivers/regulator/Makefile
··· 95 95 obj-$(CONFIG_REGULATOR_MT6311) += mt6311-regulator.o 96 96 obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o 97 97 obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o 98 + obj-$(CONFIG_REGULATOR_MT6331) += mt6331-regulator.o 99 + obj-$(CONFIG_REGULATOR_MT6332) += mt6332-regulator.o 98 100 obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o 99 101 obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o 100 102 obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o ··· 164 162 obj-$(CONFIG_REGULATOR_TPS65090) += tps65090-regulator.o 165 163 obj-$(CONFIG_REGULATOR_TPS65217) += tps65217-regulator.o 166 164 obj-$(CONFIG_REGULATOR_TPS65218) += tps65218-regulator.o 165 + obj-$(CONFIG_REGULATOR_TPS65219) += tps65219-regulator.o 167 166 obj-$(CONFIG_REGULATOR_TPS6524X) += tps6524x-regulator.o 168 167 obj-$(CONFIG_REGULATOR_TPS6586X) += tps6586x-regulator.o 169 168 obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
+3 -4
drivers/regulator/bd71815-regulator.c
··· 571 571 dev_err(&pdev->dev, "No parent regmap\n"); 572 572 return -ENODEV; 573 573 } 574 - ldo4_en = devm_gpiod_get_from_of_node(&pdev->dev, 575 - pdev->dev.parent->of_node, 576 - "rohm,vsel-gpios", 0, 577 - GPIOD_ASIS, "ldo4-en"); 578 574 575 + ldo4_en = devm_fwnode_gpiod_get(&pdev->dev, 576 + dev_fwnode(pdev->dev.parent), 577 + "rohm,vsel", GPIOD_ASIS, "ldo4-en"); 579 578 if (IS_ERR(ldo4_en)) { 580 579 ret = PTR_ERR(ldo4_en); 581 580 if (ret != -ENOENT)
+9 -8
drivers/regulator/bd9576-regulator.c
··· 12 12 #include <linux/module.h> 13 13 #include <linux/of.h> 14 14 #include <linux/platform_device.h> 15 + #include <linux/property.h> 15 16 #include <linux/regulator/driver.h> 16 17 #include <linux/regulator/machine.h> 17 18 #include <linux/regulator/of_regulator.h> ··· 940 939 } 941 940 942 941 ic_data->regmap = regmap; 943 - vout_mode = of_property_read_bool(pdev->dev.parent->of_node, 944 - "rohm,vout1-en-low"); 942 + vout_mode = device_property_read_bool(pdev->dev.parent, 943 + "rohm,vout1-en-low"); 945 944 if (vout_mode) { 946 945 struct gpio_desc *en; 947 946 ··· 949 948 950 949 /* VOUT1 enable state judged by VOUT1_EN pin */ 951 950 /* See if we have GPIO defined */ 952 - en = devm_gpiod_get_from_of_node(&pdev->dev, 953 - pdev->dev.parent->of_node, 954 - "rohm,vout1-en-gpios", 0, 955 - GPIOD_OUT_LOW, "vout1-en"); 951 + en = devm_fwnode_gpiod_get(&pdev->dev, 952 + dev_fwnode(pdev->dev.parent), 953 + "rohm,vout1-en", GPIOD_OUT_LOW, 954 + "vout1-en"); 956 955 if (!IS_ERR(en)) { 957 956 /* VOUT1_OPS gpio ctrl */ 958 957 /* ··· 987 986 * like DDR voltage selection. 988 987 */ 989 988 platform_set_drvdata(pdev, ic_data); 990 - ddr_sel = of_property_read_bool(pdev->dev.parent->of_node, 991 - "rohm,ddr-sel-low"); 989 + ddr_sel = device_property_read_bool(pdev->dev.parent, 990 + "rohm,ddr-sel-low"); 992 991 if (ddr_sel) 993 992 ic_data->regulator_data[2].desc.fixed_uV = 1350000; 994 993 else
+63 -35
drivers/regulator/core.c
··· 977 977 rdev_err(rdev, "failed to set load %d: %pe\n", 978 978 current_uA, ERR_PTR(err)); 979 979 } else { 980 + /* 981 + * Unfortunately in some cases the constraints->valid_ops has 982 + * REGULATOR_CHANGE_DRMS but there are no valid modes listed. 983 + * That's not really legit but we won't consider it a fatal 984 + * error here. We'll treat it as if REGULATOR_CHANGE_DRMS 985 + * wasn't set. 986 + */ 987 + if (!rdev->constraints->valid_modes_mask) { 988 + rdev_dbg(rdev, "Can change modes; but no valid mode\n"); 989 + return 0; 990 + } 991 + 980 992 /* get output voltage */ 981 993 output_uV = regulator_get_voltage_rdev(rdev); 982 - if (output_uV <= 0) { 983 - rdev_err(rdev, "invalid output voltage found\n"); 984 - return -EINVAL; 985 - } 994 + 995 + /* 996 + * Don't return an error; if regulator driver cares about 997 + * output_uV then it's up to the driver to validate. 998 + */ 999 + if (output_uV <= 0) 1000 + rdev_dbg(rdev, "invalid output voltage found\n"); 986 1001 987 1002 /* get input voltage */ 988 1003 input_uV = 0; ··· 1005 990 input_uV = regulator_get_voltage(rdev->supply); 1006 991 if (input_uV <= 0) 1007 992 input_uV = rdev->constraints->input_uV; 1008 - if (input_uV <= 0) { 1009 - rdev_err(rdev, "invalid input voltage found\n"); 1010 - return -EINVAL; 1011 - } 993 + 994 + /* 995 + * Don't return an error; if regulator driver cares about 996 + * input_uV then it's up to the driver to validate. 997 + */ 998 + if (input_uV <= 0) 999 + rdev_dbg(rdev, "invalid input voltage found\n"); 1012 1000 1013 1001 /* now get the optimum mode for our new total regulator load */ 1014 1002 mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV, ··· 2699 2681 * return -ETIMEDOUT. 2700 2682 */ 2701 2683 if (rdev->desc->poll_enabled_time) { 2702 - unsigned int time_remaining = delay; 2684 + int time_remaining = delay; 2703 2685 2704 2686 while (time_remaining > 0) { 2705 2687 _regulator_delay_helper(rdev->desc->poll_enabled_time); ··· 3520 3502 (new_uV < old_uV)) 3521 3503 return rdev->constraints->settling_time_down; 3522 3504 3523 - if (ramp_delay == 0) { 3524 - rdev_dbg(rdev, "ramp_delay not set\n"); 3505 + if (ramp_delay == 0) 3525 3506 return 0; 3526 - } 3527 3507 3528 3508 return DIV_ROUND_UP(abs(new_uV - old_uV), ramp_delay); 3529 3509 } ··· 5414 5398 bool dangling_of_gpiod = false; 5415 5399 struct device *dev; 5416 5400 int ret, i; 5401 + bool resolved_early = false; 5417 5402 5418 5403 if (cfg == NULL) 5419 5404 return ERR_PTR(-EINVAL); ··· 5518 5501 BLOCKING_INIT_NOTIFIER_HEAD(&rdev->notifier); 5519 5502 INIT_DELAYED_WORK(&rdev->disable_work, regulator_disable_work); 5520 5503 5521 - /* preform any regulator specific init */ 5522 - if (init_data && init_data->regulator_init) { 5523 - ret = init_data->regulator_init(rdev->reg_data); 5524 - if (ret < 0) 5525 - goto clean; 5526 - } 5527 - 5528 - if (config->ena_gpiod) { 5529 - ret = regulator_ena_gpio_request(rdev, config); 5530 - if (ret != 0) { 5531 - rdev_err(rdev, "Failed to request enable GPIO: %pe\n", 5532 - ERR_PTR(ret)); 5533 - goto clean; 5534 - } 5535 - /* The regulator core took over the GPIO descriptor */ 5536 - dangling_cfg_gpiod = false; 5537 - dangling_of_gpiod = false; 5538 - } 5504 + if (init_data && init_data->supply_regulator) 5505 + rdev->supply_name = init_data->supply_regulator; 5506 + else if (regulator_desc->supply_name) 5507 + rdev->supply_name = regulator_desc->supply_name; 5539 5508 5540 5509 /* register with sysfs */ 5541 5510 rdev->dev.class = &regulator_class; ··· 5543 5540 goto wash; 5544 5541 } 5545 5542 5546 - if (init_data && init_data->supply_regulator) 5547 - rdev->supply_name = init_data->supply_regulator; 5548 - else if (regulator_desc->supply_name) 5549 - rdev->supply_name = regulator_desc->supply_name; 5543 + if ((rdev->supply_name && !rdev->supply) && 5544 + (rdev->constraints->always_on || 5545 + rdev->constraints->boot_on)) { 5546 + ret = regulator_resolve_supply(rdev); 5547 + if (ret) 5548 + rdev_dbg(rdev, "unable to resolve supply early: %pe\n", 5549 + ERR_PTR(ret)); 5550 + 5551 + resolved_early = true; 5552 + } 5553 + 5554 + /* perform any regulator specific init */ 5555 + if (init_data && init_data->regulator_init) { 5556 + ret = init_data->regulator_init(rdev->reg_data); 5557 + if (ret < 0) 5558 + goto wash; 5559 + } 5560 + 5561 + if (config->ena_gpiod) { 5562 + ret = regulator_ena_gpio_request(rdev, config); 5563 + if (ret != 0) { 5564 + rdev_err(rdev, "Failed to request enable GPIO: %pe\n", 5565 + ERR_PTR(ret)); 5566 + goto wash; 5567 + } 5568 + /* The regulator core took over the GPIO descriptor */ 5569 + dangling_cfg_gpiod = false; 5570 + dangling_of_gpiod = false; 5571 + } 5550 5572 5551 5573 ret = set_machine_constraints(rdev); 5552 - if (ret == -EPROBE_DEFER) { 5574 + if (ret == -EPROBE_DEFER && !resolved_early) { 5553 5575 /* Regulator might be in bypass mode and so needs its supply 5554 5576 * to set the constraints 5555 5577 */
+164
drivers/regulator/devres.c
··· 70 70 } 71 71 EXPORT_SYMBOL_GPL(devm_regulator_get_exclusive); 72 72 73 + static void regulator_action_disable(void *d) 74 + { 75 + struct regulator *r = (struct regulator *)d; 76 + 77 + regulator_disable(r); 78 + } 79 + 80 + static int _devm_regulator_get_enable(struct device *dev, const char *id, 81 + int get_type) 82 + { 83 + struct regulator *r; 84 + int ret; 85 + 86 + r = _devm_regulator_get(dev, id, get_type); 87 + if (IS_ERR(r)) 88 + return PTR_ERR(r); 89 + 90 + ret = regulator_enable(r); 91 + if (!ret) 92 + ret = devm_add_action_or_reset(dev, &regulator_action_disable, r); 93 + 94 + if (ret) 95 + devm_regulator_put(r); 96 + 97 + return ret; 98 + } 99 + 100 + /** 101 + * devm_regulator_get_enable_optional - Resource managed regulator get and enable 102 + * @dev: device to supply 103 + * @id: supply name or regulator ID. 104 + * 105 + * Get and enable regulator for duration of the device life-time. 106 + * regulator_disable() and regulator_put() are automatically called on driver 107 + * detach. See regulator_get_optional() and regulator_enable() for more 108 + * information. 109 + */ 110 + int devm_regulator_get_enable_optional(struct device *dev, const char *id) 111 + { 112 + return _devm_regulator_get_enable(dev, id, OPTIONAL_GET); 113 + } 114 + EXPORT_SYMBOL_GPL(devm_regulator_get_enable_optional); 115 + 116 + /** 117 + * devm_regulator_get_enable - Resource managed regulator get and enable 118 + * @dev: device to supply 119 + * @id: supply name or regulator ID. 120 + * 121 + * Get and enable regulator for duration of the device life-time. 122 + * regulator_disable() and regulator_put() are automatically called on driver 123 + * detach. See regulator_get() and regulator_enable() for more 124 + * information. 125 + */ 126 + int devm_regulator_get_enable(struct device *dev, const char *id) 127 + { 128 + return _devm_regulator_get_enable(dev, id, NORMAL_GET); 129 + } 130 + EXPORT_SYMBOL_GPL(devm_regulator_get_enable); 131 + 73 132 /** 74 133 * devm_regulator_get_optional - Resource managed regulator_get_optional() 75 134 * @dev: device to supply ··· 252 193 return devm_regulator_bulk_get(dev, num_consumers, *out_consumers); 253 194 } 254 195 EXPORT_SYMBOL_GPL(devm_regulator_bulk_get_const); 196 + 197 + static int devm_regulator_bulk_match(struct device *dev, void *res, 198 + void *data) 199 + { 200 + struct regulator_bulk_devres *match = res; 201 + struct regulator_bulk_data *target = data; 202 + 203 + /* 204 + * We check the put uses same consumer list as the get did. 205 + * We _could_ scan all entries in consumer array and check the 206 + * regulators match but ATM I don't see the need. We can change this 207 + * later if needed. 208 + */ 209 + return match->consumers == target; 210 + } 211 + 212 + /** 213 + * devm_regulator_bulk_put - Resource managed regulator_bulk_put() 214 + * @consumers: consumers to free 215 + * 216 + * Deallocate regulators allocated with devm_regulator_bulk_get(). Normally 217 + * this function will not need to be called and the resource management 218 + * code will ensure that the resource is freed. 219 + */ 220 + void devm_regulator_bulk_put(struct regulator_bulk_data *consumers) 221 + { 222 + int rc; 223 + struct regulator *regulator = consumers[0].consumer; 224 + 225 + rc = devres_release(regulator->dev, devm_regulator_bulk_release, 226 + devm_regulator_bulk_match, consumers); 227 + if (rc != 0) 228 + WARN_ON(rc); 229 + } 230 + EXPORT_SYMBOL_GPL(devm_regulator_bulk_put); 231 + 232 + static void devm_regulator_bulk_disable(void *res) 233 + { 234 + struct regulator_bulk_devres *devres = res; 235 + int i; 236 + 237 + for (i = 0; i < devres->num_consumers; i++) 238 + regulator_disable(devres->consumers[i].consumer); 239 + } 240 + 241 + /** 242 + * devm_regulator_bulk_get_enable - managed get'n enable multiple regulators 243 + * 244 + * @dev: device to supply 245 + * @num_consumers: number of consumers to register 246 + * @id: list of supply names or regulator IDs 247 + * 248 + * @return 0 on success, an errno on failure. 249 + * 250 + * This helper function allows drivers to get several regulator 251 + * consumers in one operation with management, the regulators will 252 + * automatically be freed when the device is unbound. If any of the 253 + * regulators cannot be acquired then any regulators that were 254 + * allocated will be freed before returning to the caller. 255 + */ 256 + int devm_regulator_bulk_get_enable(struct device *dev, int num_consumers, 257 + const char * const *id) 258 + { 259 + struct regulator_bulk_devres *devres; 260 + struct regulator_bulk_data *consumers; 261 + int i, ret; 262 + 263 + devres = devm_kmalloc(dev, sizeof(*devres), GFP_KERNEL); 264 + if (!devres) 265 + return -ENOMEM; 266 + 267 + devres->consumers = devm_kcalloc(dev, num_consumers, sizeof(*consumers), 268 + GFP_KERNEL); 269 + consumers = devres->consumers; 270 + if (!consumers) 271 + return -ENOMEM; 272 + 273 + devres->num_consumers = num_consumers; 274 + 275 + for (i = 0; i < num_consumers; i++) 276 + consumers[i].supply = id[i]; 277 + 278 + ret = devm_regulator_bulk_get(dev, num_consumers, consumers); 279 + if (ret) 280 + return ret; 281 + 282 + for (i = 0; i < num_consumers; i++) { 283 + ret = regulator_enable(consumers[i].consumer); 284 + if (ret) 285 + goto unwind; 286 + } 287 + 288 + ret = devm_add_action(dev, devm_regulator_bulk_disable, devres); 289 + if (!ret) 290 + return 0; 291 + 292 + unwind: 293 + while (--i >= 0) 294 + regulator_disable(consumers[i].consumer); 295 + 296 + devm_regulator_bulk_put(consumers); 297 + 298 + return ret; 299 + } 300 + EXPORT_SYMBOL_GPL(devm_regulator_bulk_get_enable); 255 301 256 302 static void devm_rdev_release(struct device *dev, void *res) 257 303 {
+15
drivers/regulator/gpio-regulator.c
··· 220 220 regtype); 221 221 } 222 222 223 + if (of_find_property(np, "vin-supply", NULL)) 224 + config->input_supply = "vin"; 225 + 223 226 return config; 224 227 } 225 228 ··· 262 259 263 260 drvdata->gpiods = devm_kzalloc(dev, sizeof(struct gpio_desc *), 264 261 GFP_KERNEL); 262 + 263 + if (config->input_supply) { 264 + drvdata->desc.supply_name = devm_kstrdup(&pdev->dev, 265 + config->input_supply, 266 + GFP_KERNEL); 267 + if (!drvdata->desc.supply_name) { 268 + dev_err(&pdev->dev, 269 + "Failed to allocate input supply\n"); 270 + return -ENOMEM; 271 + } 272 + } 273 + 265 274 if (!drvdata->gpiods) 266 275 return -ENOMEM; 267 276 for (i = 0; i < config->ngpios; i++) {
+2 -3
drivers/regulator/max597x-regulator.c
··· 137 137 static int max597x_set_ocp(struct regulator_dev *rdev, int lim_uA, 138 138 int severity, bool enable) 139 139 { 140 - int ret, val, reg; 140 + int val, reg; 141 141 unsigned int vthst, vthfst; 142 142 143 143 struct max597x_regulator *data = rdev_get_drvdata(rdev); ··· 183 183 val = 0xFF; 184 184 185 185 reg = MAX5970_REG_DAC_FAST(rdev_id); 186 - ret = regmap_write(rdev->regmap, reg, val); 187 186 188 - return ret; 187 + return regmap_write(rdev->regmap, reg, val); 189 188 } 190 189 191 190 static int max597x_get_status(struct regulator_dev *rdev)
+507
drivers/regulator/mt6331-regulator.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // 3 + // Copyright (c) 2022 Collabora Ltd. 4 + // Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 5 + // 6 + // Based on mt6323-regulator.c, 7 + // Copyright (c) 2016 MediaTek Inc. 8 + // 9 + 10 + #include <linux/module.h> 11 + #include <linux/of.h> 12 + #include <linux/platform_device.h> 13 + #include <linux/regmap.h> 14 + #include <linux/mfd/mt6397/core.h> 15 + #include <linux/mfd/mt6331/registers.h> 16 + #include <linux/regulator/driver.h> 17 + #include <linux/regulator/machine.h> 18 + #include <linux/regulator/mt6331-regulator.h> 19 + #include <linux/regulator/of_regulator.h> 20 + 21 + #define MT6331_LDO_MODE_NORMAL 0 22 + #define MT6331_LDO_MODE_LP 1 23 + 24 + /* 25 + * MT6331 regulators information 26 + * 27 + * @desc: standard fields of regulator description. 28 + * @qi: Mask for query enable signal status of regulators 29 + * @vselon_reg: Register sections for hardware control mode of bucks 30 + * @vselctrl_reg: Register for controlling the buck control mode. 31 + * @vselctrl_mask: Mask for query buck's voltage control mode. 32 + * @status_reg: Register for regulator enable status where qi unavailable 33 + * @status_mask: Mask for querying regulator enable status 34 + */ 35 + struct mt6331_regulator_info { 36 + struct regulator_desc desc; 37 + u32 qi; 38 + u32 vselon_reg; 39 + u32 vselctrl_reg; 40 + u32 vselctrl_mask; 41 + u32 modeset_reg; 42 + u32 modeset_mask; 43 + u32 status_reg; 44 + u32 status_mask; 45 + }; 46 + 47 + #define MT6331_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ 48 + vosel, vosel_mask, voselon, vosel_ctrl) \ 49 + [MT6331_ID_##vreg] = { \ 50 + .desc = { \ 51 + .name = #vreg, \ 52 + .of_match = of_match_ptr(match), \ 53 + .ops = &mt6331_volt_range_ops, \ 54 + .type = REGULATOR_VOLTAGE, \ 55 + .id = MT6331_ID_##vreg, \ 56 + .owner = THIS_MODULE, \ 57 + .n_voltages = (max - min)/step + 1, \ 58 + .linear_ranges = volt_ranges, \ 59 + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ 60 + .vsel_reg = vosel, \ 61 + .vsel_mask = vosel_mask, \ 62 + .enable_reg = enreg, \ 63 + .enable_mask = BIT(0), \ 64 + }, \ 65 + .qi = BIT(13), \ 66 + .vselon_reg = voselon, \ 67 + .vselctrl_reg = vosel_ctrl, \ 68 + .vselctrl_mask = BIT(1), \ 69 + .status_mask = 0, \ 70 + } 71 + 72 + #define MT6331_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \ 73 + [MT6331_ID_##vreg] = { \ 74 + .desc = { \ 75 + .name = #vreg, \ 76 + .of_match = of_match_ptr(match), \ 77 + .ops = &mt6331_volt_table_ao_ops, \ 78 + .type = REGULATOR_VOLTAGE, \ 79 + .id = MT6331_ID_##vreg, \ 80 + .owner = THIS_MODULE, \ 81 + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ 82 + .volt_table = ldo_volt_table, \ 83 + .vsel_reg = vosel, \ 84 + .vsel_mask = vosel_mask, \ 85 + }, \ 86 + } 87 + 88 + #define MT6331_LDO_S(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ 89 + vosel_mask, _modeset_reg, _modeset_mask, \ 90 + _status_reg, _status_mask) \ 91 + [MT6331_ID_##vreg] = { \ 92 + .desc = { \ 93 + .name = #vreg, \ 94 + .of_match = of_match_ptr(match), \ 95 + .ops = &mt6331_volt_table_no_qi_ops, \ 96 + .type = REGULATOR_VOLTAGE, \ 97 + .id = MT6331_ID_##vreg, \ 98 + .owner = THIS_MODULE, \ 99 + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ 100 + .volt_table = ldo_volt_table, \ 101 + .vsel_reg = vosel, \ 102 + .vsel_mask = vosel_mask, \ 103 + .enable_reg = enreg, \ 104 + .enable_mask = BIT(enbit), \ 105 + }, \ 106 + .modeset_reg = _modeset_reg, \ 107 + .modeset_mask = _modeset_mask, \ 108 + .status_reg = _status_reg, \ 109 + .status_mask = _status_mask, \ 110 + } 111 + 112 + #define MT6331_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ 113 + vosel_mask, _modeset_reg, _modeset_mask) \ 114 + [MT6331_ID_##vreg] = { \ 115 + .desc = { \ 116 + .name = #vreg, \ 117 + .of_match = of_match_ptr(match), \ 118 + .ops = (_modeset_reg ? \ 119 + &mt6331_volt_table_ops : \ 120 + &mt6331_volt_table_no_ms_ops), \ 121 + .type = REGULATOR_VOLTAGE, \ 122 + .id = MT6331_ID_##vreg, \ 123 + .owner = THIS_MODULE, \ 124 + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ 125 + .volt_table = ldo_volt_table, \ 126 + .vsel_reg = vosel, \ 127 + .vsel_mask = vosel_mask, \ 128 + .enable_reg = enreg, \ 129 + .enable_mask = BIT(enbit), \ 130 + }, \ 131 + .qi = BIT(15), \ 132 + .modeset_reg = _modeset_reg, \ 133 + .modeset_mask = _modeset_mask, \ 134 + } 135 + 136 + #define MT6331_REG_FIXED(match, vreg, enreg, enbit, qibit, volt, \ 137 + _modeset_reg, _modeset_mask) \ 138 + [MT6331_ID_##vreg] = { \ 139 + .desc = { \ 140 + .name = #vreg, \ 141 + .of_match = of_match_ptr(match), \ 142 + .ops = (_modeset_reg ? \ 143 + &mt6331_volt_fixed_ops : \ 144 + &mt6331_volt_fixed_no_ms_ops), \ 145 + .type = REGULATOR_VOLTAGE, \ 146 + .id = MT6331_ID_##vreg, \ 147 + .owner = THIS_MODULE, \ 148 + .n_voltages = 1, \ 149 + .enable_reg = enreg, \ 150 + .enable_mask = BIT(enbit), \ 151 + .min_uV = volt, \ 152 + }, \ 153 + .qi = BIT(qibit), \ 154 + .modeset_reg = _modeset_reg, \ 155 + .modeset_mask = _modeset_mask, \ 156 + } 157 + 158 + static const struct linear_range buck_volt_range[] = { 159 + REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), 160 + }; 161 + 162 + static const unsigned int ldo_volt_table1[] = { 163 + 2800000, 3000000, 0, 3200000 164 + }; 165 + 166 + static const unsigned int ldo_volt_table2[] = { 167 + 1500000, 1800000, 2500000, 2800000, 168 + }; 169 + 170 + static const unsigned int ldo_volt_table3[] = { 171 + 1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000, 172 + }; 173 + 174 + static const unsigned int ldo_volt_table4[] = { 175 + 0, 0, 1700000, 1800000, 1860000, 2760000, 3000000, 3100000, 176 + }; 177 + 178 + static const unsigned int ldo_volt_table5[] = { 179 + 1800000, 3300000, 1800000, 3300000, 180 + }; 181 + 182 + static const unsigned int ldo_volt_table6[] = { 183 + 3000000, 3300000, 184 + }; 185 + 186 + static const unsigned int ldo_volt_table7[] = { 187 + 1200000, 1600000, 1700000, 1800000, 1900000, 2000000, 2100000, 2200000, 188 + }; 189 + 190 + static const unsigned int ldo_volt_table8[] = { 191 + 900000, 1000000, 1100000, 1220000, 1300000, 1500000, 1500000, 1500000, 192 + }; 193 + 194 + static const unsigned int ldo_volt_table9[] = { 195 + 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1300000, 196 + }; 197 + 198 + static const unsigned int ldo_volt_table10[] = { 199 + 1200000, 1300000, 1500000, 1800000, 200 + }; 201 + 202 + static const unsigned int ldo_volt_table11[] = { 203 + 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, 204 + }; 205 + 206 + static int mt6331_get_status(struct regulator_dev *rdev) 207 + { 208 + struct mt6331_regulator_info *info = rdev_get_drvdata(rdev); 209 + u32 regval; 210 + int ret; 211 + 212 + ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval); 213 + if (ret != 0) { 214 + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); 215 + return ret; 216 + } 217 + 218 + return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; 219 + } 220 + 221 + static int mt6331_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) 222 + { 223 + struct mt6331_regulator_info *info = rdev_get_drvdata(rdev); 224 + int val; 225 + 226 + switch (mode) { 227 + case REGULATOR_MODE_STANDBY: 228 + val = MT6331_LDO_MODE_LP; 229 + break; 230 + case REGULATOR_MODE_NORMAL: 231 + val = MT6331_LDO_MODE_NORMAL; 232 + break; 233 + default: 234 + return -EINVAL; 235 + } 236 + 237 + val <<= ffs(info->modeset_mask) - 1; 238 + 239 + return regmap_update_bits(rdev->regmap, info->modeset_reg, 240 + info->modeset_mask, val); 241 + } 242 + 243 + static unsigned int mt6331_ldo_get_mode(struct regulator_dev *rdev) 244 + { 245 + struct mt6331_regulator_info *info = rdev_get_drvdata(rdev); 246 + unsigned int val; 247 + int ret; 248 + 249 + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); 250 + if (ret < 0) 251 + return ret; 252 + 253 + val &= info->modeset_mask; 254 + val >>= ffs(info->modeset_mask) - 1; 255 + 256 + return (val & BIT(0)) ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 257 + } 258 + 259 + static const struct regulator_ops mt6331_volt_range_ops = { 260 + .list_voltage = regulator_list_voltage_linear_range, 261 + .map_voltage = regulator_map_voltage_linear_range, 262 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 263 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 264 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 265 + .enable = regulator_enable_regmap, 266 + .disable = regulator_disable_regmap, 267 + .is_enabled = regulator_is_enabled_regmap, 268 + .get_status = mt6331_get_status, 269 + }; 270 + 271 + static const struct regulator_ops mt6331_volt_table_no_ms_ops = { 272 + .list_voltage = regulator_list_voltage_table, 273 + .map_voltage = regulator_map_voltage_iterate, 274 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 275 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 276 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 277 + .enable = regulator_enable_regmap, 278 + .disable = regulator_disable_regmap, 279 + .is_enabled = regulator_is_enabled_regmap, 280 + .get_status = mt6331_get_status, 281 + }; 282 + 283 + static const struct regulator_ops mt6331_volt_table_no_qi_ops = { 284 + .list_voltage = regulator_list_voltage_table, 285 + .map_voltage = regulator_map_voltage_iterate, 286 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 287 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 288 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 289 + .enable = regulator_enable_regmap, 290 + .disable = regulator_disable_regmap, 291 + .is_enabled = regulator_is_enabled_regmap, 292 + .set_mode = mt6331_ldo_set_mode, 293 + .get_mode = mt6331_ldo_get_mode, 294 + }; 295 + 296 + static const struct regulator_ops mt6331_volt_table_ops = { 297 + .list_voltage = regulator_list_voltage_table, 298 + .map_voltage = regulator_map_voltage_iterate, 299 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 300 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 301 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 302 + .enable = regulator_enable_regmap, 303 + .disable = regulator_disable_regmap, 304 + .is_enabled = regulator_is_enabled_regmap, 305 + .get_status = mt6331_get_status, 306 + .set_mode = mt6331_ldo_set_mode, 307 + .get_mode = mt6331_ldo_get_mode, 308 + }; 309 + 310 + static const struct regulator_ops mt6331_volt_table_ao_ops = { 311 + .list_voltage = regulator_list_voltage_table, 312 + .map_voltage = regulator_map_voltage_iterate, 313 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 314 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 315 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 316 + }; 317 + 318 + static const struct regulator_ops mt6331_volt_fixed_no_ms_ops = { 319 + .list_voltage = regulator_list_voltage_linear, 320 + .enable = regulator_enable_regmap, 321 + .disable = regulator_disable_regmap, 322 + .is_enabled = regulator_is_enabled_regmap, 323 + .get_status = mt6331_get_status, 324 + }; 325 + 326 + static const struct regulator_ops mt6331_volt_fixed_ops = { 327 + .list_voltage = regulator_list_voltage_linear, 328 + .enable = regulator_enable_regmap, 329 + .disable = regulator_disable_regmap, 330 + .is_enabled = regulator_is_enabled_regmap, 331 + .get_status = mt6331_get_status, 332 + .set_mode = mt6331_ldo_set_mode, 333 + .get_mode = mt6331_ldo_get_mode, 334 + }; 335 + 336 + /* The array is indexed by id(MT6331_ID_XXX) */ 337 + static struct mt6331_regulator_info mt6331_regulators[] = { 338 + MT6331_BUCK("buck-vdvfs11", VDVFS11, 700000, 1493750, 6250, 339 + buck_volt_range, MT6331_VDVFS11_CON9, 340 + MT6331_VDVFS11_CON11, GENMASK(6, 0), 341 + MT6331_VDVFS11_CON12, MT6331_VDVFS11_CON7), 342 + MT6331_BUCK("buck-vdvfs12", VDVFS12, 700000, 1493750, 6250, 343 + buck_volt_range, MT6331_VDVFS12_CON9, 344 + MT6331_VDVFS12_CON11, GENMASK(6, 0), 345 + MT6331_VDVFS12_CON12, MT6331_VDVFS12_CON7), 346 + MT6331_BUCK("buck-vdvfs13", VDVFS13, 700000, 1493750, 6250, 347 + buck_volt_range, MT6331_VDVFS13_CON9, 348 + MT6331_VDVFS13_CON11, GENMASK(6, 0), 349 + MT6331_VDVFS13_CON12, MT6331_VDVFS13_CON7), 350 + MT6331_BUCK("buck-vdvfs14", VDVFS14, 700000, 1493750, 6250, 351 + buck_volt_range, MT6331_VDVFS14_CON9, 352 + MT6331_VDVFS14_CON11, GENMASK(6, 0), 353 + MT6331_VDVFS14_CON12, MT6331_VDVFS14_CON7), 354 + MT6331_BUCK("buck-vcore2", VCORE2, 700000, 1493750, 6250, 355 + buck_volt_range, MT6331_VCORE2_CON9, 356 + MT6331_VCORE2_CON11, GENMASK(6, 0), 357 + MT6331_VCORE2_CON12, MT6331_VCORE2_CON7), 358 + MT6331_REG_FIXED("buck-vio18", VIO18, MT6331_VIO18_CON9, 0, 13, 1800000, 0, 0), 359 + MT6331_REG_FIXED("ldo-vrtc", VRTC, MT6331_DIGLDO_CON11, 8, 15, 2800000, 0, 0), 360 + MT6331_REG_FIXED("ldo-vtcxo1", VTCXO1, MT6331_ANALDO_CON1, 10, 15, 2800000, 361 + MT6331_ANALDO_CON1, GENMASK(1, 0)), 362 + MT6331_REG_FIXED("ldo-vtcxo2", VTCXO2, MT6331_ANALDO_CON2, 10, 15, 2800000, 363 + MT6331_ANALDO_CON2, GENMASK(1, 0)), 364 + MT6331_REG_FIXED("ldo-vsram", VSRAM_DVFS1, MT6331_SYSLDO_CON4, 10, 15, 1012500, 365 + MT6331_SYSLDO_CON4, GENMASK(1, 0)), 366 + MT6331_REG_FIXED("ldo-vio28", VIO28, MT6331_DIGLDO_CON1, 10, 15, 2800000, 367 + MT6331_DIGLDO_CON1, GENMASK(1, 0)), 368 + MT6331_LDO("ldo-avdd32aud", AVDD32_AUD, ldo_volt_table1, MT6331_ANALDO_CON3, 10, 369 + MT6331_ANALDO_CON10, GENMASK(6, 5), MT6331_ANALDO_CON3, GENMASK(1, 0)), 370 + MT6331_LDO("ldo-vauxa32", VAUXA32, ldo_volt_table1, MT6331_ANALDO_CON4, 10, 371 + MT6331_ANALDO_CON6, GENMASK(6, 5), MT6331_ANALDO_CON4, GENMASK(1, 0)), 372 + MT6331_LDO("ldo-vemc33", VEMC33, ldo_volt_table6, MT6331_DIGLDO_CON5, 10, 373 + MT6331_DIGLDO_CON17, BIT(6), MT6331_DIGLDO_CON5, GENMASK(1, 0)), 374 + MT6331_LDO("ldo-vibr", VIBR, ldo_volt_table3, MT6331_DIGLDO_CON12, 10, 375 + MT6331_DIGLDO_CON20, GENMASK(6, 4), MT6331_DIGLDO_CON12, GENMASK(1, 0)), 376 + MT6331_LDO("ldo-vmc", VMC, ldo_volt_table5, MT6331_DIGLDO_CON3, 10, 377 + MT6331_DIGLDO_CON15, GENMASK(5, 4), MT6331_DIGLDO_CON3, GENMASK(1, 0)), 378 + MT6331_LDO("ldo-vmch", VMCH, ldo_volt_table6, MT6331_DIGLDO_CON4, 10, 379 + MT6331_DIGLDO_CON16, BIT(6), MT6331_DIGLDO_CON4, GENMASK(1, 0)), 380 + MT6331_LDO("ldo-vmipi", VMIPI, ldo_volt_table3, MT6331_SYSLDO_CON5, 10, 381 + MT6331_SYSLDO_CON13, GENMASK(5, 3), MT6331_SYSLDO_CON5, GENMASK(1, 0)), 382 + MT6331_LDO("ldo-vsim1", VSIM1, ldo_volt_table4, MT6331_DIGLDO_CON8, 10, 383 + MT6331_DIGLDO_CON21, GENMASK(6, 4), MT6331_DIGLDO_CON8, GENMASK(1, 0)), 384 + MT6331_LDO("ldo-vsim2", VSIM2, ldo_volt_table4, MT6331_DIGLDO_CON9, 10, 385 + MT6331_DIGLDO_CON22, GENMASK(6, 4), MT6331_DIGLDO_CON9, GENMASK(1, 0)), 386 + MT6331_LDO("ldo-vusb10", VUSB10, ldo_volt_table9, MT6331_SYSLDO_CON2, 10, 387 + MT6331_SYSLDO_CON10, GENMASK(5, 3), MT6331_SYSLDO_CON2, GENMASK(1, 0)), 388 + MT6331_LDO("ldo-vcama", VCAMA, ldo_volt_table2, MT6331_ANALDO_CON5, 15, 389 + MT6331_ANALDO_CON9, GENMASK(5, 4), 0, 0), 390 + MT6331_LDO_S("ldo-vcamaf", VCAM_AF, ldo_volt_table3, MT6331_DIGLDO_CON2, 10, 391 + MT6331_DIGLDO_CON14, GENMASK(6, 4), MT6331_DIGLDO_CON2, GENMASK(1, 0), 392 + MT6331_EN_STATUS1, BIT(0)), 393 + MT6331_LDO_S("ldo-vcamd", VCAMD, ldo_volt_table8, MT6331_SYSLDO_CON1, 15, 394 + MT6331_SYSLDO_CON9, GENMASK(6, 4), MT6331_SYSLDO_CON1, GENMASK(1, 0), 395 + MT6331_EN_STATUS1, BIT(11)), 396 + MT6331_LDO_S("ldo-vcamio", VCAM_IO, ldo_volt_table10, MT6331_SYSLDO_CON3, 10, 397 + MT6331_SYSLDO_CON11, GENMASK(4, 3), MT6331_SYSLDO_CON3, GENMASK(1, 0), 398 + MT6331_EN_STATUS1, BIT(13)), 399 + MT6331_LDO_S("ldo-vgp1", VGP1, ldo_volt_table3, MT6331_DIGLDO_CON6, 10, 400 + MT6331_DIGLDO_CON19, GENMASK(6, 4), MT6331_DIGLDO_CON6, GENMASK(1, 0), 401 + MT6331_EN_STATUS1, BIT(4)), 402 + MT6331_LDO_S("ldo-vgp2", VGP2, ldo_volt_table10, MT6331_SYSLDO_CON6, 10, 403 + MT6331_SYSLDO_CON14, GENMASK(4, 3), MT6331_SYSLDO_CON6, GENMASK(1, 0), 404 + MT6331_EN_STATUS1, BIT(15)), 405 + MT6331_LDO_S("ldo-vgp3", VGP3, ldo_volt_table10, MT6331_SYSLDO_CON7, 10, 406 + MT6331_SYSLDO_CON15, GENMASK(4, 3), MT6331_SYSLDO_CON7, GENMASK(1, 0), 407 + MT6331_EN_STATUS2, BIT(0)), 408 + MT6331_LDO_S("ldo-vgp4", VGP4, ldo_volt_table7, MT6331_DIGLDO_CON7, 10, 409 + MT6331_DIGLDO_CON18, GENMASK(6, 4), MT6331_DIGLDO_CON7, GENMASK(1, 0), 410 + MT6331_EN_STATUS1, BIT(5)), 411 + MT6331_LDO_AO("ldo-vdig18", VDIG18, ldo_volt_table11, 412 + MT6331_DIGLDO_CON28, GENMASK(14, 12)), 413 + }; 414 + 415 + static int mt6331_set_buck_vosel_reg(struct platform_device *pdev) 416 + { 417 + struct mt6397_chip *mt6331 = dev_get_drvdata(pdev->dev.parent); 418 + int i; 419 + u32 regval; 420 + 421 + for (i = 0; i < MT6331_ID_VREG_MAX; i++) { 422 + if (mt6331_regulators[i].vselctrl_reg) { 423 + if (regmap_read(mt6331->regmap, 424 + mt6331_regulators[i].vselctrl_reg, 425 + &regval) < 0) { 426 + dev_err(&pdev->dev, 427 + "Failed to read buck ctrl\n"); 428 + return -EIO; 429 + } 430 + 431 + if (regval & mt6331_regulators[i].vselctrl_mask) { 432 + mt6331_regulators[i].desc.vsel_reg = 433 + mt6331_regulators[i].vselon_reg; 434 + } 435 + } 436 + } 437 + 438 + return 0; 439 + } 440 + 441 + static int mt6331_regulator_probe(struct platform_device *pdev) 442 + { 443 + struct mt6397_chip *mt6331 = dev_get_drvdata(pdev->dev.parent); 444 + struct regulator_config config = {}; 445 + struct regulator_dev *rdev; 446 + int i; 447 + u32 reg_value; 448 + 449 + /* Query buck controller to select activated voltage register part */ 450 + if (mt6331_set_buck_vosel_reg(pdev)) 451 + return -EIO; 452 + 453 + /* Read PMIC chip revision to update constraints and voltage table */ 454 + if (regmap_read(mt6331->regmap, MT6331_HWCID, &reg_value) < 0) { 455 + dev_err(&pdev->dev, "Failed to read Chip ID\n"); 456 + return -EIO; 457 + } 458 + reg_value &= GENMASK(7, 0); 459 + 460 + dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); 461 + 462 + /* 463 + * ChipID 0x10 is "MT6331 E1", has a different voltage table and 464 + * it's currently not supported in this driver. Upon detection of 465 + * this ID, refuse to register the regulators, as we will wrongly 466 + * interpret the VSEL for this revision, potentially overvolting 467 + * some device. 468 + */ 469 + if (reg_value == 0x10) { 470 + dev_err(&pdev->dev, "Chip version not supported. Bailing out.\n"); 471 + return -EINVAL; 472 + } 473 + 474 + for (i = 0; i < MT6331_ID_VREG_MAX; i++) { 475 + config.dev = &pdev->dev; 476 + config.driver_data = &mt6331_regulators[i]; 477 + config.regmap = mt6331->regmap; 478 + rdev = devm_regulator_register(&pdev->dev, 479 + &mt6331_regulators[i].desc, &config); 480 + if (IS_ERR(rdev)) { 481 + dev_err(&pdev->dev, "failed to register %s\n", 482 + mt6331_regulators[i].desc.name); 483 + return PTR_ERR(rdev); 484 + } 485 + } 486 + return 0; 487 + } 488 + 489 + static const struct platform_device_id mt6331_platform_ids[] = { 490 + {"mt6331-regulator", 0}, 491 + { /* sentinel */ }, 492 + }; 493 + MODULE_DEVICE_TABLE(platform, mt6331_platform_ids); 494 + 495 + static struct platform_driver mt6331_regulator_driver = { 496 + .driver = { 497 + .name = "mt6331-regulator", 498 + }, 499 + .probe = mt6331_regulator_probe, 500 + .id_table = mt6331_platform_ids, 501 + }; 502 + 503 + module_platform_driver(mt6331_regulator_driver); 504 + 505 + MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>"); 506 + MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6331 PMIC"); 507 + MODULE_LICENSE("GPL");
+422
drivers/regulator/mt6332-regulator.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // 3 + // Copyright (c) 2022 Collabora Ltd. 4 + // Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 5 + // 6 + // Based on mt6323-regulator.c, 7 + // Copyright (c) 2016 MediaTek Inc. 8 + // 9 + 10 + #include <linux/module.h> 11 + #include <linux/of.h> 12 + #include <linux/platform_device.h> 13 + #include <linux/regmap.h> 14 + #include <linux/mfd/mt6397/core.h> 15 + #include <linux/mfd/mt6332/registers.h> 16 + #include <linux/regulator/driver.h> 17 + #include <linux/regulator/machine.h> 18 + #include <linux/regulator/mt6332-regulator.h> 19 + #include <linux/regulator/of_regulator.h> 20 + 21 + #define MT6332_LDO_MODE_NORMAL 0 22 + #define MT6332_LDO_MODE_LP 1 23 + 24 + /* 25 + * MT6332 regulators information 26 + * 27 + * @desc: standard fields of regulator description. 28 + * @qi: Mask for query enable signal status of regulators 29 + * @vselon_reg: Register sections for hardware control mode of bucks 30 + * @vselctrl_reg: Register for controlling the buck control mode. 31 + * @vselctrl_mask: Mask for query buck's voltage control mode. 32 + * @status_reg: Register for regulator enable status where qi unavailable 33 + * @status_mask: Mask for querying regulator enable status 34 + */ 35 + struct mt6332_regulator_info { 36 + struct regulator_desc desc; 37 + u32 qi; 38 + u32 vselon_reg; 39 + u32 vselctrl_reg; 40 + u32 vselctrl_mask; 41 + u32 modeset_reg; 42 + u32 modeset_mask; 43 + u32 status_reg; 44 + u32 status_mask; 45 + }; 46 + 47 + #define MT6332_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ 48 + vosel, vosel_mask, voselon, vosel_ctrl) \ 49 + [MT6332_ID_##vreg] = { \ 50 + .desc = { \ 51 + .name = #vreg, \ 52 + .of_match = of_match_ptr(match), \ 53 + .ops = &mt6332_buck_volt_range_ops, \ 54 + .type = REGULATOR_VOLTAGE, \ 55 + .id = MT6332_ID_##vreg, \ 56 + .owner = THIS_MODULE, \ 57 + .n_voltages = (max - min)/step + 1, \ 58 + .linear_ranges = volt_ranges, \ 59 + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ 60 + .vsel_reg = vosel, \ 61 + .vsel_mask = vosel_mask, \ 62 + .enable_reg = enreg, \ 63 + .enable_mask = BIT(0), \ 64 + }, \ 65 + .qi = BIT(13), \ 66 + .vselon_reg = voselon, \ 67 + .vselctrl_reg = vosel_ctrl, \ 68 + .vselctrl_mask = BIT(1), \ 69 + .status_mask = 0, \ 70 + } 71 + 72 + #define MT6332_LDO_LINEAR(match, vreg, min, max, step, volt_ranges, \ 73 + enreg, vosel, vosel_mask, voselon, \ 74 + vosel_ctrl, _modeset_reg, _modeset_mask) \ 75 + [MT6332_ID_##vreg] = { \ 76 + .desc = { \ 77 + .name = #vreg, \ 78 + .of_match = of_match_ptr(match), \ 79 + .ops = &mt6332_ldo_volt_range_ops, \ 80 + .type = REGULATOR_VOLTAGE, \ 81 + .id = MT6332_ID_##vreg, \ 82 + .owner = THIS_MODULE, \ 83 + .n_voltages = (max - min)/step + 1, \ 84 + .linear_ranges = volt_ranges, \ 85 + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ 86 + .vsel_reg = vosel, \ 87 + .vsel_mask = vosel_mask, \ 88 + .enable_reg = enreg, \ 89 + .enable_mask = BIT(0), \ 90 + }, \ 91 + .qi = BIT(15), \ 92 + .vselon_reg = voselon, \ 93 + .vselctrl_reg = vosel_ctrl, \ 94 + .vselctrl_mask = BIT(1), \ 95 + .modeset_reg = _modeset_reg, \ 96 + .modeset_mask = _modeset_mask, \ 97 + .status_mask = 0, \ 98 + } 99 + 100 + #define MT6332_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \ 101 + [MT6332_ID_##vreg] = { \ 102 + .desc = { \ 103 + .name = #vreg, \ 104 + .of_match = of_match_ptr(match), \ 105 + .ops = &mt6332_volt_table_ao_ops, \ 106 + .type = REGULATOR_VOLTAGE, \ 107 + .id = MT6332_ID_##vreg, \ 108 + .owner = THIS_MODULE, \ 109 + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ 110 + .volt_table = ldo_volt_table, \ 111 + .vsel_reg = vosel, \ 112 + .vsel_mask = vosel_mask, \ 113 + }, \ 114 + } 115 + 116 + #define MT6332_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ 117 + vosel_mask, _modeset_reg, _modeset_mask) \ 118 + [MT6332_ID_##vreg] = { \ 119 + .desc = { \ 120 + .name = #vreg, \ 121 + .of_match = of_match_ptr(match), \ 122 + .ops = &mt6332_volt_table_ops, \ 123 + .type = REGULATOR_VOLTAGE, \ 124 + .id = MT6332_ID_##vreg, \ 125 + .owner = THIS_MODULE, \ 126 + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ 127 + .volt_table = ldo_volt_table, \ 128 + .vsel_reg = vosel, \ 129 + .vsel_mask = vosel_mask, \ 130 + .enable_reg = enreg, \ 131 + .enable_mask = BIT(enbit), \ 132 + }, \ 133 + .qi = BIT(15), \ 134 + .modeset_reg = _modeset_reg, \ 135 + .modeset_mask = _modeset_mask, \ 136 + .status_mask = 0, \ 137 + } 138 + 139 + #define MT6332_REG_FIXED(match, vreg, enreg, enbit, qibit, volt, stbit) \ 140 + [MT6332_ID_##vreg] = { \ 141 + .desc = { \ 142 + .name = #vreg, \ 143 + .of_match = of_match_ptr(match), \ 144 + .ops = &mt6332_volt_fixed_ops, \ 145 + .type = REGULATOR_VOLTAGE, \ 146 + .id = MT6332_ID_##vreg, \ 147 + .owner = THIS_MODULE, \ 148 + .n_voltages = 1, \ 149 + .enable_reg = enreg, \ 150 + .enable_mask = BIT(enbit), \ 151 + .min_uV = volt, \ 152 + }, \ 153 + .qi = BIT(qibit), \ 154 + .status_reg = MT6332_EN_STATUS0, \ 155 + .status_mask = BIT(stbit), \ 156 + } 157 + 158 + static const struct linear_range boost_volt_range[] = { 159 + REGULATOR_LINEAR_RANGE(3500000, 0, 0x7f, 31250), 160 + }; 161 + 162 + static const struct linear_range buck_volt_range[] = { 163 + REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250), 164 + }; 165 + 166 + static const struct linear_range buck_pa_volt_range[] = { 167 + REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), 168 + }; 169 + 170 + static const struct linear_range buck_rf_volt_range[] = { 171 + REGULATOR_LINEAR_RANGE(1050000, 0, 0x7f, 9375), 172 + }; 173 + 174 + static const unsigned int ldo_volt_table1[] = { 175 + 2800000, 3000000, 0, 3200000 176 + }; 177 + 178 + static const unsigned int ldo_volt_table2[] = { 179 + 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, 180 + }; 181 + 182 + static int mt6332_get_status(struct regulator_dev *rdev) 183 + { 184 + struct mt6332_regulator_info *info = rdev_get_drvdata(rdev); 185 + u32 reg, en_mask, regval; 186 + int ret; 187 + 188 + if (info->qi > 0) { 189 + reg = info->desc.enable_reg; 190 + en_mask = info->qi; 191 + } else { 192 + reg = info->status_reg; 193 + en_mask = info->status_mask; 194 + } 195 + 196 + ret = regmap_read(rdev->regmap, reg, &regval); 197 + if (ret != 0) { 198 + dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret); 199 + return ret; 200 + } 201 + 202 + return (regval & en_mask) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; 203 + } 204 + 205 + static int mt6332_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode) 206 + { 207 + struct mt6332_regulator_info *info = rdev_get_drvdata(rdev); 208 + int val; 209 + 210 + switch (mode) { 211 + case REGULATOR_MODE_STANDBY: 212 + val = MT6332_LDO_MODE_LP; 213 + break; 214 + case REGULATOR_MODE_NORMAL: 215 + val = MT6332_LDO_MODE_NORMAL; 216 + break; 217 + default: 218 + return -EINVAL; 219 + } 220 + 221 + val <<= ffs(info->modeset_mask) - 1; 222 + 223 + return regmap_update_bits(rdev->regmap, info->modeset_reg, 224 + info->modeset_mask, val); 225 + } 226 + 227 + static unsigned int mt6332_ldo_get_mode(struct regulator_dev *rdev) 228 + { 229 + struct mt6332_regulator_info *info = rdev_get_drvdata(rdev); 230 + unsigned int val; 231 + int ret; 232 + 233 + ret = regmap_read(rdev->regmap, info->modeset_reg, &val); 234 + if (ret < 0) 235 + return ret; 236 + 237 + val &= info->modeset_mask; 238 + val >>= ffs(info->modeset_mask) - 1; 239 + 240 + return (val & BIT(0)) ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 241 + } 242 + 243 + static const struct regulator_ops mt6332_buck_volt_range_ops = { 244 + .list_voltage = regulator_list_voltage_linear_range, 245 + .map_voltage = regulator_map_voltage_linear_range, 246 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 247 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 248 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 249 + .enable = regulator_enable_regmap, 250 + .disable = regulator_disable_regmap, 251 + .is_enabled = regulator_is_enabled_regmap, 252 + .get_status = mt6332_get_status, 253 + }; 254 + 255 + static const struct regulator_ops mt6332_ldo_volt_range_ops = { 256 + .list_voltage = regulator_list_voltage_linear_range, 257 + .map_voltage = regulator_map_voltage_linear_range, 258 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 259 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 260 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 261 + .enable = regulator_enable_regmap, 262 + .disable = regulator_disable_regmap, 263 + .is_enabled = regulator_is_enabled_regmap, 264 + .get_status = mt6332_get_status, 265 + .set_mode = mt6332_ldo_set_mode, 266 + .get_mode = mt6332_ldo_get_mode, 267 + }; 268 + 269 + static const struct regulator_ops mt6332_volt_table_ops = { 270 + .list_voltage = regulator_list_voltage_table, 271 + .map_voltage = regulator_map_voltage_iterate, 272 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 273 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 274 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 275 + .enable = regulator_enable_regmap, 276 + .disable = regulator_disable_regmap, 277 + .is_enabled = regulator_is_enabled_regmap, 278 + .get_status = mt6332_get_status, 279 + .set_mode = mt6332_ldo_set_mode, 280 + .get_mode = mt6332_ldo_get_mode, 281 + }; 282 + 283 + static const struct regulator_ops mt6332_volt_table_ao_ops = { 284 + .list_voltage = regulator_list_voltage_table, 285 + .map_voltage = regulator_map_voltage_iterate, 286 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 287 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 288 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 289 + }; 290 + 291 + static const struct regulator_ops mt6332_volt_fixed_ops = { 292 + .list_voltage = regulator_list_voltage_linear, 293 + .enable = regulator_enable_regmap, 294 + .disable = regulator_disable_regmap, 295 + .is_enabled = regulator_is_enabled_regmap, 296 + .get_status = mt6332_get_status, 297 + }; 298 + 299 + /* The array is indexed by id(MT6332_ID_XXX) */ 300 + static struct mt6332_regulator_info mt6332_regulators[] = { 301 + MT6332_BUCK("buck-vdram", VDRAM, 700000, 1493750, 6250, buck_volt_range, 302 + MT6332_EN_STATUS0, MT6332_VDRAM_CON11, GENMASK(6, 0), 303 + MT6332_VDRAM_CON12, MT6332_VDRAM_CON7), 304 + MT6332_BUCK("buck-vdvfs2", VDVFS2, 700000, 1312500, 6250, buck_volt_range, 305 + MT6332_VDVFS2_CON9, MT6332_VDVFS2_CON11, GENMASK(6, 0), 306 + MT6332_VDVFS2_CON12, MT6332_VDVFS2_CON7), 307 + MT6332_BUCK("buck-vpa", VPA, 500000, 3400000, 50000, buck_pa_volt_range, 308 + MT6332_VPA_CON9, MT6332_VPA_CON11, GENMASK(5, 0), 309 + MT6332_VPA_CON12, MT6332_VPA_CON7), 310 + MT6332_BUCK("buck-vrf18a", VRF1, 1050000, 2240625, 9375, buck_rf_volt_range, 311 + MT6332_VRF1_CON9, MT6332_VRF1_CON11, GENMASK(6, 0), 312 + MT6332_VRF1_CON12, MT6332_VRF1_CON7), 313 + MT6332_BUCK("buck-vrf18b", VRF2, 1050000, 2240625, 9375, buck_rf_volt_range, 314 + MT6332_VRF2_CON9, MT6332_VRF2_CON11, GENMASK(6, 0), 315 + MT6332_VRF2_CON12, MT6332_VRF2_CON7), 316 + MT6332_BUCK("buck-vsbst", VSBST, 3500000, 7468750, 31250, boost_volt_range, 317 + MT6332_VSBST_CON8, MT6332_VSBST_CON12, GENMASK(6, 0), 318 + MT6332_VSBST_CON13, MT6332_VSBST_CON8), 319 + MT6332_LDO("ldo-vauxb32", VAUXB32, ldo_volt_table1, MT6332_LDO_CON1, 10, 320 + MT6332_LDO_CON9, GENMASK(6, 5), MT6332_LDO_CON1, GENMASK(1, 0)), 321 + MT6332_REG_FIXED("ldo-vbif28", VBIF28, MT6332_LDO_CON2, 10, 0, 2800000, 1), 322 + MT6332_REG_FIXED("ldo-vusb33", VUSB33, MT6332_LDO_CON3, 10, 0, 3300000, 2), 323 + MT6332_LDO_LINEAR("ldo-vsram", VSRAM_DVFS2, 700000, 1493750, 6250, buck_volt_range, 324 + MT6332_EN_STATUS0, MT6332_LDO_CON8, GENMASK(15, 9), 325 + MT6332_VDVFS2_CON23, MT6332_VDVFS2_CON22, 326 + MT6332_LDO_CON5, GENMASK(1, 0)), 327 + MT6332_LDO_AO("ldo-vdig18", VDIG18, ldo_volt_table2, MT6332_LDO_CON12, GENMASK(11, 9)), 328 + }; 329 + 330 + static int mt6332_set_buck_vosel_reg(struct platform_device *pdev) 331 + { 332 + struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent); 333 + int i; 334 + u32 regval; 335 + 336 + for (i = 0; i < MT6332_ID_VREG_MAX; i++) { 337 + if (mt6332_regulators[i].vselctrl_reg) { 338 + if (regmap_read(mt6332->regmap, 339 + mt6332_regulators[i].vselctrl_reg, 340 + &regval) < 0) { 341 + dev_err(&pdev->dev, 342 + "Failed to read buck ctrl\n"); 343 + return -EIO; 344 + } 345 + 346 + if (regval & mt6332_regulators[i].vselctrl_mask) { 347 + mt6332_regulators[i].desc.vsel_reg = 348 + mt6332_regulators[i].vselon_reg; 349 + } 350 + } 351 + } 352 + 353 + return 0; 354 + } 355 + 356 + static int mt6332_regulator_probe(struct platform_device *pdev) 357 + { 358 + struct mt6397_chip *mt6332 = dev_get_drvdata(pdev->dev.parent); 359 + struct regulator_config config = {}; 360 + struct regulator_dev *rdev; 361 + int i; 362 + u32 reg_value; 363 + 364 + /* Query buck controller to select activated voltage register part */ 365 + if (mt6332_set_buck_vosel_reg(pdev)) 366 + return -EIO; 367 + 368 + /* Read PMIC chip revision to update constraints and voltage table */ 369 + if (regmap_read(mt6332->regmap, MT6332_HWCID, &reg_value) < 0) { 370 + dev_err(&pdev->dev, "Failed to read Chip ID\n"); 371 + return -EIO; 372 + } 373 + reg_value &= GENMASK(7, 0); 374 + 375 + dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); 376 + 377 + /* 378 + * ChipID 0x10 is "MT6332 E1", has a different voltage table and 379 + * it's currently not supported in this driver. Upon detection of 380 + * this ID, refuse to register the regulators, as we will wrongly 381 + * interpret the VSEL for this revision, potentially overvolting 382 + * some device. 383 + */ 384 + if (reg_value == 0x10) { 385 + dev_err(&pdev->dev, "Chip version not supported. Bailing out.\n"); 386 + return -EINVAL; 387 + } 388 + 389 + for (i = 0; i < MT6332_ID_VREG_MAX; i++) { 390 + config.dev = &pdev->dev; 391 + config.driver_data = &mt6332_regulators[i]; 392 + config.regmap = mt6332->regmap; 393 + rdev = devm_regulator_register(&pdev->dev, 394 + &mt6332_regulators[i].desc, &config); 395 + if (IS_ERR(rdev)) { 396 + dev_err(&pdev->dev, "failed to register %s\n", 397 + mt6332_regulators[i].desc.name); 398 + return PTR_ERR(rdev); 399 + } 400 + } 401 + return 0; 402 + } 403 + 404 + static const struct platform_device_id mt6332_platform_ids[] = { 405 + {"mt6332-regulator", 0}, 406 + { /* sentinel */ }, 407 + }; 408 + MODULE_DEVICE_TABLE(platform, mt6332_platform_ids); 409 + 410 + static struct platform_driver mt6332_regulator_driver = { 411 + .driver = { 412 + .name = "mt6332-regulator", 413 + }, 414 + .probe = mt6332_regulator_probe, 415 + .id_table = mt6332_platform_ids, 416 + }; 417 + 418 + module_platform_driver(mt6332_regulator_driver); 419 + 420 + MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>"); 421 + MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6332 PMIC"); 422 + MODULE_LICENSE("GPL");
+1 -1
drivers/regulator/of_regulator.c
··· 676 676 } 677 677 678 678 /** 679 - * of_parse_coupled regulator - Get regulator_dev pointer from rdev's property 679 + * of_parse_coupled_regulator() - Get regulator_dev pointer from rdev's property 680 680 * @rdev: Pointer to regulator_dev, whose DTS is used as a source to parse 681 681 * "regulator-coupled-with" property 682 682 * @index: Index in phandles array
+62 -9
drivers/regulator/qcom-rpmh-regulator.c
··· 306 306 } 307 307 308 308 /** 309 - * rpmh_regulator_vrm_set_load() - set the regulator mode based upon the load 310 - * current requested 309 + * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load 311 310 * @rdev: Regulator device pointer for the rpmh-regulator 311 + * @input_uV: Input voltage 312 + * @output_uV: Output voltage 312 313 * @load_uA: Aggregated load current in microamps 313 314 * 314 315 * This function is used in the regulator_ops for VRM type RPMh regulator ··· 317 316 * 318 317 * Return: 0 on success, errno on failure 319 318 */ 320 - static int rpmh_regulator_vrm_set_load(struct regulator_dev *rdev, int load_uA) 319 + static unsigned int rpmh_regulator_vrm_get_optimum_mode( 320 + struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA) 321 321 { 322 322 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); 323 - unsigned int mode; 324 323 325 324 if (load_uA >= vreg->hw_data->hpm_min_load_uA) 326 - mode = REGULATOR_MODE_NORMAL; 325 + return REGULATOR_MODE_NORMAL; 327 326 else 328 - mode = REGULATOR_MODE_IDLE; 329 - 330 - return rpmh_regulator_vrm_set_mode(rdev, mode); 327 + return REGULATOR_MODE_IDLE; 331 328 } 332 329 333 330 static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev, ··· 374 375 .list_voltage = regulator_list_voltage_linear_range, 375 376 .set_mode = rpmh_regulator_vrm_set_mode, 376 377 .get_mode = rpmh_regulator_vrm_get_mode, 377 - .set_load = rpmh_regulator_vrm_set_load, 378 + .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode, 378 379 }; 379 380 380 381 static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = { ··· 1198 1199 {} 1199 1200 }; 1200 1201 1202 + static const struct rpmh_vreg_init_data pm660_vreg_data[] = { 1203 + RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 1204 + RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 1205 + RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"), 1206 + RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"), 1207 + RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"), 1208 + RPMH_VREG("smps6", "smp%s6", &pmic4_hfsmps3, "vdd-s6"), 1209 + RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l6-l7"), 1210 + RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l3"), 1211 + RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l2-l3"), 1212 + /* ldo4 is inaccessible on PM660 */ 1213 + RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l5"), 1214 + RPMH_VREG("ldo6", "ldo%s6", &pmic4_nldo, "vdd-l1-l6-l7"), 1215 + RPMH_VREG("ldo7", "ldo%s7", &pmic4_nldo, "vdd-l1-l6-l7"), 1216 + RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1217 + RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1218 + RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1219 + RPMH_VREG("ldo11", "ldo%s11", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1220 + RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1221 + RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1222 + RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1223 + RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1224 + RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1225 + RPMH_VREG("ldo17", "ldo%s17", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1226 + RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1227 + RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1228 + {} 1229 + }; 1230 + 1231 + static const struct rpmh_vreg_init_data pm660l_vreg_data[] = { 1232 + RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 1233 + RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 1234 + RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3-s4"), 1235 + RPMH_VREG("smps5", "smp%s5", &pmic4_ftsmps426, "vdd-s5"), 1236 + RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l9-l10"), 1237 + RPMH_VREG("ldo2", "ldo%s2", &pmic4_pldo, "vdd-l2"), 1238 + RPMH_VREG("ldo3", "ldo%s3", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1239 + RPMH_VREG("ldo4", "ldo%s4", &pmic4_pldo, "vdd-l4-l6"), 1240 + RPMH_VREG("ldo5", "ldo%s5", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1241 + RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l4-l6"), 1242 + RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1243 + RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1244 + RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"), 1245 + {} 1246 + }; 1247 + 1201 1248 static int rpmh_regulator_probe(struct platform_device *pdev) 1202 1249 { 1203 1250 struct device *dev = &pdev->dev; ··· 1365 1320 { 1366 1321 .compatible = "qcom,pmr735a-rpmh-regulators", 1367 1322 .data = pmr735a_vreg_data, 1323 + }, 1324 + { 1325 + .compatible = "qcom,pm660-rpmh-regulators", 1326 + .data = pm660_vreg_data, 1327 + }, 1328 + { 1329 + .compatible = "qcom,pm660l-rpmh-regulators", 1330 + .data = pm660l_vreg_data, 1368 1331 }, 1369 1332 {} 1370 1333 };
+12 -12
drivers/regulator/qcom_rpm-regulator.c
··· 802 802 }; 803 803 804 804 static const struct rpm_regulator_data rpm_pm8058_regulators[] = { 805 + { "s0", QCOM_RPM_PM8058_SMPS0, &pm8058_smps, "vdd_s0" }, 806 + { "s1", QCOM_RPM_PM8058_SMPS1, &pm8058_smps, "vdd_s1" }, 807 + { "s2", QCOM_RPM_PM8058_SMPS2, &pm8058_smps, "vdd_s2" }, 808 + { "s3", QCOM_RPM_PM8058_SMPS3, &pm8058_smps, "vdd_s3" }, 809 + { "s4", QCOM_RPM_PM8058_SMPS4, &pm8058_smps, "vdd_s4" }, 810 + 805 811 { "l0", QCOM_RPM_PM8058_LDO0, &pm8058_nldo, "vdd_l0_l1_lvs" }, 806 812 { "l1", QCOM_RPM_PM8058_LDO1, &pm8058_nldo, "vdd_l0_l1_lvs" }, 807 813 { "l2", QCOM_RPM_PM8058_LDO2, &pm8058_pldo, "vdd_l2_l11_l12" }, ··· 835 829 { "l24", QCOM_RPM_PM8058_LDO24, &pm8058_nldo, "vdd_l23_l24_l25" }, 836 830 { "l25", QCOM_RPM_PM8058_LDO25, &pm8058_nldo, "vdd_l23_l24_l25" }, 837 831 838 - { "s0", QCOM_RPM_PM8058_SMPS0, &pm8058_smps, "vdd_s0" }, 839 - { "s1", QCOM_RPM_PM8058_SMPS1, &pm8058_smps, "vdd_s1" }, 840 - { "s2", QCOM_RPM_PM8058_SMPS2, &pm8058_smps, "vdd_s2" }, 841 - { "s3", QCOM_RPM_PM8058_SMPS3, &pm8058_smps, "vdd_s3" }, 842 - { "s4", QCOM_RPM_PM8058_SMPS4, &pm8058_smps, "vdd_s4" }, 843 - 844 832 { "lvs0", QCOM_RPM_PM8058_LVS0, &pm8058_switch, "vdd_l0_l1_lvs" }, 845 833 { "lvs1", QCOM_RPM_PM8058_LVS1, &pm8058_switch, "vdd_l0_l1_lvs" }, 846 834 ··· 843 843 }; 844 844 845 845 static const struct rpm_regulator_data rpm_pm8901_regulators[] = { 846 + { "s0", QCOM_RPM_PM8901_SMPS0, &pm8901_ftsmps, "vdd_s0" }, 847 + { "s1", QCOM_RPM_PM8901_SMPS1, &pm8901_ftsmps, "vdd_s1" }, 848 + { "s2", QCOM_RPM_PM8901_SMPS2, &pm8901_ftsmps, "vdd_s2" }, 849 + { "s3", QCOM_RPM_PM8901_SMPS3, &pm8901_ftsmps, "vdd_s3" }, 850 + { "s4", QCOM_RPM_PM8901_SMPS4, &pm8901_ftsmps, "vdd_s4" }, 851 + 846 852 { "l0", QCOM_RPM_PM8901_LDO0, &pm8901_nldo, "vdd_l0" }, 847 853 { "l1", QCOM_RPM_PM8901_LDO1, &pm8901_pldo, "vdd_l1" }, 848 854 { "l2", QCOM_RPM_PM8901_LDO2, &pm8901_pldo, "vdd_l2" }, ··· 856 850 { "l4", QCOM_RPM_PM8901_LDO4, &pm8901_pldo, "vdd_l4" }, 857 851 { "l5", QCOM_RPM_PM8901_LDO5, &pm8901_pldo, "vdd_l5" }, 858 852 { "l6", QCOM_RPM_PM8901_LDO6, &pm8901_pldo, "vdd_l6" }, 859 - 860 - { "s0", QCOM_RPM_PM8901_SMPS0, &pm8901_ftsmps, "vdd_s0" }, 861 - { "s1", QCOM_RPM_PM8901_SMPS1, &pm8901_ftsmps, "vdd_s1" }, 862 - { "s2", QCOM_RPM_PM8901_SMPS2, &pm8901_ftsmps, "vdd_s2" }, 863 - { "s3", QCOM_RPM_PM8901_SMPS3, &pm8901_ftsmps, "vdd_s3" }, 864 - { "s4", QCOM_RPM_PM8901_SMPS4, &pm8901_ftsmps, "vdd_s4" }, 865 853 866 854 { "lvs0", QCOM_RPM_PM8901_LVS0, &pm8901_switch, "lvs0_in" }, 867 855 { "lvs1", QCOM_RPM_PM8901_LVS1, &pm8901_switch, "lvs1_in" },
+223 -177
drivers/regulator/qcom_smd-regulator.c
··· 668 668 .ops = &rpm_bob_ops, 669 669 }; 670 670 671 + static const struct regulator_desc pm6125_ftsmps = { 672 + .linear_ranges = (struct linear_range[]) { 673 + REGULATOR_LINEAR_RANGE(300000, 0, 268, 4000), 674 + }, 675 + .n_linear_ranges = 1, 676 + .n_voltages = 269, 677 + .ops = &rpm_smps_ldo_ops, 678 + }; 679 + 671 680 static const struct regulator_desc pms405_hfsmps3 = { 672 681 .linear_ranges = (struct linear_range[]) { 673 682 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), ··· 781 772 {} 782 773 }; 783 774 775 + static const struct rpm_regulator_data rpm_pm2250_regulators[] = { 776 + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" }, 777 + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" }, 778 + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" }, 779 + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" }, 780 + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 781 + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 782 + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 783 + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 784 + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 785 + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 786 + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 787 + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 788 + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 789 + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 790 + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 791 + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 792 + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 793 + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 794 + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 795 + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 796 + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 797 + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 798 + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 799 + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 800 + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 801 + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 802 + {} 803 + }; 804 + 805 + static const struct rpm_regulator_data rpm_pm6125_regulators[] = { 806 + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm6125_ftsmps, "vdd_s1" }, 807 + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm6125_ftsmps, "vdd_s2" }, 808 + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm6125_ftsmps, "vdd_s3" }, 809 + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm6125_ftsmps, "vdd_s4" }, 810 + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, 811 + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_hfsmps, "vdd_s6" }, 812 + { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" }, 813 + { "s8", QCOM_SMD_RPM_SMPA, 8, &pm6125_ftsmps, "vdd_s8" }, 814 + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 815 + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l2_l3_l4" }, 816 + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3_l4" }, 817 + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd_l2_l3_l4" }, 818 + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 819 + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l6_l8" }, 820 + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 821 + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l6_l8" }, 822 + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l9_l11" }, 823 + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, 824 + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l9_l11" }, 825 + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l12_l16" }, 826 + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, 827 + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l10_l13_l14" }, 828 + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 829 + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l12_l16" }, 830 + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 831 + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd_l1_l7_l17_l18" }, 832 + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 833 + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 834 + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 835 + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" }, 836 + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm660_pldo660, "vdd_l23_l24" }, 837 + { "l24", QCOM_SMD_RPM_LDOA, 24, &pm660_pldo660, "vdd_l23_l24" }, 838 + { } 839 + }; 840 + 841 + static const struct rpm_regulator_data rpm_pm660_regulators[] = { 842 + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" }, 843 + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" }, 844 + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" }, 845 + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" }, 846 + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" }, 847 + { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" }, 848 + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" }, 849 + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" }, 850 + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" }, 851 + /* l4 is unaccessible on PM660 */ 852 + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" }, 853 + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 854 + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 855 + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 856 + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 857 + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 858 + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 859 + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 860 + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 861 + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 862 + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 863 + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 864 + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 865 + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 866 + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 867 + { } 868 + }; 869 + 870 + static const struct rpm_regulator_data rpm_pm660l_regulators[] = { 871 + { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" }, 872 + { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" }, 873 + { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" }, 874 + { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" }, 875 + { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" }, 876 + { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" }, 877 + { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 878 + { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" }, 879 + { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 880 + { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" }, 881 + { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 882 + { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 883 + { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 884 + { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 885 + { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", }, 886 + { } 887 + }; 888 + 889 + static const struct rpm_regulator_data rpm_pm8226_regulators[] = { 890 + { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" }, 891 + { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" }, 892 + { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" }, 893 + { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" }, 894 + { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" }, 895 + { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 896 + { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 897 + { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" }, 898 + { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 899 + { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 900 + { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 901 + { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 902 + { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 903 + { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 904 + { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" }, 905 + { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" }, 906 + { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" }, 907 + { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" }, 908 + { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" }, 909 + { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 910 + { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 911 + { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 912 + { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 913 + { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 914 + { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 915 + { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 916 + { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 917 + { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 918 + { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" }, 919 + { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" }, 920 + { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" }, 921 + { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 922 + { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 923 + { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" }, 924 + {} 925 + }; 926 + 784 927 static const struct rpm_regulator_data rpm_pm8841_regulators[] = { 785 928 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" }, 786 929 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" }, ··· 994 833 {} 995 834 }; 996 835 997 - static const struct rpm_regulator_data rpm_pm8226_regulators[] = { 998 - { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" }, 999 - { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" }, 1000 - { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" }, 1001 - { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" }, 1002 - { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" }, 1003 - { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 1004 - { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 1005 - { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" }, 1006 - { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 1007 - { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 1008 - { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 1009 - { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 1010 - { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 1011 - { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 1012 - { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" }, 1013 - { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" }, 1014 - { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" }, 1015 - { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" }, 1016 - { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" }, 1017 - { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 1018 - { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 1019 - { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 1020 - { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 1021 - { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 1022 - { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 1023 - { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 1024 - { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 1025 - { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 1026 - { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" }, 1027 - { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" }, 1028 - { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" }, 1029 - { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 1030 - { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 1031 - { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" }, 1032 - {} 1033 - }; 1034 - 1035 836 static const struct rpm_regulator_data rpm_pm8941_regulators[] = { 1036 837 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" }, 1037 838 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" }, ··· 1031 908 1032 909 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" }, 1033 910 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" }, 1034 - 1035 - {} 1036 - }; 1037 - 1038 - static const struct rpm_regulator_data rpm_pma8084_regulators[] = { 1039 - { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" }, 1040 - { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" }, 1041 - { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, 1042 - { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, 1043 - { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" }, 1044 - { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" }, 1045 - { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" }, 1046 - { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" }, 1047 - { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" }, 1048 - { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" }, 1049 - { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" }, 1050 - { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" }, 1051 - 1052 - { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" }, 1053 - { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1054 - { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1055 - { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1056 - { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" }, 1057 - { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1058 - { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" }, 1059 - { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" }, 1060 - { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1061 - { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1062 - { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" }, 1063 - { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1064 - { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1065 - { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1066 - { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1067 - { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" }, 1068 - { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" }, 1069 - { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" }, 1070 - { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" }, 1071 - { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1072 - { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" }, 1073 - { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" }, 1074 - { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1075 - { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1076 - { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" }, 1077 - { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1078 - { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1079 - 1080 - { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch }, 1081 - { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch }, 1082 - { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch }, 1083 - { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch }, 1084 - { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch }, 1085 911 1086 912 {} 1087 913 }; ··· 1154 1082 {} 1155 1083 }; 1156 1084 1157 - static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { 1158 - { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, 1159 - { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, 1160 - { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, 1161 - { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, 1162 - {} 1163 - }; 1164 - 1165 1085 static const struct rpm_regulator_data rpm_pm8998_regulators[] = { 1166 1086 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" }, 1167 1087 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" }, ··· 1201 1137 {} 1202 1138 }; 1203 1139 1204 - static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { 1205 - { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, 1140 + static const struct rpm_regulator_data rpm_pma8084_regulators[] = { 1141 + { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" }, 1142 + { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" }, 1143 + { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, 1144 + { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, 1145 + { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" }, 1146 + { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" }, 1147 + { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" }, 1148 + { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" }, 1149 + { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" }, 1150 + { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" }, 1151 + { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" }, 1152 + { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" }, 1153 + 1154 + { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" }, 1155 + { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1156 + { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1157 + { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1158 + { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" }, 1159 + { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1160 + { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" }, 1161 + { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" }, 1162 + { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1163 + { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1164 + { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" }, 1165 + { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1166 + { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1167 + { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1168 + { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1169 + { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" }, 1170 + { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" }, 1171 + { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" }, 1172 + { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" }, 1173 + { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1174 + { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" }, 1175 + { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" }, 1176 + { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1177 + { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 1178 + { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" }, 1179 + { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 1180 + { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 1181 + 1182 + { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch }, 1183 + { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch }, 1184 + { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch }, 1185 + { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch }, 1186 + { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch }, 1187 + 1206 1188 {} 1207 1189 }; 1208 1190 1209 - static const struct rpm_regulator_data rpm_pm660_regulators[] = { 1210 - { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" }, 1211 - { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" }, 1212 - { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" }, 1213 - { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" }, 1214 - { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" }, 1215 - { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" }, 1216 - { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" }, 1217 - { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" }, 1218 - { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" }, 1219 - /* l4 is unaccessible on PM660 */ 1220 - { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" }, 1221 - { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 1222 - { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 1223 - { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1224 - { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1225 - { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1226 - { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1227 - { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1228 - { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1229 - { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1230 - { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1231 - { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1232 - { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1233 - { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1234 - { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1235 - { } 1191 + static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { 1192 + { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, 1193 + { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, 1194 + { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, 1195 + { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, 1196 + {} 1236 1197 }; 1237 1198 1238 - static const struct rpm_regulator_data rpm_pm660l_regulators[] = { 1239 - { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" }, 1240 - { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" }, 1241 - { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" }, 1242 - { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" }, 1243 - { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" }, 1244 - { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" }, 1245 - { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1246 - { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" }, 1247 - { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1248 - { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" }, 1249 - { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1250 - { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1251 - { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 1252 - { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 1253 - { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", }, 1254 - { } 1199 + static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { 1200 + { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, 1201 + {} 1255 1202 }; 1256 1203 1257 1204 static const struct rpm_regulator_data rpm_pms405_regulators[] = { ··· 1287 1212 {} 1288 1213 }; 1289 1214 1290 - static const struct rpm_regulator_data rpm_pm2250_regulators[] = { 1291 - { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" }, 1292 - { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" }, 1293 - { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" }, 1294 - { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" }, 1295 - { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1296 - { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1297 - { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1298 - { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1299 - { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1300 - { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1301 - { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1302 - { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1303 - { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1304 - { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1305 - { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1306 - { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1307 - { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1308 - { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1309 - { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1310 - { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1311 - { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1312 - { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1313 - { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1314 - { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1315 - { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1316 - { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1317 - {} 1318 - }; 1319 - 1320 1215 static const struct of_device_id rpm_of_match[] = { 1321 1216 { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators }, 1217 + { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators }, 1218 + { .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators }, 1219 + { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators }, 1220 + { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators }, 1221 + { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators }, 1322 1222 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators }, 1323 1223 { .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators }, 1324 1224 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators }, 1325 - { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators }, 1326 1225 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators }, 1327 1226 { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators }, 1328 1227 { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators }, 1329 1228 { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators }, 1330 1229 { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators }, 1331 - { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators }, 1332 - { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators }, 1333 1230 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators }, 1334 1231 { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, 1335 1232 { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators }, 1336 1233 { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators }, 1337 - { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators }, 1338 1234 {} 1339 1235 }; 1340 1236 MODULE_DEVICE_TABLE(of, rpm_of_match);
+281 -97
drivers/regulator/qcom_spmi-regulator.c
··· 99 99 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, 100 100 SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426, 101 101 SPMI_REGULATOR_LOGICAL_TYPE_HFS430, 102 + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3, 103 + SPMI_REGULATOR_LOGICAL_TYPE_LDO_510, 104 + SPMI_REGULATOR_LOGICAL_TYPE_HFSMPS, 102 105 }; 103 106 104 107 enum spmi_regulator_type { ··· 169 166 SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, 170 167 SPMI_REGULATOR_SUBTYPE_HT_P150 = 0x35, 171 168 SPMI_REGULATOR_SUBTYPE_HT_P600 = 0x3d, 169 + SPMI_REGULATOR_SUBTYPE_HFSMPS_510 = 0x0a, 170 + SPMI_REGULATOR_SUBTYPE_FTSMPS_510 = 0x0b, 171 + SPMI_REGULATOR_SUBTYPE_LV_P150_510 = 0x71, 172 + SPMI_REGULATOR_SUBTYPE_LV_P300_510 = 0x72, 173 + SPMI_REGULATOR_SUBTYPE_LV_P600_510 = 0x73, 174 + SPMI_REGULATOR_SUBTYPE_N300_510 = 0x6a, 175 + SPMI_REGULATOR_SUBTYPE_N600_510 = 0x6b, 176 + SPMI_REGULATOR_SUBTYPE_N1200_510 = 0x6c, 177 + SPMI_REGULATOR_SUBTYPE_MV_P50_510 = 0x7a, 178 + SPMI_REGULATOR_SUBTYPE_MV_P150_510 = 0x7b, 179 + SPMI_REGULATOR_SUBTYPE_MV_P600_510 = 0x7d, 172 180 }; 173 181 174 182 enum spmi_common_regulator_registers { ··· 205 191 SPMI_FTSMPS426_REG_VOLTAGE_MSB = 0x41, 206 192 SPMI_FTSMPS426_REG_VOLTAGE_ULS_LSB = 0x68, 207 193 SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB = 0x69, 194 + }; 195 + 196 + /* 197 + * Third common register layout 198 + */ 199 + enum spmi_hfsmps_regulator_registers { 200 + SPMI_HFSMPS_REG_STEP_CTRL = 0x3c, 201 + SPMI_HFSMPS_REG_PULL_DOWN = 0xa0, 208 202 }; 209 203 210 204 enum spmi_vs_registers { ··· 282 260 283 261 #define SPMI_FTSMPS426_MODE_MASK 0x07 284 262 263 + /* Third common regulator mode register values */ 264 + #define SPMI_HFSMPS_MODE_BYPASS_MASK 2 265 + #define SPMI_HFSMPS_MODE_RETENTION_MASK 3 266 + #define SPMI_HFSMPS_MODE_LPM_MASK 4 267 + #define SPMI_HFSMPS_MODE_AUTO_MASK 6 268 + #define SPMI_HFSMPS_MODE_HPM_MASK 7 269 + 270 + #define SPMI_HFSMPS_MODE_MASK 0x07 271 + 285 272 /* Common regulator pull down control register layout */ 286 273 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 287 274 ··· 335 304 */ 336 305 #define SPMI_FTSMPS_STEP_MARGIN_NUM 4 337 306 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5 307 + 308 + /* slew_rate has units of uV/us. */ 309 + #define SPMI_HFSMPS_SLEW_RATE_38p4 38400 338 310 339 311 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03 340 312 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT 0 ··· 588 554 SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000), 589 555 }; 590 556 557 + static struct spmi_voltage_range nldo_510_ranges[] = { 558 + SPMI_VOLTAGE_RANGE(0, 320000, 320000, 1304000, 1304000, 8000), 559 + }; 560 + 561 + static struct spmi_voltage_range ftsmps510_ranges[] = { 562 + SPMI_VOLTAGE_RANGE(0, 300000, 300000, 1372000, 1372000, 4000), 563 + }; 564 + 591 565 static DEFINE_SPMI_SET_POINTS(pldo); 592 566 static DEFINE_SPMI_SET_POINTS(nldo1); 593 567 static DEFINE_SPMI_SET_POINTS(nldo2); ··· 618 576 static DEFINE_SPMI_SET_POINTS(hfs430); 619 577 static DEFINE_SPMI_SET_POINTS(ht_p150); 620 578 static DEFINE_SPMI_SET_POINTS(ht_p600); 579 + static DEFINE_SPMI_SET_POINTS(nldo_510); 580 + static DEFINE_SPMI_SET_POINTS(ftsmps510); 621 581 622 582 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, 623 583 int len) ··· 1106 1062 } 1107 1063 } 1108 1064 1065 + static unsigned int spmi_regulator_hfsmps_get_mode(struct regulator_dev *rdev) 1066 + { 1067 + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1068 + u8 reg; 1069 + 1070 + spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1); 1071 + 1072 + switch (reg) { 1073 + case SPMI_HFSMPS_MODE_HPM_MASK: 1074 + return REGULATOR_MODE_NORMAL; 1075 + case SPMI_HFSMPS_MODE_AUTO_MASK: 1076 + return REGULATOR_MODE_FAST; 1077 + default: 1078 + return REGULATOR_MODE_IDLE; 1079 + } 1080 + } 1081 + 1109 1082 static int 1110 1083 spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) 1111 1084 { ··· 1170 1109 } 1171 1110 1172 1111 static int 1112 + spmi_regulator_hfsmps_set_mode(struct regulator_dev *rdev, unsigned int mode) 1113 + { 1114 + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1115 + u8 mask = SPMI_HFSMPS_MODE_MASK; 1116 + u8 val; 1117 + 1118 + switch (mode) { 1119 + case REGULATOR_MODE_NORMAL: 1120 + val = SPMI_HFSMPS_MODE_HPM_MASK; 1121 + break; 1122 + case REGULATOR_MODE_FAST: 1123 + val = SPMI_HFSMPS_MODE_AUTO_MASK; 1124 + break; 1125 + case REGULATOR_MODE_IDLE: 1126 + val = vreg->logical_type == 1127 + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3 ? 1128 + SPMI_HFSMPS_MODE_RETENTION_MASK : 1129 + SPMI_HFSMPS_MODE_LPM_MASK; 1130 + break; 1131 + default: 1132 + return -EINVAL; 1133 + } 1134 + 1135 + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 1136 + } 1137 + 1138 + static int 1173 1139 spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) 1174 1140 { 1175 1141 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); ··· 1216 1128 unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; 1217 1129 1218 1130 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN, 1131 + mask, mask); 1132 + } 1133 + 1134 + static int spmi_regulator_hfsmps_set_pull_down(struct regulator_dev *rdev) 1135 + { 1136 + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1137 + unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; 1138 + 1139 + return spmi_vreg_update_bits(vreg, SPMI_HFSMPS_REG_PULL_DOWN, 1219 1140 mask, mask); 1220 1141 } 1221 1142 ··· 1562 1465 .get_mode = spmi_regulator_ftsmps426_get_mode, 1563 1466 }; 1564 1467 1468 + static const struct regulator_ops spmi_hfsmps_ops = { 1469 + .enable = regulator_enable_regmap, 1470 + .disable = regulator_disable_regmap, 1471 + .is_enabled = regulator_is_enabled_regmap, 1472 + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, 1473 + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1474 + .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, 1475 + .map_voltage = spmi_regulator_single_map_voltage, 1476 + .list_voltage = spmi_regulator_common_list_voltage, 1477 + .set_mode = spmi_regulator_hfsmps_set_mode, 1478 + .get_mode = spmi_regulator_hfsmps_get_mode, 1479 + .set_load = spmi_regulator_common_set_load, 1480 + .set_pull_down = spmi_regulator_hfsmps_set_pull_down, 1481 + }; 1482 + 1565 1483 /* Maximum possible digital major revision value */ 1566 1484 #define INF 0xFF 1567 1485 ··· 1585 1473 SPMI_VREG(LDO, HT_P600, 0, INF, HFS430, hfs430, ht_p600, 10000), 1586 1474 SPMI_VREG(LDO, HT_P150, 0, INF, HFS430, hfs430, ht_p150, 10000), 1587 1475 SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), 1588 - SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), 1476 + SPMI_VREG(BUCK, HFS430, 0, 3, HFS430, hfs430, hfs430, 10000), 1477 + SPMI_VREG(BUCK, HFSMPS_510, 4, INF, HFSMPS, hfsmps, hfs430, 100000), 1589 1478 SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), 1590 1479 SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), 1591 1480 SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), ··· 1662 1549 SPMI_VREG(ULT_LDO, P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1663 1550 SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1664 1551 SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000), 1552 + SPMI_VREG(LDO, LV_P150_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000), 1553 + SPMI_VREG(LDO, LV_P300_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000), 1554 + SPMI_VREG(LDO, LV_P600_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000), 1555 + SPMI_VREG(LDO, MV_P50_510, 0, INF, LDO_510, hfsmps, pldo660, 10000), 1556 + SPMI_VREG(LDO, MV_P150_510, 0, INF, LDO_510, hfsmps, pldo660, 10000), 1557 + SPMI_VREG(LDO, MV_P600_510, 0, INF, LDO_510, hfsmps, pldo660, 10000), 1558 + SPMI_VREG(LDO, N300_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000), 1559 + SPMI_VREG(LDO, N600_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000), 1560 + SPMI_VREG(LDO, N1200_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000), 1561 + SPMI_VREG(FTS, FTSMPS_510, 0, INF, FTSMPS3, hfsmps, ftsmps510, 100000), 1665 1562 }; 1666 1563 1667 1564 static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points) ··· 1815 1692 1816 1693 /* Ensure that the slew rate is greater than 0 */ 1817 1694 vreg->slew_rate = max(slew_rate, 1); 1695 + 1696 + return ret; 1697 + } 1698 + 1699 + static int spmi_regulator_init_slew_rate_hfsmps(struct spmi_regulator *vreg) 1700 + { 1701 + int ret; 1702 + u8 reg = 0; 1703 + int delay; 1704 + 1705 + ret = spmi_vreg_read(vreg, SPMI_HFSMPS_REG_STEP_CTRL, &reg, 1); 1706 + if (ret) { 1707 + dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); 1708 + return ret; 1709 + } 1710 + 1711 + delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK; 1712 + delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT; 1713 + 1714 + vreg->slew_rate = SPMI_HFSMPS_SLEW_RATE_38p4 >> delay; 1818 1715 1819 1716 return ret; 1820 1717 } ··· 1989 1846 if (ret) 1990 1847 return ret; 1991 1848 break; 1849 + case SPMI_REGULATOR_LOGICAL_TYPE_HFSMPS: 1850 + case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3: 1851 + ret = spmi_regulator_init_slew_rate_hfsmps(vreg); 1852 + if (ret) 1853 + return ret; 1854 + break; 1992 1855 default: 1993 1856 break; 1994 1857 } ··· 2021 1872 return 0; 2022 1873 } 2023 1874 2024 - static const struct spmi_regulator_data pm8941_regulators[] = { 1875 + static const struct spmi_regulator_data pm6125_regulators[] = { 1876 + { "s1", 0x1400, "vdd_s1" }, 1877 + { "s2", 0x1700, "vdd_s2" }, 1878 + { "s3", 0x1a00, "vdd_s3" }, 1879 + { "s4", 0x1d00, "vdd_s4" }, 1880 + { "s5", 0x2000, "vdd_s5" }, 1881 + { "s6", 0x2300, "vdd_s6" }, 1882 + { "s7", 0x2600, "vdd_s7" }, 1883 + { "s8", 0x2900, "vdd_s8" }, 1884 + { "l1", 0x4000, "vdd_l1_l7_l17_l18" }, 1885 + { "l2", 0x4100, "vdd_l2_l3_l4" }, 1886 + { "l3", 0x4200, "vdd_l2_l3_l4" }, 1887 + { "l4", 0x4300, "vdd_l2_l3_l4" }, 1888 + { "l5", 0x4400, "vdd_l5_l15_l19_l20_l21_l22" }, 1889 + { "l6", 0x4500, "vdd_l6_l8" }, 1890 + { "l7", 0x4600, "vdd_l1_l7_l17_l18" }, 1891 + { "l8", 0x4700, "vdd_l6_l8" }, 1892 + { "l9", 0x4800, "vdd_l9_l11" }, 1893 + { "l10", 0x4900, "vdd_l10_l13_l14" }, 1894 + { "l11", 0x4a00, "vdd_l9_l11" }, 1895 + { "l12", 0x4b00, "vdd_l12_l16" }, 1896 + { "l13", 0x4c00, "vdd_l10_l13_l14" }, 1897 + { "l14", 0x4d00, "vdd_l10_l13_l14" }, 1898 + { "l15", 0x4e00, "vdd_l5_l15_l19_l20_l21_l22" }, 1899 + { "l16", 0x4f00, "vdd_l12_l16" }, 1900 + { "l17", 0x5000, "vdd_l1_l7_l17_l18" }, 1901 + { "l18", 0x5100, "vdd_l1_l7_l17_l18" }, 1902 + { "l19", 0x5200, "vdd_l5_l15_l19_l20_l21_l22" }, 1903 + { "l20", 0x5300, "vdd_l5_l15_l19_l20_l21_l22" }, 1904 + { "l21", 0x5400, "vdd_l5_l15_l19_l20_l21_l22" }, 1905 + { "l22", 0x5500, "vdd_l5_l15_l19_l20_l21_l22" }, 1906 + { "l23", 0x5600, "vdd_l23_l24" }, 1907 + { "l24", 0x5700, "vdd_l23_l24" }, 1908 + }; 1909 + 1910 + static const struct spmi_regulator_data pm660_regulators[] = { 2025 1911 { "s1", 0x1400, "vdd_s1", }, 2026 1912 { "s2", 0x1700, "vdd_s2", }, 2027 1913 { "s3", 0x1a00, "vdd_s3", }, 2028 - { "s4", 0xa000, }, 2029 - { "l1", 0x4000, "vdd_l1_l3", }, 2030 - { "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, 2031 - { "l3", 0x4200, "vdd_l1_l3", }, 2032 - { "l4", 0x4300, "vdd_l4_l11", }, 2033 - { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, 2034 - { "l6", 0x4500, "vdd_l6_l12_l14_l15", }, 2035 - { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, 2036 - { "l8", 0x4700, "vdd_l8_l16_l18_19", }, 2037 - { "l9", 0x4800, "vdd_l9_l10_l17_l22", }, 2038 - { "l10", 0x4900, "vdd_l9_l10_l17_l22", }, 2039 - { "l11", 0x4a00, "vdd_l4_l11", }, 2040 - { "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, 2041 - { "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, 2042 - { "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, 2043 - { "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, 2044 - { "l16", 0x4f00, "vdd_l8_l16_l18_19", }, 2045 - { "l17", 0x5000, "vdd_l9_l10_l17_l22", }, 2046 - { "l18", 0x5100, "vdd_l8_l16_l18_19", }, 2047 - { "l19", 0x5200, "vdd_l8_l16_l18_19", }, 2048 - { "l20", 0x5300, "vdd_l13_l20_l23_l24", }, 2049 - { "l21", 0x5400, "vdd_l21", }, 2050 - { "l22", 0x5500, "vdd_l9_l10_l17_l22", }, 2051 - { "l23", 0x5600, "vdd_l13_l20_l23_l24", }, 2052 - { "l24", 0x5700, "vdd_l13_l20_l23_l24", }, 2053 - { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, 2054 - { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, 2055 - { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, 2056 - { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", }, 2057 - { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", }, 1914 + { "s4", 0x1d00, "vdd_s3", }, 1915 + { "s5", 0x2000, "vdd_s5", }, 1916 + { "s6", 0x2300, "vdd_s6", }, 1917 + { "l1", 0x4000, "vdd_l1_l6_l7", }, 1918 + { "l2", 0x4100, "vdd_l2_l3", }, 1919 + { "l3", 0x4200, "vdd_l2_l3", }, 1920 + /* l4 is unaccessible on PM660 */ 1921 + { "l5", 0x4400, "vdd_l5", }, 1922 + { "l6", 0x4500, "vdd_l1_l6_l7", }, 1923 + { "l7", 0x4600, "vdd_l1_l6_l7", }, 1924 + { "l8", 0x4700, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 1925 + { "l9", 0x4800, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 1926 + { "l10", 0x4900, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 1927 + { "l11", 0x4a00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 1928 + { "l12", 0x4b00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 1929 + { "l13", 0x4c00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 1930 + { "l14", 0x4d00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 1931 + { "l15", 0x4e00, "vdd_l15_l16_l17_l18_l19", }, 1932 + { "l16", 0x4f00, "vdd_l15_l16_l17_l18_l19", }, 1933 + { "l17", 0x5000, "vdd_l15_l16_l17_l18_l19", }, 1934 + { "l18", 0x5100, "vdd_l15_l16_l17_l18_l19", }, 1935 + { "l19", 0x5200, "vdd_l15_l16_l17_l18_l19", }, 1936 + { } 1937 + }; 1938 + 1939 + static const struct spmi_regulator_data pm660l_regulators[] = { 1940 + { "s1", 0x1400, "vdd_s1", }, 1941 + { "s2", 0x1700, "vdd_s2", }, 1942 + { "s3", 0x1a00, "vdd_s3", }, 1943 + { "s4", 0x1d00, "vdd_s4", }, 1944 + { "s5", 0x2000, "vdd_s5", }, 1945 + { "l1", 0x4000, "vdd_l1_l9_l10", }, 1946 + { "l2", 0x4100, "vdd_l2", }, 1947 + { "l3", 0x4200, "vdd_l3_l5_l7_l8", }, 1948 + { "l4", 0x4300, "vdd_l4_l6", }, 1949 + { "l5", 0x4400, "vdd_l3_l5_l7_l8", }, 1950 + { "l6", 0x4500, "vdd_l4_l6", }, 1951 + { "l7", 0x4600, "vdd_l3_l5_l7_l8", }, 1952 + { "l8", 0x4700, "vdd_l3_l5_l7_l8", }, 1953 + { "l9", 0x4800, "vdd_l1_l9_l10", }, 1954 + { "l10", 0x4900, "vdd_l1_l9_l10", }, 1955 + { } 1956 + }; 1957 + 1958 + static const struct spmi_regulator_data pm8004_regulators[] = { 1959 + { "s2", 0x1700, "vdd_s2", }, 1960 + { "s5", 0x2000, "vdd_s5", }, 1961 + { } 1962 + }; 1963 + 1964 + static const struct spmi_regulator_data pm8005_regulators[] = { 1965 + { "s1", 0x1400, "vdd_s1", }, 1966 + { "s2", 0x1700, "vdd_s2", }, 1967 + { "s3", 0x1a00, "vdd_s3", }, 1968 + { "s4", 0x1d00, "vdd_s4", }, 2058 1969 { } 2059 1970 }; 2060 1971 ··· 2191 1982 { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", }, 2192 1983 { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", }, 2193 1984 { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", }, 1985 + { } 1986 + }; 1987 + 1988 + static const struct spmi_regulator_data pm8941_regulators[] = { 1989 + { "s1", 0x1400, "vdd_s1", }, 1990 + { "s2", 0x1700, "vdd_s2", }, 1991 + { "s3", 0x1a00, "vdd_s3", }, 1992 + { "s4", 0xa000, }, 1993 + { "l1", 0x4000, "vdd_l1_l3", }, 1994 + { "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, 1995 + { "l3", 0x4200, "vdd_l1_l3", }, 1996 + { "l4", 0x4300, "vdd_l4_l11", }, 1997 + { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, 1998 + { "l6", 0x4500, "vdd_l6_l12_l14_l15", }, 1999 + { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, 2000 + { "l8", 0x4700, "vdd_l8_l16_l18_19", }, 2001 + { "l9", 0x4800, "vdd_l9_l10_l17_l22", }, 2002 + { "l10", 0x4900, "vdd_l9_l10_l17_l22", }, 2003 + { "l11", 0x4a00, "vdd_l4_l11", }, 2004 + { "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, 2005 + { "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, 2006 + { "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, 2007 + { "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, 2008 + { "l16", 0x4f00, "vdd_l8_l16_l18_19", }, 2009 + { "l17", 0x5000, "vdd_l9_l10_l17_l22", }, 2010 + { "l18", 0x5100, "vdd_l8_l16_l18_19", }, 2011 + { "l19", 0x5200, "vdd_l8_l16_l18_19", }, 2012 + { "l20", 0x5300, "vdd_l13_l20_l23_l24", }, 2013 + { "l21", 0x5400, "vdd_l21", }, 2014 + { "l22", 0x5500, "vdd_l9_l10_l17_l22", }, 2015 + { "l23", 0x5600, "vdd_l13_l20_l23_l24", }, 2016 + { "l24", 0x5700, "vdd_l13_l20_l23_l24", }, 2017 + { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, 2018 + { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, 2019 + { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, 2020 + { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", }, 2021 + { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", }, 2194 2022 { } 2195 2023 }; 2196 2024 ··· 2322 2076 { } 2323 2077 }; 2324 2078 2325 - static const struct spmi_regulator_data pm660_regulators[] = { 2326 - { "s1", 0x1400, "vdd_s1", }, 2327 - { "s2", 0x1700, "vdd_s2", }, 2328 - { "s3", 0x1a00, "vdd_s3", }, 2329 - { "s4", 0x1d00, "vdd_s3", }, 2330 - { "s5", 0x2000, "vdd_s5", }, 2331 - { "s6", 0x2300, "vdd_s6", }, 2332 - { "l1", 0x4000, "vdd_l1_l6_l7", }, 2333 - { "l2", 0x4100, "vdd_l2_l3", }, 2334 - { "l3", 0x4200, "vdd_l2_l3", }, 2335 - /* l4 is unaccessible on PM660 */ 2336 - { "l5", 0x4400, "vdd_l5", }, 2337 - { "l6", 0x4500, "vdd_l1_l6_l7", }, 2338 - { "l7", 0x4600, "vdd_l1_l6_l7", }, 2339 - { "l8", 0x4700, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 2340 - { "l9", 0x4800, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 2341 - { "l10", 0x4900, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 2342 - { "l11", 0x4a00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 2343 - { "l12", 0x4b00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 2344 - { "l13", 0x4c00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 2345 - { "l14", 0x4d00, "vdd_l8_l9_l10_l11_l12_l13_l14", }, 2346 - { "l15", 0x4e00, "vdd_l15_l16_l17_l18_l19", }, 2347 - { "l16", 0x4f00, "vdd_l15_l16_l17_l18_l19", }, 2348 - { "l17", 0x5000, "vdd_l15_l16_l17_l18_l19", }, 2349 - { "l18", 0x5100, "vdd_l15_l16_l17_l18_l19", }, 2350 - { "l19", 0x5200, "vdd_l15_l16_l17_l18_l19", }, 2351 - { } 2352 - }; 2353 - 2354 - static const struct spmi_regulator_data pm660l_regulators[] = { 2355 - { "s1", 0x1400, "vdd_s1", }, 2356 - { "s2", 0x1700, "vdd_s2", }, 2357 - { "s3", 0x1a00, "vdd_s3", }, 2358 - { "s4", 0x1d00, "vdd_s4", }, 2359 - { "s5", 0x2000, "vdd_s5", }, 2360 - { "l1", 0x4000, "vdd_l1_l9_l10", }, 2361 - { "l2", 0x4100, "vdd_l2", }, 2362 - { "l3", 0x4200, "vdd_l3_l5_l7_l8", }, 2363 - { "l4", 0x4300, "vdd_l4_l6", }, 2364 - { "l5", 0x4400, "vdd_l3_l5_l7_l8", }, 2365 - { "l6", 0x4500, "vdd_l4_l6", }, 2366 - { "l7", 0x4600, "vdd_l3_l5_l7_l8", }, 2367 - { "l8", 0x4700, "vdd_l3_l5_l7_l8", }, 2368 - { "l9", 0x4800, "vdd_l1_l9_l10", }, 2369 - { "l10", 0x4900, "vdd_l1_l9_l10", }, 2370 - { } 2371 - }; 2372 - 2373 - 2374 - static const struct spmi_regulator_data pm8004_regulators[] = { 2375 - { "s2", 0x1700, "vdd_s2", }, 2376 - { "s5", 0x2000, "vdd_s5", }, 2377 - { } 2378 - }; 2379 - 2380 - static const struct spmi_regulator_data pm8005_regulators[] = { 2381 - { "s1", 0x1400, "vdd_s1", }, 2382 - { "s2", 0x1700, "vdd_s2", }, 2383 - { "s3", 0x1a00, "vdd_s3", }, 2384 - { "s4", 0x1d00, "vdd_s4", }, 2385 - { } 2386 - }; 2387 - 2388 2079 static const struct spmi_regulator_data pmp8074_regulators[] = { 2389 2080 { "s1", 0x1400, "vdd_s1"}, 2390 2081 { "s2", 0x1700, "vdd_s2"}, ··· 2350 2167 }; 2351 2168 2352 2169 static const struct of_device_id qcom_spmi_regulator_match[] = { 2170 + { .compatible = "qcom,pm6125-regulators", .data = &pm6125_regulators }, 2171 + { .compatible = "qcom,pm660-regulators", .data = &pm660_regulators }, 2172 + { .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators }, 2353 2173 { .compatible = "qcom,pm8004-regulators", .data = &pm8004_regulators }, 2354 2174 { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, 2355 2175 { .compatible = "qcom,pm8226-regulators", .data = &pm8226_regulators }, ··· 2362 2176 { .compatible = "qcom,pm8950-regulators", .data = &pm8950_regulators }, 2363 2177 { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators }, 2364 2178 { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, 2365 - { .compatible = "qcom,pm660-regulators", .data = &pm660_regulators }, 2366 - { .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators }, 2367 2179 { .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators }, 2368 2180 { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, 2369 2181 { }
+1 -1
drivers/regulator/ti-abb-regulator.c
··· 151 151 }; 152 152 153 153 /** 154 - * ti_abb_wait_tranx() - waits for ABB tranxdone event 154 + * ti_abb_wait_txdone() - waits for ABB tranxdone event 155 155 * @dev: device 156 156 * @abb: pointer to the abb instance 157 157 *
+411
drivers/regulator/tps65219-regulator.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // 3 + // tps65219-regulator.c 4 + // 5 + // Regulator driver for TPS65219 PMIC 6 + // 7 + // Copyright (C) 2022 BayLibre Incorporated - https://www.baylibre.com/ 8 + // 9 + // This implementation derived from tps65218 authored by 10 + // "J Keerthy <j-keerthy@ti.com>" 11 + // 12 + 13 + #include <linux/kernel.h> 14 + #include <linux/module.h> 15 + #include <linux/device.h> 16 + #include <linux/init.h> 17 + #include <linux/err.h> 18 + #include <linux/platform_device.h> 19 + #include <linux/of_device.h> 20 + #include <linux/regmap.h> 21 + #include <linux/regulator/of_regulator.h> 22 + #include <linux/regulator/driver.h> 23 + #include <linux/regulator/machine.h> 24 + #include <linux/mfd/tps65219.h> 25 + 26 + struct tps65219_regulator_irq_type { 27 + const char *irq_name; 28 + const char *regulator_name; 29 + const char *event_name; 30 + unsigned long event; 31 + }; 32 + 33 + static struct tps65219_regulator_irq_type tps65219_regulator_irq_types[] = { 34 + { "LDO3_SCG", "LDO3", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, 35 + { "LDO3_OC", "LDO3", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 36 + { "LDO3_UV", "LDO3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, 37 + { "LDO4_SCG", "LDO4", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, 38 + { "LDO4_OC", "LDO4", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 39 + { "LDO4_UV", "LDO4", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, 40 + { "LDO1_SCG", "LDO1", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, 41 + { "LDO1_OC", "LDO1", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 42 + { "LDO1_UV", "LDO1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, 43 + { "LDO2_SCG", "LDO2", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, 44 + { "LDO2_OC", "LDO2", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 45 + { "LDO2_UV", "LDO2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, 46 + { "BUCK3_SCG", "BUCK3", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, 47 + { "BUCK3_OC", "BUCK3", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 48 + { "BUCK3_NEG_OC", "BUCK3", "negative overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 49 + { "BUCK3_UV", "BUCK3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, 50 + { "BUCK1_SCG", "BUCK1", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, 51 + { "BUCK1_OC", "BUCK1", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 52 + { "BUCK1_NEG_OC", "BUCK1", "negative overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 53 + { "BUCK1_UV", "BUCK1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, 54 + { "BUCK2_SCG", "BUCK2", "short circuit to ground", REGULATOR_EVENT_REGULATION_OUT }, 55 + { "BUCK2_OC", "BUCK2", "overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 56 + { "BUCK2_NEG_OC", "BUCK2", "negative overcurrent", REGULATOR_EVENT_OVER_CURRENT }, 57 + { "BUCK2_UV", "BUCK2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE }, 58 + { "BUCK1_RV", "BUCK1", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 59 + { "BUCK2_RV", "BUCK2", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 60 + { "BUCK3_RV", "BUCK3", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 61 + { "LDO1_RV", "LDO1", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 62 + { "LDO2_RV", "LDO2", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 63 + { "LDO3_RV", "LDO3", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 64 + { "LDO4_RV", "LDO4", "residual voltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 65 + { "BUCK1_RV_SD", "BUCK1", "residual voltage on shutdown", 66 + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 67 + { "BUCK2_RV_SD", "BUCK2", "residual voltage on shutdown", 68 + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 69 + { "BUCK3_RV_SD", "BUCK3", "residual voltage on shutdown", 70 + REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 71 + { "LDO1_RV_SD", "LDO1", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 72 + { "LDO2_RV_SD", "LDO2", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 73 + { "LDO3_RV_SD", "LDO3", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 74 + { "LDO4_RV_SD", "LDO4", "residual voltage on shutdown", REGULATOR_EVENT_OVER_VOLTAGE_WARN }, 75 + { "SENSOR_3_WARM", "SENSOR3", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN}, 76 + { "SENSOR_2_WARM", "SENSOR2", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN }, 77 + { "SENSOR_1_WARM", "SENSOR1", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN }, 78 + { "SENSOR_0_WARM", "SENSOR0", "warm temperature", REGULATOR_EVENT_OVER_TEMP_WARN }, 79 + { "SENSOR_3_HOT", "SENSOR3", "hot temperature", REGULATOR_EVENT_OVER_TEMP}, 80 + { "SENSOR_2_HOT", "SENSOR2", "hot temperature", REGULATOR_EVENT_OVER_TEMP }, 81 + { "SENSOR_1_HOT", "SENSOR1", "hot temperature", REGULATOR_EVENT_OVER_TEMP }, 82 + { "SENSOR_0_HOT", "SENSOR0", "hot temperature", REGULATOR_EVENT_OVER_TEMP }, 83 + { "TIMEOUT", "", "", REGULATOR_EVENT_ABORT_VOLTAGE_CHANGE }, 84 + }; 85 + 86 + struct tps65219_regulator_irq_data { 87 + struct device *dev; 88 + struct tps65219_regulator_irq_type *type; 89 + struct regulator_dev *rdev; 90 + }; 91 + 92 + #define TPS65219_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \ 93 + _em, _cr, _cm, _lr, _nlr, _delay, _fuv, \ 94 + _ct, _ncl, _bpm) \ 95 + { \ 96 + .name = _name, \ 97 + .of_match = _of, \ 98 + .regulators_node = of_match_ptr("regulators"), \ 99 + .supply_name = _of, \ 100 + .id = _id, \ 101 + .ops = &(_ops), \ 102 + .n_voltages = _n, \ 103 + .type = _type, \ 104 + .owner = THIS_MODULE, \ 105 + .vsel_reg = _vr, \ 106 + .vsel_mask = _vm, \ 107 + .csel_reg = _cr, \ 108 + .csel_mask = _cm, \ 109 + .curr_table = _ct, \ 110 + .n_current_limits = _ncl, \ 111 + .enable_reg = _er, \ 112 + .enable_mask = _em, \ 113 + .volt_table = NULL, \ 114 + .linear_ranges = _lr, \ 115 + .n_linear_ranges = _nlr, \ 116 + .ramp_delay = _delay, \ 117 + .fixed_uV = _fuv, \ 118 + .bypass_reg = _vr, \ 119 + .bypass_mask = _bpm, \ 120 + } \ 121 + 122 + static const struct linear_range bucks_ranges[] = { 123 + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x1f, 25000), 124 + REGULATOR_LINEAR_RANGE(1400000, 0x20, 0x33, 100000), 125 + REGULATOR_LINEAR_RANGE(3400000, 0x34, 0x3f, 0), 126 + }; 127 + 128 + static const struct linear_range ldos_1_2_ranges[] = { 129 + REGULATOR_LINEAR_RANGE(600000, 0x0, 0x37, 50000), 130 + REGULATOR_LINEAR_RANGE(3400000, 0x38, 0x3f, 0), 131 + }; 132 + 133 + static const struct linear_range ldos_3_4_ranges[] = { 134 + REGULATOR_LINEAR_RANGE(1200000, 0x0, 0xC, 0), 135 + REGULATOR_LINEAR_RANGE(1250000, 0xD, 0x35, 50000), 136 + REGULATOR_LINEAR_RANGE(3300000, 0x36, 0x3F, 0), 137 + }; 138 + 139 + static int tps65219_set_mode(struct regulator_dev *dev, unsigned int mode) 140 + { 141 + struct tps65219 *tps = rdev_get_drvdata(dev); 142 + 143 + switch (mode) { 144 + case REGULATOR_MODE_NORMAL: 145 + return regmap_set_bits(tps->regmap, TPS65219_REG_STBY_1_CONFIG, 146 + dev->desc->enable_mask); 147 + 148 + case REGULATOR_MODE_STANDBY: 149 + return regmap_clear_bits(tps->regmap, 150 + TPS65219_REG_STBY_1_CONFIG, 151 + dev->desc->enable_mask); 152 + default: 153 + return -EINVAL; 154 + } 155 + } 156 + 157 + static unsigned int tps65219_get_mode(struct regulator_dev *dev) 158 + { 159 + struct tps65219 *tps = rdev_get_drvdata(dev); 160 + unsigned int rid = rdev_get_id(dev); 161 + int ret, value = 0; 162 + 163 + ret = regmap_read(tps->regmap, TPS65219_REG_STBY_1_CONFIG, &value); 164 + if (ret) { 165 + dev_dbg(tps->dev, "%s failed for regulator %s: %d ", 166 + __func__, dev->desc->name, ret); 167 + return ret; 168 + } 169 + value = (value & BIT(rid)) >> rid; 170 + if (value) 171 + return REGULATOR_MODE_STANDBY; 172 + else 173 + return REGULATOR_MODE_NORMAL; 174 + } 175 + 176 + /* 177 + * generic regulator_set_bypass_regmap does not fully match requirements 178 + * TPS65219 Requires explicitly that regulator is disabled before switch 179 + */ 180 + static int tps65219_set_bypass(struct regulator_dev *dev, bool enable) 181 + { 182 + struct tps65219 *tps = rdev_get_drvdata(dev); 183 + unsigned int rid = rdev_get_id(dev); 184 + 185 + if (dev->desc->ops->is_enabled(dev)) { 186 + dev_err(tps->dev, 187 + "%s LDO%d enabled, must be shut down to set bypass ", 188 + __func__, rid); 189 + return -EBUSY; 190 + } 191 + return regulator_set_bypass_regmap(dev, enable); 192 + } 193 + 194 + /* Operations permitted on BUCK1/2/3 */ 195 + static const struct regulator_ops tps65219_bucks_ops = { 196 + .is_enabled = regulator_is_enabled_regmap, 197 + .enable = regulator_enable_regmap, 198 + .disable = regulator_disable_regmap, 199 + .set_mode = tps65219_set_mode, 200 + .get_mode = tps65219_get_mode, 201 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 202 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 203 + .list_voltage = regulator_list_voltage_linear_range, 204 + .map_voltage = regulator_map_voltage_linear_range, 205 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 206 + 207 + }; 208 + 209 + /* Operations permitted on LDO1/2 */ 210 + static const struct regulator_ops tps65219_ldos_1_2_ops = { 211 + .is_enabled = regulator_is_enabled_regmap, 212 + .enable = regulator_enable_regmap, 213 + .disable = regulator_disable_regmap, 214 + .set_mode = tps65219_set_mode, 215 + .get_mode = tps65219_get_mode, 216 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 217 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 218 + .list_voltage = regulator_list_voltage_linear_range, 219 + .map_voltage = regulator_map_voltage_linear_range, 220 + .set_bypass = tps65219_set_bypass, 221 + .get_bypass = regulator_get_bypass_regmap, 222 + }; 223 + 224 + /* Operations permitted on LDO3/4 */ 225 + static const struct regulator_ops tps65219_ldos_3_4_ops = { 226 + .is_enabled = regulator_is_enabled_regmap, 227 + .enable = regulator_enable_regmap, 228 + .disable = regulator_disable_regmap, 229 + .set_mode = tps65219_set_mode, 230 + .get_mode = tps65219_get_mode, 231 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 232 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 233 + .list_voltage = regulator_list_voltage_linear_range, 234 + .map_voltage = regulator_map_voltage_linear_range, 235 + }; 236 + 237 + static const struct regulator_desc regulators[] = { 238 + TPS65219_REGULATOR("BUCK1", "buck1", TPS65219_BUCK_1, 239 + REGULATOR_VOLTAGE, tps65219_bucks_ops, 64, 240 + TPS65219_REG_BUCK1_VOUT, 241 + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, 242 + TPS65219_REG_ENABLE_CTRL, 243 + TPS65219_ENABLE_BUCK1_EN_MASK, 0, 0, bucks_ranges, 244 + 3, 4000, 0, NULL, 0, 0), 245 + TPS65219_REGULATOR("BUCK2", "buck2", TPS65219_BUCK_2, 246 + REGULATOR_VOLTAGE, tps65219_bucks_ops, 64, 247 + TPS65219_REG_BUCK2_VOUT, 248 + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, 249 + TPS65219_REG_ENABLE_CTRL, 250 + TPS65219_ENABLE_BUCK2_EN_MASK, 0, 0, bucks_ranges, 251 + 3, 4000, 0, NULL, 0, 0), 252 + TPS65219_REGULATOR("BUCK3", "buck3", TPS65219_BUCK_3, 253 + REGULATOR_VOLTAGE, tps65219_bucks_ops, 64, 254 + TPS65219_REG_BUCK3_VOUT, 255 + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, 256 + TPS65219_REG_ENABLE_CTRL, 257 + TPS65219_ENABLE_BUCK3_EN_MASK, 0, 0, bucks_ranges, 258 + 3, 0, 0, NULL, 0, 0), 259 + TPS65219_REGULATOR("LDO1", "ldo1", TPS65219_LDO_1, 260 + REGULATOR_VOLTAGE, tps65219_ldos_1_2_ops, 64, 261 + TPS65219_REG_LDO1_VOUT, 262 + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, 263 + TPS65219_REG_ENABLE_CTRL, 264 + TPS65219_ENABLE_LDO1_EN_MASK, 0, 0, ldos_1_2_ranges, 265 + 2, 0, 0, NULL, 0, TPS65219_LDOS_BYP_CONFIG_MASK), 266 + TPS65219_REGULATOR("LDO2", "ldo2", TPS65219_LDO_2, 267 + REGULATOR_VOLTAGE, tps65219_ldos_1_2_ops, 64, 268 + TPS65219_REG_LDO2_VOUT, 269 + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, 270 + TPS65219_REG_ENABLE_CTRL, 271 + TPS65219_ENABLE_LDO2_EN_MASK, 0, 0, ldos_1_2_ranges, 272 + 2, 0, 0, NULL, 0, TPS65219_LDOS_BYP_CONFIG_MASK), 273 + TPS65219_REGULATOR("LDO3", "ldo3", TPS65219_LDO_3, 274 + REGULATOR_VOLTAGE, tps65219_ldos_3_4_ops, 64, 275 + TPS65219_REG_LDO3_VOUT, 276 + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, 277 + TPS65219_REG_ENABLE_CTRL, 278 + TPS65219_ENABLE_LDO3_EN_MASK, 0, 0, ldos_3_4_ranges, 279 + 3, 0, 0, NULL, 0, 0), 280 + TPS65219_REGULATOR("LDO4", "ldo4", TPS65219_LDO_4, 281 + REGULATOR_VOLTAGE, tps65219_ldos_3_4_ops, 64, 282 + TPS65219_REG_LDO4_VOUT, 283 + TPS65219_BUCKS_LDOS_VOUT_VSET_MASK, 284 + TPS65219_REG_ENABLE_CTRL, 285 + TPS65219_ENABLE_LDO4_EN_MASK, 0, 0, ldos_3_4_ranges, 286 + 3, 0, 0, NULL, 0, 0), 287 + }; 288 + 289 + static irqreturn_t tps65219_regulator_irq_handler(int irq, void *data) 290 + { 291 + struct tps65219_regulator_irq_data *irq_data = data; 292 + 293 + if (irq_data->type->event_name[0] == '\0') { 294 + /* This is the timeout interrupt no specific regulator */ 295 + dev_err(irq_data->dev, 296 + "System was put in shutdown due to timeout during an active or standby transition.\n"); 297 + return IRQ_HANDLED; 298 + } 299 + 300 + regulator_notifier_call_chain(irq_data->rdev, 301 + irq_data->type->event, NULL); 302 + 303 + dev_err(irq_data->dev, "Error IRQ trap %s for %s\n", 304 + irq_data->type->event_name, irq_data->type->regulator_name); 305 + return IRQ_HANDLED; 306 + } 307 + 308 + static int tps65219_get_rdev_by_name(const char *regulator_name, 309 + struct regulator_dev *rdevtbl[7], 310 + struct regulator_dev *dev) 311 + { 312 + int i; 313 + 314 + for (i = 0; i < ARRAY_SIZE(regulators); i++) { 315 + if (strcmp(regulator_name, regulators[i].name) == 0) { 316 + dev = rdevtbl[i]; 317 + return 0; 318 + } 319 + } 320 + return -EINVAL; 321 + } 322 + 323 + static int tps65219_regulator_probe(struct platform_device *pdev) 324 + { 325 + struct tps65219 *tps = dev_get_drvdata(pdev->dev.parent); 326 + struct regulator_dev *rdev; 327 + struct regulator_config config = { }; 328 + int i; 329 + int error; 330 + int irq; 331 + struct tps65219_regulator_irq_data *irq_data; 332 + struct tps65219_regulator_irq_type *irq_type; 333 + struct regulator_dev *rdevtbl[7]; 334 + 335 + config.dev = tps->dev; 336 + config.driver_data = tps; 337 + config.regmap = tps->regmap; 338 + 339 + for (i = 0; i < ARRAY_SIZE(regulators); i++) { 340 + dev_dbg(tps->dev, "%s regul i= %d START", __func__, i); 341 + rdev = devm_regulator_register(&pdev->dev, &regulators[i], 342 + &config); 343 + if (IS_ERR(rdev)) { 344 + dev_err(tps->dev, "failed to register %s regulator\n", 345 + pdev->name); 346 + return PTR_ERR(rdev); 347 + } 348 + rdevtbl[i] = rdev; 349 + dev_dbg(tps->dev, "%s regul i= %d COMPLETED", __func__, i); 350 + } 351 + 352 + irq_data = devm_kmalloc(tps->dev, 353 + ARRAY_SIZE(tps65219_regulator_irq_types) * 354 + sizeof(struct tps65219_regulator_irq_data), 355 + GFP_KERNEL); 356 + if (!irq_data) 357 + return -ENOMEM; 358 + 359 + for (i = 0; i < ARRAY_SIZE(tps65219_regulator_irq_types); ++i) { 360 + irq_type = &tps65219_regulator_irq_types[i]; 361 + 362 + irq = platform_get_irq_byname(pdev, irq_type->irq_name); 363 + if (irq < 0) 364 + return -EINVAL; 365 + 366 + irq_data[i].dev = tps->dev; 367 + irq_data[i].type = irq_type; 368 + 369 + tps65219_get_rdev_by_name(irq_type->regulator_name, rdevtbl, rdev); 370 + if (rdev < 0) { 371 + dev_err(tps->dev, "Failed to get rdev for %s\n", 372 + irq_type->regulator_name); 373 + return -EINVAL; 374 + } 375 + irq_data[i].rdev = rdev; 376 + 377 + error = devm_request_threaded_irq(tps->dev, irq, NULL, 378 + tps65219_regulator_irq_handler, 379 + IRQF_ONESHOT, 380 + irq_type->irq_name, 381 + &irq_data[i]); 382 + if (error) { 383 + dev_err(tps->dev, "failed to request %s IRQ %d: %d\n", 384 + irq_type->irq_name, irq, error); 385 + return error; 386 + } 387 + } 388 + 389 + return 0; 390 + } 391 + 392 + static const struct platform_device_id tps65219_regulator_id_table[] = { 393 + { "tps65219-regulator", }, 394 + { /* sentinel */ } 395 + }; 396 + MODULE_DEVICE_TABLE(platform, tps65219_regulator_id_table); 397 + 398 + static struct platform_driver tps65219_regulator_driver = { 399 + .driver = { 400 + .name = "tps65219-pmic", 401 + }, 402 + .probe = tps65219_regulator_probe, 403 + .id_table = tps65219_regulator_id_table, 404 + }; 405 + 406 + module_platform_driver(tps65219_regulator_driver); 407 + 408 + MODULE_AUTHOR("Jerome Neanne <j-neanne@baylibre.com>"); 409 + MODULE_DESCRIPTION("TPS65219 voltage regulator driver"); 410 + MODULE_ALIAS("platform:tps65219-pmic"); 411 + MODULE_LICENSE("GPL");
+27
include/linux/regulator/consumer.h
··· 207 207 const char *id); 208 208 struct regulator *__must_check devm_regulator_get_optional(struct device *dev, 209 209 const char *id); 210 + int devm_regulator_get_enable(struct device *dev, const char *id); 211 + int devm_regulator_get_enable_optional(struct device *dev, const char *id); 210 212 void regulator_put(struct regulator *regulator); 211 213 void devm_regulator_put(struct regulator *regulator); 212 214 ··· 246 244 struct regulator_bulk_data *consumers); 247 245 int __must_check devm_regulator_bulk_get(struct device *dev, int num_consumers, 248 246 struct regulator_bulk_data *consumers); 247 + void devm_regulator_bulk_put(struct regulator_bulk_data *consumers); 249 248 int __must_check devm_regulator_bulk_get_const( 250 249 struct device *dev, int num_consumers, 251 250 const struct regulator_bulk_data *in_consumers, 252 251 struct regulator_bulk_data **out_consumers); 253 252 int __must_check regulator_bulk_enable(int num_consumers, 254 253 struct regulator_bulk_data *consumers); 254 + int devm_regulator_bulk_get_enable(struct device *dev, int num_consumers, 255 + const char * const *id); 255 256 int regulator_bulk_disable(int num_consumers, 256 257 struct regulator_bulk_data *consumers); 257 258 int regulator_bulk_force_disable(int num_consumers, ··· 359 354 return ERR_PTR(-ENODEV); 360 355 } 361 356 357 + static inline int devm_regulator_get_enable(struct device *dev, const char *id) 358 + { 359 + return -ENODEV; 360 + } 361 + 362 + static inline int devm_regulator_get_enable_optional(struct device *dev, 363 + const char *id) 364 + { 365 + return -ENODEV; 366 + } 367 + 362 368 static inline struct regulator *__must_check 363 369 regulator_get_optional(struct device *dev, const char *id) 364 370 { ··· 388 372 } 389 373 390 374 static inline void devm_regulator_put(struct regulator *regulator) 375 + { 376 + } 377 + 378 + static inline void devm_regulator_bulk_put(struct regulator_bulk_data *consumers) 391 379 { 392 380 } 393 381 ··· 481 461 482 462 static inline int regulator_bulk_enable(int num_consumers, 483 463 struct regulator_bulk_data *consumers) 464 + { 465 + return 0; 466 + } 467 + 468 + static inline int devm_regulator_bulk_get_enable(struct device *dev, 469 + int num_consumers, 470 + const char * const *id) 484 471 { 485 472 return 0; 486 473 }
+2
include/linux/regulator/gpio-regulator.h
··· 42 42 /** 43 43 * struct gpio_regulator_config - config structure 44 44 * @supply_name: Name of the regulator supply 45 + * @input_supply: Name of the input regulator supply 45 46 * @enabled_at_boot: Whether regulator has been enabled at 46 47 * boot or not. 1 = Yes, 0 = No 47 48 * This is used to keep the regulator at ··· 63 62 */ 64 63 struct gpio_regulator_config { 65 64 const char *supply_name; 65 + const char *input_supply; 66 66 67 67 unsigned enabled_at_boot:1; 68 68 unsigned startup_delay;
+46
include/linux/regulator/mt6331-regulator.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2022 Collabora Ltd. 4 + * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 5 + */ 6 + 7 + #ifndef __LINUX_REGULATOR_MT6331_H 8 + #define __LINUX_REGULATOR_MT6331_H 9 + 10 + enum { 11 + /* BUCK */ 12 + MT6331_ID_VDVFS11 = 0, 13 + MT6331_ID_VDVFS12, 14 + MT6331_ID_VDVFS13, 15 + MT6331_ID_VDVFS14, 16 + MT6331_ID_VCORE2, 17 + MT6331_ID_VIO18, 18 + /* LDO */ 19 + MT6331_ID_VTCXO1, 20 + MT6331_ID_VTCXO2, 21 + MT6331_ID_AVDD32_AUD, 22 + MT6331_ID_VAUXA32, 23 + MT6331_ID_VCAMA, 24 + MT6331_ID_VIO28, 25 + MT6331_ID_VCAM_AF, 26 + MT6331_ID_VMC, 27 + MT6331_ID_VMCH, 28 + MT6331_ID_VEMC33, 29 + MT6331_ID_VGP1, 30 + MT6331_ID_VSIM1, 31 + MT6331_ID_VSIM2, 32 + MT6331_ID_VMIPI, 33 + MT6331_ID_VIBR, 34 + MT6331_ID_VGP4, 35 + MT6331_ID_VCAMD, 36 + MT6331_ID_VUSB10, 37 + MT6331_ID_VCAM_IO, 38 + MT6331_ID_VSRAM_DVFS1, 39 + MT6331_ID_VGP2, 40 + MT6331_ID_VGP3, 41 + MT6331_ID_VRTC, 42 + MT6331_ID_VDIG18, 43 + MT6331_ID_VREG_MAX 44 + }; 45 + 46 + #endif /* __LINUX_REGULATOR_MT6331_H */
+27
include/linux/regulator/mt6332-regulator.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2022 Collabora Ltd. 4 + * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 5 + */ 6 + 7 + #ifndef __LINUX_REGULATOR_MT6332_H 8 + #define __LINUX_REGULATOR_MT6332_H 9 + 10 + enum { 11 + /* BUCK */ 12 + MT6332_ID_VDRAM = 0, 13 + MT6332_ID_VDVFS2, 14 + MT6332_ID_VPA, 15 + MT6332_ID_VRF1, 16 + MT6332_ID_VRF2, 17 + MT6332_ID_VSBST, 18 + /* LDO */ 19 + MT6332_ID_VAUXB32, 20 + MT6332_ID_VBIF28, 21 + MT6332_ID_VDIG18, 22 + MT6332_ID_VSRAM_DVFS2, 23 + MT6332_ID_VUSB33, 24 + MT6332_ID_VREG_MAX 25 + }; 26 + 27 + #endif /* __LINUX_REGULATOR_MT6332_H */